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Wed, 30 Nov 2022 02:25:31 -0500 (EST) Message-ID: <91d7eebd-7433-c06d-6d14-a01d11af9df9@sholland.org> Date: Wed, 30 Nov 2022 01:25:30 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux ppc64le; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH v2 7/9] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Content-Language: en-US To: Jisheng Zhang Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Rob Herring , Conor Dooley , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Greg Kroah-Hartman , Jiri Slaby , =?UTF-8?Q?Ilpo_J=c3=a4rvinen?= References: <20221127132448.4034-1-jszhang@kernel.org> <20221127132448.4034-8-jszhang@kernel.org> From: Samuel Holland In-Reply-To: <20221127132448.4034-8-jszhang@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/27/22 07:24, Jisheng Zhang wrote: > Sipeed manufactures a M1s system-on-module and dock board, add basic > support for them. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++ > .../dts/bouffalolab/bl808-sipeed-m1s-dock.dts | 25 +++++++++++++++++++ > .../dts/bouffalolab/bl808-sipeed-m1s.dtsi | 21 ++++++++++++++++ > 4 files changed, 49 insertions(+) > create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile > index ff174996cdfd..b525467152b2 100644 > --- a/arch/riscv/boot/dts/Makefile > +++ b/arch/riscv/boot/dts/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +subdir-y += bouffalolab > subdir-y += sifive > subdir-y += starfive > subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan > diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile b/arch/riscv/boot/dts/bouffalolab/Makefile > new file mode 100644 > index 000000000000..5419964e892d > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s-dock.dtb > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > new file mode 100644 > index 000000000000..c6b4894a7b88 > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > @@ -0,0 +1,25 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2022 Jisheng Zhang > + */ > + > +/dts-v1/; > + > +#include "bl808-sipeed-m1s.dtsi" > + > +/ { > + model = "Sipeed M1s Dock"; > + compatible = "sipeed,m1s-dock", "sipeed,m1s", "bouffalolab,bl808"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:2000000n8"; > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > new file mode 100644 > index 000000000000..5026de768534 > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2022 Jisheng Zhang > + */ > + > +/dts-v1/; > + > +#include "bl808.dtsi" > + > +/ { > + compatible = "sipeed,m1s", "bouffalolab,bl808"; > + > + memory@50000000 { > + device_type = "memory"; > + reg = <0x50000000 0x04000000>; > + }; The PSRAM is part of the BL808, so this should go in the SoC .dtsi file. (Unless I'm missing something and there are BL808 variants with different amounts of memory. The PSRAM init code in the SDK does size detection, so I suppose it is possible.) Regards, Samuel > +}; > + > +&xtal { > + clock-frequency = <40000000>; > +}; From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F157EC4321E for ; Wed, 30 Nov 2022 07:25:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XzFdAaoDChbg5W4dlZrgCqSUyWQrWMqoVFIrFYF3aqU=; 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Wed, 30 Nov 2022 02:25:31 -0500 (EST) Message-ID: <91d7eebd-7433-c06d-6d14-a01d11af9df9@sholland.org> Date: Wed, 30 Nov 2022 01:25:30 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux ppc64le; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH v2 7/9] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Content-Language: en-US To: Jisheng Zhang Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Rob Herring , Conor Dooley , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Greg Kroah-Hartman , Jiri Slaby , =?UTF-8?Q?Ilpo_J=c3=a4rvinen?= References: <20221127132448.4034-1-jszhang@kernel.org> <20221127132448.4034-8-jszhang@kernel.org> From: Samuel Holland In-Reply-To: <20221127132448.4034-8-jszhang@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221129_232534_601061_EEA2DD75 X-CRM114-Status: GOOD ( 18.53 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 11/27/22 07:24, Jisheng Zhang wrote: > Sipeed manufactures a M1s system-on-module and dock board, add basic > support for them. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++ > .../dts/bouffalolab/bl808-sipeed-m1s-dock.dts | 25 +++++++++++++++++++ > .../dts/bouffalolab/bl808-sipeed-m1s.dtsi | 21 ++++++++++++++++ > 4 files changed, 49 insertions(+) > create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile > index ff174996cdfd..b525467152b2 100644 > --- a/arch/riscv/boot/dts/Makefile > +++ b/arch/riscv/boot/dts/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +subdir-y += bouffalolab > subdir-y += sifive > subdir-y += starfive > subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan > diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile b/arch/riscv/boot/dts/bouffalolab/Makefile > new file mode 100644 > index 000000000000..5419964e892d > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s-dock.dtb > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > new file mode 100644 > index 000000000000..c6b4894a7b88 > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > @@ -0,0 +1,25 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2022 Jisheng Zhang > + */ > + > +/dts-v1/; > + > +#include "bl808-sipeed-m1s.dtsi" > + > +/ { > + model = "Sipeed M1s Dock"; > + compatible = "sipeed,m1s-dock", "sipeed,m1s", "bouffalolab,bl808"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:2000000n8"; > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > new file mode 100644 > index 000000000000..5026de768534 > --- /dev/null > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > @@ -0,0 +1,21 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2022 Jisheng Zhang > + */ > + > +/dts-v1/; > + > +#include "bl808.dtsi" > + > +/ { > + compatible = "sipeed,m1s", "bouffalolab,bl808"; > + > + memory@50000000 { > + device_type = "memory"; > + reg = <0x50000000 0x04000000>; > + }; The PSRAM is part of the BL808, so this should go in the SoC .dtsi file. (Unless I'm missing something and there are BL808 variants with different amounts of memory. The PSRAM init code in the SDK does size detection, so I suppose it is possible.) Regards, Samuel > +}; > + > +&xtal { > + clock-frequency = <40000000>; > +}; _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv