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Tue, 26 Jan 2021 05:22:13 +0000 Message-ID: <9233b33c789a2b207a437df9abcff1dd7fd89b16.camel@nxp.com> Subject: Re: [PATCH v6 5/6] drm/imx: Introduce i.MX8qm/qxp DPU DRM From: Liu Ying To: Laurentiu Palcu Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, robh+dt@kernel.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, guido.gunther@puri.sm Date: Tue, 26 Jan 2021 13:20:32 +0800 In-Reply-To: <20210125134806.w77bdrx2wbb4kirz@fsr-ub1864-141> References: <1611213263-7245-1-git-send-email-victor.liu@nxp.com> <1611213263-7245-6-git-send-email-victor.liu@nxp.com> <20210125134806.w77bdrx2wbb4kirz@fsr-ub1864-141> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.4-0ubuntu1 Content-Transfer-Encoding: 7bit X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR03CA0122.apcprd03.prod.outlook.com (2603:1096:4:91::26) To VI1PR04MB3983.eurprd04.prod.outlook.com (2603:10a6:803:4c::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from blueberry.ap.freescale.net (119.31.174.66) by SG2PR03CA0122.apcprd03.prod.outlook.com (2603:1096:4:91::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.7 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?B?WUFRcjc4anZlT1NHams3dXJHMGE4aXJmTmlrR1oyL3d6U3RYT1BGdG5qdnZy?= =?utf-8?B?eFgyTkZnOEdIdFdCL3VLK2c3Q25HMlZwdXNxcUg1T3g5a0NiOS9nV1RtZVpn?= =?utf-8?B?NVY3VkEyVmsyWnZ6YU16cHVidGIxdWlPUXFLUVI2WlpzbWtFanlabTRyUnM2?= =?utf-8?B?cUc3Z0djdkpZVytPN2dMR2tJaFY4aTBFSzI1U3NxVWEyNU94d1pmcXJJUkNo?= =?utf-8?B?dW80ZExBQStDK0dzdjBwVzh1OGFSS1pHMjdmd3AvRGs0TlRWT3FRM0NOeUZ4?= =?utf-8?B?WnE2dEJmKzRsS1ZCWnJGOWFlckJnS2w3RHBPL0Y1a0dDbU1neUFpemlQT1ZV?= =?utf-8?B?RXZ3QkdqeVBDQVdyZkw1cG54MnRCWVR5QXR0NTBBTkdqUzl3ek9XaDZ1TmFI?= =?utf-8?B?dzgvS3h1TWpxNm5ZakluQVBwQTRCY0ZubDQvZkNvUWtSQzFCTFNwajVzR2Fk?= =?utf-8?B?SVI0eTRocUJxSVBBMWQzTkR0UGltL0IvdmI1UDE2MjBPbCtDcElKemZHR2hU?= =?utf-8?B?cEcyL29QRTArYlhYbzhLUlBkdk8yNWFnU2IzRTNaZ3VvRU5TRnlBNi9EaTVX?= =?utf-8?B?Vytjd2swTmk4UkEzeXZnNXF4Y1VGU2k4cUQ2T2NYdUhybnBudTloTmFuazFz?= =?utf-8?B?RDMyMEtDd0hGaW1ZYUpYNUNVTTE3cUJhM3Eza1d1b0JEckl0YmZKOWhrdktv?= =?utf-8?B?MnRuZ1ZhM0gzWVJ0MVlrQ0NxYlpTbzJMRVB2dmY1Y3lsZG8valNxNWJJYzNC?= =?utf-8?B?Ynhkalp0ZlZYV3dwRDI3dTlIbXhSU0lqTThyMFN5QjdBL3ZMT3NzcTMxWUJx?= =?utf-8?B?SC9ndjRIdzRYMjU4MW5LYjV3cE9DR2t2aVl2enVYVE5JY0E1Z2hoM1l2YUJZ?= =?utf-8?B?WUJMYlRSbjhKR2w0TDJMZExlNDNkdldnRkMxcjRwMUpVUno1SHlWeTVTQ3dU?= =?utf-8?B?REhlcEF0VjhUNmpIdzBPd3UwL1pWUGVlSDJkSUZwTXJVbDBSYzYrc2ZqaEkv?= =?utf-8?B?OGtqYWp5SzhXemNRa3kraXZUdUNWcHlHRWQ2MHNoeXlPZWFtbU9tSi94dFV0?= =?utf-8?B?MU1tcmtlNkptUFRnNENpRFRxcUpKRllyYnE4d0ZhWWN2dkI3S21tWTZMemZ1?= =?utf-8?B?TUg5cG9WRFUvYU1zSFUzbEZ0K3ZXZitYaHJXQUw4emZCRFlDNzM0OE5rY09L?= =?utf-8?B?RWFuN2IzZkc1OUtJYzFLQml0RHQwbEtjYitnT1RhS2Y5dTByNW1KTlZjRC95?= =?utf-8?B?Ry8xcXBmTXErWjZ4YU9vdjUxcmh2akdsbk55T0gwa3d5d3BVTS81ZHBDaDFV?= =?utf-8?B?cXFtLzJsWDdEMm0rYS9KbWRBUS8rNVREUU1JK2FvU2ZVVkxZdEZOWi82bG1R?= =?utf-8?B?UERRdlMxNU5qZE55SGJIOHdqSzV3R0o1QVUyRFpxSlRmTjk5Rk1ZVTVTZlBW?= =?utf-8?Q?9uxK8cG7?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b9ca8570-6b5b-443e-827a-08d8c1ba5609 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB3983.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2021 05:22:13.1222 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iefcsRAjy9acTL7JY9a+WNNiP4kHViyoAmM1GjTS6Wca8yFDOVetOUKhsaps2JExURJzW3Q7ByLgF5guXu28ww== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6990 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2021-01-25 at 15:48 +0200, Laurentiu Palcu wrote: > Hi Liu Ying, > > Just some minor comments below. > > On Thu, Jan 21, 2021 at 03:14:22PM +0800, Liu Ying wrote: > > This patch introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support. > > > > DPU is comprised of two main components that include a blit engine for > > 2D graphics accelerations(with composition support) and a display controller > > for display output processing, as well as a command sequencer. Outside of > > DPU, optional prefetch engines, a.k.a, Prefetch Resolve Gasket(PRG) and > > Display Prefetch Resolve(DPR), can fetch data from memory prior to some DPU > > fetchunits of blit engine and display controller. The prefetch engines > > support reading linear formats and resolving Vivante GPU tile formats. > > > > This patch adds kernel modesetting support for the display controller part. > > The driver supports two CRTCs per display controller, planes backed by > > four fetchunits(decode0/1, fetchlayer, fetchwarp), fetchunit allocation > > logic for the two CRTCs, prefetch engines(with tile resolving supported), > > plane upscaling/deinterlacing/yuv2rgb CSC/alpha blending and CRTC gamma > > correction. The registers of the controller is accessed without command > > sequencer involved, instead just by using CPU. > > > > Reference manual can be found at: > > https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM > > > > Signed-off-by: Liu Ying > > --- > > v5->v6: > > * Do not use macros where possible. (Laurentiu) > > * Break dpu_plane_atomic_check() into some smaller functions. (Laurentiu) > > * Address some minor comments from Laurentiu. > > * Add dpu_crtc_err() helper marco to tell dmesg which CRTC generates error. > > * Drop calling dev_set_drvdata() from dpu_drm_bind/unbind() as it is done > > in dpu_drm_probe(). > > * Some trivial tweaks. > > > > v4->v5: > > * Rebase up onto the latest drm-misc-next branch and remove the hook to > > drm_atomic_helper_legacy_gamma_set(), because it was dropped by the newly > > landed commit 'drm: automatic legacy gamma support'. > > * Remove a redundant blank line from dpu_plane_atomic_update(). > > > > v3->v4: > > * No change. > > > > v2->v3: > > * Fix build warnings Reported-by: kernel test robot . > > * Drop build dependency on IMX_SCU, as dummy SCU functions have been added in > > header files by the patch 'firmware: imx: add dummy functions' which has > > landed in linux-next/master branch. > > > > v1->v2: > > * Add compatible for i.MX8qm DPU, as this is tested with i.MX8qm LVDS displays. > > (Laurentiu) > > * Fix PRG burst size and stride. (Laurentiu) > > * Put 'ports' OF node to fix the bail-out logic in dpu_drm_probe(). (Laurentiu) > > > > drivers/gpu/drm/imx/Kconfig | 1 + > > drivers/gpu/drm/imx/Makefile | 1 + > > drivers/gpu/drm/imx/dpu/Kconfig | 10 + > > drivers/gpu/drm/imx/dpu/Makefile | 10 + > > drivers/gpu/drm/imx/dpu/dpu-constframe.c | 171 +++++ > > drivers/gpu/drm/imx/dpu/dpu-core.c | 1094 +++++++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.c | 967 +++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.h | 66 ++ > > drivers/gpu/drm/imx/dpu/dpu-disengcfg.c | 117 +++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.c | 718 +++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.h | 40 ++ > > drivers/gpu/drm/imx/dpu/dpu-drv.c | 292 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-drv.h | 28 + > > drivers/gpu/drm/imx/dpu/dpu-extdst.c | 299 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c | 294 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetcheco.c | 224 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c | 154 ++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.c | 609 ++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.h | 191 +++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-framegen.c | 395 +++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-gammacor.c | 223 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-hscaler.c | 275 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.c | 540 ++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.h | 23 + > > drivers/gpu/drm/imx/dpu/dpu-layerblend.c | 348 +++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.c | 799 +++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.h | 56 ++ > > drivers/gpu/drm/imx/dpu/dpu-prg.c | 433 ++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-prg.h | 45 ++ > > drivers/gpu/drm/imx/dpu/dpu-prv.h | 233 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-tcon.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-vscaler.c | 308 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu.h | 385 ++++++++++ > > 34 files changed, 9849 insertions(+) > > create mode 100644 drivers/gpu/drm/imx/dpu/Kconfig > > create mode 100644 drivers/gpu/drm/imx/dpu/Makefile > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-constframe.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-core.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-disengcfg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-extdst.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetcheco.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-framegen.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-gammacor.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-hscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-layerblend.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-tcon.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-vscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu.h > > > > [...] > > > diff --git a/drivers/gpu/drm/imx/dpu/dpu-core.c b/drivers/gpu/drm/imx/dpu/dpu-core.c > > new file mode 100644 > > index 00000000..7dab6cc > > --- /dev/null > > +++ b/drivers/gpu/drm/imx/dpu/dpu-core.c > > [...] > > > +static int dpu_get_irqs(struct platform_device *pdev, struct dpu_soc *dpu) > > +{ > > + unsigned int i, j; > > + > > + /* do not get the reserved irq */ > > + for (i = 0, j = 0; i < DPU_IRQ_COUNT - 1; i++, j++) { > > + if (i == DPU_IRQ_RESERVED) > > + j++; > > + > > + dpu->irq[j] = platform_get_irq(pdev, i); > > + if (dpu->irq[j] < 0) { > > + dev_err_probe(dpu->dev, dpu->irq[j], > > + "failed to get irq\n"); > > + return dpu->irq[i]; > > I think you want 'return dpu->irq[j]'. Good catch. > > > + } > > + } > > + > > + return 0; > > +} > > [...] > > > +static const struct dpu_irq_handler_map { > > + void (*handler)(struct irq_desc *desc); > > +} dpu_irq_handler_maps[DPU_IRQ_COUNT] = { > > + {}, /* 0 */ > > + {}, /* 1 */ > > + {}, /* 2 */ > > + {dpu_extdst0_shdload_irq_handler}, /* 3 */ > > + {}, /* 4 */ > > + {}, /* 5 */ > > + {dpu_extdst4_shdload_irq_handler}, /* 6 */ > > + {}, /* 7 */ > > + {}, /* 8 */ > > + {dpu_extdst1_shdload_irq_handler}, /* 9 */ > > + {}, /* 10 */ > > + {}, /* 11 */ > > + {dpu_extdst5_shdload_irq_handler}, /* 12 */ > > + {}, /* 13 */ > > + {}, /* 14 */ > > + {dpu_disengcfg_shdload0_irq_handler}, /* 15 */ > > + {dpu_disengcfg_framecomplete0_irq_handler}, /* 16 */ > > + {dpu_disengcfg_seqcomplete0_irq_handler}, /* 17 */ > > + {}, /* 18 */ > > + {}, /* 19 */ > > + {}, /* 20 */ > > + {}, /* 21 */ > > + {}, /* 22 */ > > + {}, /* 23 */ > > + {}, /* 24 */ > > + {dpu_disengcfg_shdload1_irq_handler}, /* 25 */ > > + {dpu_disengcfg_framecomplete1_irq_handler}, /* 26 */ > > + {dpu_disengcfg_seqcomplete1_irq_handler}, /* 27 */ > > + {}, /* 28 */ > > + {}, /* 29 */ > > + {}, /* 30 */ > > + {}, /* 31 */ > > + {}, /* 32 */ > > + {}, /* 33 */ > > + {}, /* 34 */ > > + {/* reserved */}, /* 35 */ > > + {}, /* 36 */ > > + {}, /* 37 */ > > + {}, /* 38 */ > > + {}, /* 39 */ > > + {}, /* 40 */ > > + {}, /* 41 */ > > + {}, /* 42 */ > > + {}, /* 43 */ > > + {}, /* 44 */ > > + {}, /* 45 */ > > + {}, /* 46 */ > > + {}, /* 47 */ > > + {}, /* 48 */ > > +}; > > Why not make this an array of pointers to functions. Do we need a struct? > Something like: > > static void (* const dpu_irq_handler[DPU_IRQ_COUNT])(struct irq_desc *) = { > [3] = dpu_extdst0_shdload_irq_handler, > [6] = dpu_extdst4_shdload_irq_handler, > ... > }; Alright, will use the function array. > > [...] > > > +static int > > +dpu_get_fetchunits_for_plane_grp(struct dpu_soc *dpu, > > + const struct dpu_units *us, > > + struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + struct dpu_fetchunit * > > + (*get)(struct dpu_soc *dpu, > > + unsigned int id)) > > +{ > > + unsigned int fu_cnt = 0; > > + int i, j, ret; > > + > > + for (i = 0; i < us->cnt; i++) { > > + if (us->types[i] == DPU_DISP) > > + fu_cnt++; > > + } > > + > > + *cnt = fu_cnt; > > + > > + *fu = devm_kcalloc(dpu->dev, fu_cnt, sizeof(**fu), GFP_KERNEL); > > + if (!(*fu)) > > + return -ENOMEM; > > + > > + for (i = 0, j = 0; i < us->cnt; i++) { > > + if (us->types[i] != DPU_DISP) > > + continue; > > + > > + (*fu)[j] = (*get)(dpu, us->ids[i]); > > You can also call get() directly. No need to dereference function > pointers. Will do. > > > + if (IS_ERR((*fu)[j])) { > > + ret = PTR_ERR((*fu)[j]); > > + dev_err(dpu->dev, "failed to get %s%d: %d\n", > > + us->name, us->ids[i], ret); > > + return ret; > > + } > > + j++; > > + } > > + > > + return 0; > > +} > > [...] > > > +static void > > +dpu_put_fetchunits_for_plane_grp(struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + void (*put)(struct dpu_fetchunit *fu)) > > +{ > > + int i; > > + > > + for (i = 0; i < *cnt; i++) > > + (*put)((*fu)[i]); > > Same here, you can call put() directly. Will do. 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dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB3983.eurprd04.prod.outlook.com (2603:10a6:803:4c::16) by VI1PR04MB6990.eurprd04.prod.outlook.com (2603:10a6:803:138::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3784.11; Tue, 26 Jan 2021 05:22:13 +0000 Received: from VI1PR04MB3983.eurprd04.prod.outlook.com ([fe80::2564:cacc:2da5:52d0]) by VI1PR04MB3983.eurprd04.prod.outlook.com ([fe80::2564:cacc:2da5:52d0%5]) with mapi id 15.20.3784.017; Tue, 26 Jan 2021 05:22:13 +0000 Message-ID: <9233b33c789a2b207a437df9abcff1dd7fd89b16.camel@nxp.com> Subject: Re: [PATCH v6 5/6] drm/imx: Introduce i.MX8qm/qxp DPU DRM From: Liu Ying To: Laurentiu Palcu Date: Tue, 26 Jan 2021 13:20:32 +0800 In-Reply-To: <20210125134806.w77bdrx2wbb4kirz@fsr-ub1864-141> References: <1611213263-7245-1-git-send-email-victor.liu@nxp.com> <1611213263-7245-6-git-send-email-victor.liu@nxp.com> <20210125134806.w77bdrx2wbb4kirz@fsr-ub1864-141> User-Agent: Evolution 3.36.4-0ubuntu1 X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR03CA0122.apcprd03.prod.outlook.com (2603:1096:4:91::26) To VI1PR04MB3983.eurprd04.prod.outlook.com (2603:10a6:803:4c::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from blueberry.ap.freescale.net (119.31.174.66) by SG2PR03CA0122.apcprd03.prod.outlook.com (2603:1096:4:91::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.7 via Frontend Transport; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2021-01-25 at 15:48 +0200, Laurentiu Palcu wrote: > Hi Liu Ying, > > Just some minor comments below. > > On Thu, Jan 21, 2021 at 03:14:22PM +0800, Liu Ying wrote: > > This patch introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support. > > > > DPU is comprised of two main components that include a blit engine for > > 2D graphics accelerations(with composition support) and a display controller > > for display output processing, as well as a command sequencer. Outside of > > DPU, optional prefetch engines, a.k.a, Prefetch Resolve Gasket(PRG) and > > Display Prefetch Resolve(DPR), can fetch data from memory prior to some DPU > > fetchunits of blit engine and display controller. The prefetch engines > > support reading linear formats and resolving Vivante GPU tile formats. > > > > This patch adds kernel modesetting support for the display controller part. > > The driver supports two CRTCs per display controller, planes backed by > > four fetchunits(decode0/1, fetchlayer, fetchwarp), fetchunit allocation > > logic for the two CRTCs, prefetch engines(with tile resolving supported), > > plane upscaling/deinterlacing/yuv2rgb CSC/alpha blending and CRTC gamma > > correction. The registers of the controller is accessed without command > > sequencer involved, instead just by using CPU. > > > > Reference manual can be found at: > > https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM > > > > Signed-off-by: Liu Ying > > --- > > v5->v6: > > * Do not use macros where possible. (Laurentiu) > > * Break dpu_plane_atomic_check() into some smaller functions. (Laurentiu) > > * Address some minor comments from Laurentiu. > > * Add dpu_crtc_err() helper marco to tell dmesg which CRTC generates error. > > * Drop calling dev_set_drvdata() from dpu_drm_bind/unbind() as it is done > > in dpu_drm_probe(). > > * Some trivial tweaks. > > > > v4->v5: > > * Rebase up onto the latest drm-misc-next branch and remove the hook to > > drm_atomic_helper_legacy_gamma_set(), because it was dropped by the newly > > landed commit 'drm: automatic legacy gamma support'. > > * Remove a redundant blank line from dpu_plane_atomic_update(). > > > > v3->v4: > > * No change. > > > > v2->v3: > > * Fix build warnings Reported-by: kernel test robot . > > * Drop build dependency on IMX_SCU, as dummy SCU functions have been added in > > header files by the patch 'firmware: imx: add dummy functions' which has > > landed in linux-next/master branch. > > > > v1->v2: > > * Add compatible for i.MX8qm DPU, as this is tested with i.MX8qm LVDS displays. > > (Laurentiu) > > * Fix PRG burst size and stride. (Laurentiu) > > * Put 'ports' OF node to fix the bail-out logic in dpu_drm_probe(). (Laurentiu) > > > > drivers/gpu/drm/imx/Kconfig | 1 + > > drivers/gpu/drm/imx/Makefile | 1 + > > drivers/gpu/drm/imx/dpu/Kconfig | 10 + > > drivers/gpu/drm/imx/dpu/Makefile | 10 + > > drivers/gpu/drm/imx/dpu/dpu-constframe.c | 171 +++++ > > drivers/gpu/drm/imx/dpu/dpu-core.c | 1094 +++++++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.c | 967 +++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.h | 66 ++ > > drivers/gpu/drm/imx/dpu/dpu-disengcfg.c | 117 +++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.c | 718 +++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.h | 40 ++ > > drivers/gpu/drm/imx/dpu/dpu-drv.c | 292 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-drv.h | 28 + > > drivers/gpu/drm/imx/dpu/dpu-extdst.c | 299 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c | 294 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetcheco.c | 224 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c | 154 ++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.c | 609 ++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.h | 191 +++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-framegen.c | 395 +++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-gammacor.c | 223 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-hscaler.c | 275 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.c | 540 ++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.h | 23 + > > drivers/gpu/drm/imx/dpu/dpu-layerblend.c | 348 +++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.c | 799 +++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.h | 56 ++ > > drivers/gpu/drm/imx/dpu/dpu-prg.c | 433 ++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-prg.h | 45 ++ > > drivers/gpu/drm/imx/dpu/dpu-prv.h | 233 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-tcon.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-vscaler.c | 308 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu.h | 385 ++++++++++ > > 34 files changed, 9849 insertions(+) > > create mode 100644 drivers/gpu/drm/imx/dpu/Kconfig > > create mode 100644 drivers/gpu/drm/imx/dpu/Makefile > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-constframe.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-core.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-disengcfg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-extdst.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetcheco.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-framegen.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-gammacor.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-hscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-layerblend.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-tcon.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-vscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu.h > > > > [...] > > > diff --git a/drivers/gpu/drm/imx/dpu/dpu-core.c b/drivers/gpu/drm/imx/dpu/dpu-core.c > > new file mode 100644 > > index 00000000..7dab6cc > > --- /dev/null > > +++ b/drivers/gpu/drm/imx/dpu/dpu-core.c > > [...] > > > +static int dpu_get_irqs(struct platform_device *pdev, struct dpu_soc *dpu) > > +{ > > + unsigned int i, j; > > + > > + /* do not get the reserved irq */ > > + for (i = 0, j = 0; i < DPU_IRQ_COUNT - 1; i++, j++) { > > + if (i == DPU_IRQ_RESERVED) > > + j++; > > + > > + dpu->irq[j] = platform_get_irq(pdev, i); > > + if (dpu->irq[j] < 0) { > > + dev_err_probe(dpu->dev, dpu->irq[j], > > + "failed to get irq\n"); > > + return dpu->irq[i]; > > I think you want 'return dpu->irq[j]'. Good catch. > > > + } > > + } > > + > > + return 0; > > +} > > [...] > > > +static const struct dpu_irq_handler_map { > > + void (*handler)(struct irq_desc *desc); > > +} dpu_irq_handler_maps[DPU_IRQ_COUNT] = { > > + {}, /* 0 */ > > + {}, /* 1 */ > > + {}, /* 2 */ > > + {dpu_extdst0_shdload_irq_handler}, /* 3 */ > > + {}, /* 4 */ > > + {}, /* 5 */ > > + {dpu_extdst4_shdload_irq_handler}, /* 6 */ > > + {}, /* 7 */ > > + {}, /* 8 */ > > + {dpu_extdst1_shdload_irq_handler}, /* 9 */ > > + {}, /* 10 */ > > + {}, /* 11 */ > > + {dpu_extdst5_shdload_irq_handler}, /* 12 */ > > + {}, /* 13 */ > > + {}, /* 14 */ > > + {dpu_disengcfg_shdload0_irq_handler}, /* 15 */ > > + {dpu_disengcfg_framecomplete0_irq_handler}, /* 16 */ > > + {dpu_disengcfg_seqcomplete0_irq_handler}, /* 17 */ > > + {}, /* 18 */ > > + {}, /* 19 */ > > + {}, /* 20 */ > > + {}, /* 21 */ > > + {}, /* 22 */ > > + {}, /* 23 */ > > + {}, /* 24 */ > > + {dpu_disengcfg_shdload1_irq_handler}, /* 25 */ > > + {dpu_disengcfg_framecomplete1_irq_handler}, /* 26 */ > > + {dpu_disengcfg_seqcomplete1_irq_handler}, /* 27 */ > > + {}, /* 28 */ > > + {}, /* 29 */ > > + {}, /* 30 */ > > + {}, /* 31 */ > > + {}, /* 32 */ > > + {}, /* 33 */ > > + {}, /* 34 */ > > + {/* reserved */}, /* 35 */ > > + {}, /* 36 */ > > + {}, /* 37 */ > > + {}, /* 38 */ > > + {}, /* 39 */ > > + {}, /* 40 */ > > + {}, /* 41 */ > > + {}, /* 42 */ > > + {}, /* 43 */ > > + {}, /* 44 */ > > + {}, /* 45 */ > > + {}, /* 46 */ > > + {}, /* 47 */ > > + {}, /* 48 */ > > +}; > > Why not make this an array of pointers to functions. Do we need a struct? > Something like: > > static void (* const dpu_irq_handler[DPU_IRQ_COUNT])(struct irq_desc *) = { > [3] = dpu_extdst0_shdload_irq_handler, > [6] = dpu_extdst4_shdload_irq_handler, > ... > }; Alright, will use the function array. > > [...] > > > +static int > > +dpu_get_fetchunits_for_plane_grp(struct dpu_soc *dpu, > > + const struct dpu_units *us, > > + struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + struct dpu_fetchunit * > > + (*get)(struct dpu_soc *dpu, > > + unsigned int id)) > > +{ > > + unsigned int fu_cnt = 0; > > + int i, j, ret; > > + > > + for (i = 0; i < us->cnt; i++) { > > + if (us->types[i] == DPU_DISP) > > + fu_cnt++; > > + } > > + > > + *cnt = fu_cnt; > > + > > + *fu = devm_kcalloc(dpu->dev, fu_cnt, sizeof(**fu), GFP_KERNEL); > > + if (!(*fu)) > > + return -ENOMEM; > > + > > + for (i = 0, j = 0; i < us->cnt; i++) { > > + if (us->types[i] != DPU_DISP) > > + continue; > > + > > + (*fu)[j] = (*get)(dpu, us->ids[i]); > > You can also call get() directly. No need to dereference function > pointers. Will do. > > > + if (IS_ERR((*fu)[j])) { > > + ret = PTR_ERR((*fu)[j]); > > + dev_err(dpu->dev, "failed to get %s%d: %d\n", > > + us->name, us->ids[i], ret); > > + return ret; > > + } > > + j++; > > + } > > + > > + return 0; > > +} > > [...] > > > +static void > > +dpu_put_fetchunits_for_plane_grp(struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + void (*put)(struct dpu_fetchunit *fu)) > > +{ > > + int i; > > + > > + for (i = 0; i < *cnt; i++) > > + (*put)((*fu)[i]); > > Same here, you can call put() directly. Will do. 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, 2021-01-25 at 15:48 +0200, Laurentiu Palcu wrote: > Hi Liu Ying, > > Just some minor comments below. > > On Thu, Jan 21, 2021 at 03:14:22PM +0800, Liu Ying wrote: > > This patch introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support. > > > > DPU is comprised of two main components that include a blit engine for > > 2D graphics accelerations(with composition support) and a display controller > > for display output processing, as well as a command sequencer. Outside of > > DPU, optional prefetch engines, a.k.a, Prefetch Resolve Gasket(PRG) and > > Display Prefetch Resolve(DPR), can fetch data from memory prior to some DPU > > fetchunits of blit engine and display controller. The prefetch engines > > support reading linear formats and resolving Vivante GPU tile formats. > > > > This patch adds kernel modesetting support for the display controller part. > > The driver supports two CRTCs per display controller, planes backed by > > four fetchunits(decode0/1, fetchlayer, fetchwarp), fetchunit allocation > > logic for the two CRTCs, prefetch engines(with tile resolving supported), > > plane upscaling/deinterlacing/yuv2rgb CSC/alpha blending and CRTC gamma > > correction. The registers of the controller is accessed without command > > sequencer involved, instead just by using CPU. > > > > Reference manual can be found at: > > https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM > > > > Signed-off-by: Liu Ying > > --- > > v5->v6: > > * Do not use macros where possible. (Laurentiu) > > * Break dpu_plane_atomic_check() into some smaller functions. (Laurentiu) > > * Address some minor comments from Laurentiu. > > * Add dpu_crtc_err() helper marco to tell dmesg which CRTC generates error. > > * Drop calling dev_set_drvdata() from dpu_drm_bind/unbind() as it is done > > in dpu_drm_probe(). > > * Some trivial tweaks. > > > > v4->v5: > > * Rebase up onto the latest drm-misc-next branch and remove the hook to > > drm_atomic_helper_legacy_gamma_set(), because it was dropped by the newly > > landed commit 'drm: automatic legacy gamma support'. > > * Remove a redundant blank line from dpu_plane_atomic_update(). > > > > v3->v4: > > * No change. > > > > v2->v3: > > * Fix build warnings Reported-by: kernel test robot . > > * Drop build dependency on IMX_SCU, as dummy SCU functions have been added in > > header files by the patch 'firmware: imx: add dummy functions' which has > > landed in linux-next/master branch. > > > > v1->v2: > > * Add compatible for i.MX8qm DPU, as this is tested with i.MX8qm LVDS displays. > > (Laurentiu) > > * Fix PRG burst size and stride. (Laurentiu) > > * Put 'ports' OF node to fix the bail-out logic in dpu_drm_probe(). (Laurentiu) > > > > drivers/gpu/drm/imx/Kconfig | 1 + > > drivers/gpu/drm/imx/Makefile | 1 + > > drivers/gpu/drm/imx/dpu/Kconfig | 10 + > > drivers/gpu/drm/imx/dpu/Makefile | 10 + > > drivers/gpu/drm/imx/dpu/dpu-constframe.c | 171 +++++ > > drivers/gpu/drm/imx/dpu/dpu-core.c | 1094 +++++++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.c | 967 +++++++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-crtc.h | 66 ++ > > drivers/gpu/drm/imx/dpu/dpu-disengcfg.c | 117 +++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.c | 718 +++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-dprc.h | 40 ++ > > drivers/gpu/drm/imx/dpu/dpu-drv.c | 292 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-drv.h | 28 + > > drivers/gpu/drm/imx/dpu/dpu-extdst.c | 299 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c | 294 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetcheco.c | 224 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c | 154 ++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.c | 609 ++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchunit.h | 191 +++++ > > drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-framegen.c | 395 +++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-gammacor.c | 223 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-hscaler.c | 275 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.c | 540 ++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-kms.h | 23 + > > drivers/gpu/drm/imx/dpu/dpu-layerblend.c | 348 +++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.c | 799 +++++++++++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-plane.h | 56 ++ > > drivers/gpu/drm/imx/dpu/dpu-prg.c | 433 ++++++++++++ > > drivers/gpu/drm/imx/dpu/dpu-prg.h | 45 ++ > > drivers/gpu/drm/imx/dpu/dpu-prv.h | 233 ++++++ > > drivers/gpu/drm/imx/dpu/dpu-tcon.c | 250 +++++++ > > drivers/gpu/drm/imx/dpu/dpu-vscaler.c | 308 ++++++++ > > drivers/gpu/drm/imx/dpu/dpu.h | 385 ++++++++++ > > 34 files changed, 9849 insertions(+) > > create mode 100644 drivers/gpu/drm/imx/dpu/Kconfig > > create mode 100644 drivers/gpu/drm/imx/dpu/Makefile > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-constframe.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-core.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-crtc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-disengcfg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-dprc.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-drv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-extdst.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchdecode.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetcheco.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchlayer.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchunit.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-fetchwarp.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-framegen.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-gammacor.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-hscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-kms.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-layerblend.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-plane.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prg.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-prv.h > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-tcon.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu-vscaler.c > > create mode 100644 drivers/gpu/drm/imx/dpu/dpu.h > > > > [...] > > > diff --git a/drivers/gpu/drm/imx/dpu/dpu-core.c b/drivers/gpu/drm/imx/dpu/dpu-core.c > > new file mode 100644 > > index 00000000..7dab6cc > > --- /dev/null > > +++ b/drivers/gpu/drm/imx/dpu/dpu-core.c > > [...] > > > +static int dpu_get_irqs(struct platform_device *pdev, struct dpu_soc *dpu) > > +{ > > + unsigned int i, j; > > + > > + /* do not get the reserved irq */ > > + for (i = 0, j = 0; i < DPU_IRQ_COUNT - 1; i++, j++) { > > + if (i == DPU_IRQ_RESERVED) > > + j++; > > + > > + dpu->irq[j] = platform_get_irq(pdev, i); > > + if (dpu->irq[j] < 0) { > > + dev_err_probe(dpu->dev, dpu->irq[j], > > + "failed to get irq\n"); > > + return dpu->irq[i]; > > I think you want 'return dpu->irq[j]'. Good catch. > > > + } > > + } > > + > > + return 0; > > +} > > [...] > > > +static const struct dpu_irq_handler_map { > > + void (*handler)(struct irq_desc *desc); > > +} dpu_irq_handler_maps[DPU_IRQ_COUNT] = { > > + {}, /* 0 */ > > + {}, /* 1 */ > > + {}, /* 2 */ > > + {dpu_extdst0_shdload_irq_handler}, /* 3 */ > > + {}, /* 4 */ > > + {}, /* 5 */ > > + {dpu_extdst4_shdload_irq_handler}, /* 6 */ > > + {}, /* 7 */ > > + {}, /* 8 */ > > + {dpu_extdst1_shdload_irq_handler}, /* 9 */ > > + {}, /* 10 */ > > + {}, /* 11 */ > > + {dpu_extdst5_shdload_irq_handler}, /* 12 */ > > + {}, /* 13 */ > > + {}, /* 14 */ > > + {dpu_disengcfg_shdload0_irq_handler}, /* 15 */ > > + {dpu_disengcfg_framecomplete0_irq_handler}, /* 16 */ > > + {dpu_disengcfg_seqcomplete0_irq_handler}, /* 17 */ > > + {}, /* 18 */ > > + {}, /* 19 */ > > + {}, /* 20 */ > > + {}, /* 21 */ > > + {}, /* 22 */ > > + {}, /* 23 */ > > + {}, /* 24 */ > > + {dpu_disengcfg_shdload1_irq_handler}, /* 25 */ > > + {dpu_disengcfg_framecomplete1_irq_handler}, /* 26 */ > > + {dpu_disengcfg_seqcomplete1_irq_handler}, /* 27 */ > > + {}, /* 28 */ > > + {}, /* 29 */ > > + {}, /* 30 */ > > + {}, /* 31 */ > > + {}, /* 32 */ > > + {}, /* 33 */ > > + {}, /* 34 */ > > + {/* reserved */}, /* 35 */ > > + {}, /* 36 */ > > + {}, /* 37 */ > > + {}, /* 38 */ > > + {}, /* 39 */ > > + {}, /* 40 */ > > + {}, /* 41 */ > > + {}, /* 42 */ > > + {}, /* 43 */ > > + {}, /* 44 */ > > + {}, /* 45 */ > > + {}, /* 46 */ > > + {}, /* 47 */ > > + {}, /* 48 */ > > +}; > > Why not make this an array of pointers to functions. Do we need a struct? > Something like: > > static void (* const dpu_irq_handler[DPU_IRQ_COUNT])(struct irq_desc *) = { > [3] = dpu_extdst0_shdload_irq_handler, > [6] = dpu_extdst4_shdload_irq_handler, > ... > }; Alright, will use the function array. > > [...] > > > +static int > > +dpu_get_fetchunits_for_plane_grp(struct dpu_soc *dpu, > > + const struct dpu_units *us, > > + struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + struct dpu_fetchunit * > > + (*get)(struct dpu_soc *dpu, > > + unsigned int id)) > > +{ > > + unsigned int fu_cnt = 0; > > + int i, j, ret; > > + > > + for (i = 0; i < us->cnt; i++) { > > + if (us->types[i] == DPU_DISP) > > + fu_cnt++; > > + } > > + > > + *cnt = fu_cnt; > > + > > + *fu = devm_kcalloc(dpu->dev, fu_cnt, sizeof(**fu), GFP_KERNEL); > > + if (!(*fu)) > > + return -ENOMEM; > > + > > + for (i = 0, j = 0; i < us->cnt; i++) { > > + if (us->types[i] != DPU_DISP) > > + continue; > > + > > + (*fu)[j] = (*get)(dpu, us->ids[i]); > > You can also call get() directly. No need to dereference function > pointers. Will do. > > > + if (IS_ERR((*fu)[j])) { > > + ret = PTR_ERR((*fu)[j]); > > + dev_err(dpu->dev, "failed to get %s%d: %d\n", > > + us->name, us->ids[i], ret); > > + return ret; > > + } > > + j++; > > + } > > + > > + return 0; > > +} > > [...] > > > +static void > > +dpu_put_fetchunits_for_plane_grp(struct dpu_fetchunit ***fu, > > + unsigned int *cnt, > > + void (*put)(struct dpu_fetchunit *fu)) > > +{ > > + int i; > > + > > + for (i = 0; i < *cnt; i++) > > + (*put)((*fu)[i]); > > Same here, you can call put() directly. Will do. Thanks, Liu Ying _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel