From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.marcansoft.com (marcansoft.com [212.63.210.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3880D1C32 for ; Tue, 16 Aug 2022 05:37:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: marcan@marcan.st) by mail.marcansoft.com (Postfix) with ESMTPSA id 8F51B447D8; Tue, 16 Aug 2022 05:37:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=marcan.st; s=default; t=1660628259; bh=klFJScQtPdSGYcjCrTuLd0vmp+BxBQY7IprafXE1WXI=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=UYrY0eQvg03ffFpSW8MPibeWDmSlQ/yIUpjNy0a6r8M5yYDkXuuY2mgbvXGRIvUKV GKz0u6P8fP347aqNjdqhKCYZ0hFw97bxhf4/fNsEOEsk0hKwi3mcerFSmxESOJtObT ehE5TDjXiRASB0Tulir8a5ysB6oWfFiNPMGbPFaEHIkqpw3cbHaGwhpgxXXTL8zzPZ Rk7YU9AniJOpzHeMzqoGsi2OYvQ/6Rcogj3a4cY18e2p+OdyQYoMJRUkxaqMCUj3Q8 sR2f1ZuFZuhOHeN4Zq5QAjXQLlzT+m6x0uN6nV8Fbd17jp7/ETXkceDCDFThJLdMRQ HVN0NlTWFLFlw== Message-ID: <923f9638-d443-cb8e-104f-41a7f34fa25c@marcan.st> Date: Tue, 16 Aug 2022 14:37:33 +0900 Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH] workqueue: Fix memory ordering race in queue_work*() Content-Language: es-ES To: Herbert Xu , Linus Torvalds Cc: tj@kernel.org, will@kernel.org, peterz@infradead.org, jirislaby@kernel.org, maz@kernel.org, mark.rutland@arm.com, boqun.feng@gmail.com, catalin.marinas@arm.com, oneukum@suse.com, roman.penyaev@profitbricks.com, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: From: Hector Martin In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 16/08/2022 13.14, Herbert Xu wrote: > Hector Martin wrote: >> >> This has been broken since the dawn of time, and it was incompletely >> fixed by 346c09f80459, which added the necessary barriers in the work >> execution path but failed to account for the missing barrier in the >> test_and_set_bit() failure case. Fix it by switching to >> atomic_long_fetch_or(), which does have unconditional barrier semantics >> regardless of whether the bit was already set or not (this is actually >> just test_and_set_bit() minus the early exit path). > > test_and_set_bit is supposed to contain a full memory barrier. > If it doesn't then your arch is broken and needs to be fixed. > > Changing this one spot is pointless because such assumptions > are all over the kernel. Documentation/atomic_bitops.txt and the asm-generic implementaton disagree with you, so this isn't quite as simple as "your arch is broken" :-) - Hector From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A405C19F2C for ; Tue, 16 Aug 2022 05:38:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zsWPiy+2w+VVo2BJoihgwOSI0Ehn0Oem1/Cd1wWcP9o=; b=3DkvLw0vQZmQ3W sA8KSSx0fGpa8OKXB7iXuiJXT9L1qKQc5UiafJZL1PlZG4PDidg2kSlnMExCJ9VspzTl4Jfk1z3Qb qNRvJqkehgW0QZC603Cpw4Hps7TgvC/RaKbeN484UjATNZH+Zgb3SuetZepyiIpV2GqaRaRxR9/16 xB9SyjAjnywp8ed0zUnQGuGCzKjCCLK8Rpac22HbA3hBWSzwj1kz0IxBhLtKwlNBLaRjb0lf9oQUs gXZpfTr2LWi9FF8F/QhnwYwdq/LJU6zGhF9aZiqAcgi6im/1FtJpcWvs0fTVCRhABT2PVqP8WvHPv hcT7U4cMoXGoNPP9OjTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oNpGr-00C7jA-8m; Tue, 16 Aug 2022 05:37:45 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oNpGn-00C7eI-5g for linux-arm-kernel@lists.infradead.org; Tue, 16 Aug 2022 05:37:42 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: marcan@marcan.st) by mail.marcansoft.com (Postfix) with ESMTPSA id 8F51B447D8; Tue, 16 Aug 2022 05:37:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=marcan.st; s=default; t=1660628259; bh=klFJScQtPdSGYcjCrTuLd0vmp+BxBQY7IprafXE1WXI=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=UYrY0eQvg03ffFpSW8MPibeWDmSlQ/yIUpjNy0a6r8M5yYDkXuuY2mgbvXGRIvUKV GKz0u6P8fP347aqNjdqhKCYZ0hFw97bxhf4/fNsEOEsk0hKwi3mcerFSmxESOJtObT ehE5TDjXiRASB0Tulir8a5ysB6oWfFiNPMGbPFaEHIkqpw3cbHaGwhpgxXXTL8zzPZ Rk7YU9AniJOpzHeMzqoGsi2OYvQ/6Rcogj3a4cY18e2p+OdyQYoMJRUkxaqMCUj3Q8 sR2f1ZuFZuhOHeN4Zq5QAjXQLlzT+m6x0uN6nV8Fbd17jp7/ETXkceDCDFThJLdMRQ HVN0NlTWFLFlw== Message-ID: <923f9638-d443-cb8e-104f-41a7f34fa25c@marcan.st> Date: Tue, 16 Aug 2022 14:37:33 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH] workqueue: Fix memory ordering race in queue_work*() Content-Language: es-ES To: Herbert Xu , Linus Torvalds Cc: tj@kernel.org, will@kernel.org, peterz@infradead.org, jirislaby@kernel.org, maz@kernel.org, mark.rutland@arm.com, boqun.feng@gmail.com, catalin.marinas@arm.com, oneukum@suse.com, roman.penyaev@profitbricks.com, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: From: Hector Martin In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220815_223741_539002_D5AB7537 X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16/08/2022 13.14, Herbert Xu wrote: > Hector Martin wrote: >> >> This has been broken since the dawn of time, and it was incompletely >> fixed by 346c09f80459, which added the necessary barriers in the work >> execution path but failed to account for the missing barrier in the >> test_and_set_bit() failure case. Fix it by switching to >> atomic_long_fetch_or(), which does have unconditional barrier semantics >> regardless of whether the bit was already set or not (this is actually >> just test_and_set_bit() minus the early exit path). > > test_and_set_bit is supposed to contain a full memory barrier. > If it doesn't then your arch is broken and needs to be fixed. > > Changing this one spot is pointless because such assumptions > are all over the kernel. Documentation/atomic_bitops.txt and the asm-generic implementaton disagree with you, so this isn't quite as simple as "your arch is broken" :-) - Hector _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel