From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Rybchenko Subject: Re: [PATCH] pci/uio: enable prefetchable resources mapping Date: Thu, 1 Feb 2018 13:08:55 +0300 Message-ID: <92cd1b4c-a06c-16a3-7d03-3b92b1faa2b9@solarflare.com> References: <1517447902-4166-1-git-send-email-changpeng.liu@intel.com> <20180201095934.GA13452@bricha3-MOBL3.ger.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Cc: , To: Bruce Richardson , Changpeng Liu Return-path: Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 9DD17271 for ; Thu, 1 Feb 2018 11:09:05 +0100 (CET) In-Reply-To: <20180201095934.GA13452@bricha3-MOBL3.ger.corp.intel.com> Content-Language: en-GB List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 02/01/2018 12:59 PM, Bruce Richardson wrote: > On Thu, Feb 01, 2018 at 09:18:22AM +0800, Changpeng Liu wrote: >> For PCI prefetchable resources, Linux will create a >> write combined file as well, the library will try >> to map resourceX_wc file first, if the file does >> not exist, then it will map resourceX as usual. >> >> Signed-off-by: Changpeng Liu >> --- >> drivers/bus/pci/linux/pci_uio.c | 19 ++++++++++++++----- >> 1 file changed, 14 insertions(+), 5 deletions(-) >> > Hi, > > Given the lack of ordering guarantees with write-combined memory, I > would have thought that this is very risky to do without a complete set > of changes inside the PMDs to add in the necessary memory barriers to > ensure ordering of operations to the BARs. Therefore, instead of > mapping one file or another, I think the change should be made to map > *both* in DPDK if available. Then each driver can chose whether to write > a given device register using uncacheable memory type or write-combining > memory type + any appropriate barriers. > > For example, with many NICs the initialization of the device involves > many register writes in a pretty defined order, so wc operations are > probably to suitable as performance is not a concern. However, for data > path operations, a driver may chose to use wc memory for the occasional > device writes there, for performance reasons. +1 I think so too that it would be useful to have both mappings available and allow driver to choose which one to use.