* [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl
@ 2021-10-04 13:12 Robert Marko
2021-10-04 13:12 ` [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code Robert Marko
2021-10-08 6:12 ` [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Stefan Roese
0 siblings, 2 replies; 6+ messages in thread
From: Robert Marko @ 2021-10-04 13:12 UTC (permalink / raw)
To: u-boot, sr; +Cc: Robert Marko
Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
CP1 pins are only used for the SMI bus and the MSS I2C, all other
pins are just GPIO-s.
Due to this being set completely wrong, the pinctrl was actually
ended up being hardcoded in the board_early_init_f() step so that
SMI would work.
That is obviously not the right thing to do, so convert the register
hex values that were being written to individual pin modes and set it
in the DTS.
Add the SMI pins to the CP1 MDIO node as otherwise CP1 pinctrl does
not get probed without an consumer.
Fixes: 2ae2b8a2 ("arm: mvebu: Initial iEi Puzzle-M801 support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
arch/arm/dts/armada-8040-puzzle-m801.dts | 36 ++++++++++--------------
1 file changed, 15 insertions(+), 21 deletions(-)
diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts b/arch/arm/dts/armada-8040-puzzle-m801.dts
index 510fb84d5a..9e714c33e9 100644
--- a/arch/arm/dts/armada-8040-puzzle-m801.dts
+++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
@@ -243,6 +243,9 @@
&cp1_mdio {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&cp1_smi_pins>;
+
cp1_ge_phy0: ethernet-phy@3 {
reg = <1>;
};
@@ -292,33 +295,24 @@
/*
* MPP Bus:
* [0-5] TDM
- * [6,7] CP1_UART 0
- * [8] CP1 10G SFP LOS
- * [9] CP1 10G PHY RESET
- * [10] CP1 10G SFP TX Disable
- * [11] CP1 10G SFP Mode
- * [12] SPI1 CS1n
- * [13] SPI1 MISO (TDM and SPI ROM shared)
- * [14] SPI1 CS0n
- * [15] SPI1 MOSI (TDM and SPI ROM shared)
- * [16] SPI1 CLK (TDM and SPI ROM shared)
- * [24] CP1 2.5G SFP TX Disable
- * [26] CP0 10G SFP TX Fault
- * [27] CP0 10G SFP Mode
- * [28] CP0 10G SFP LOS
- * [29] CP0 10G SFP TX Disable
- * [30] USB Over current indication
- * [31] 10G Port 0 phy reset
+ * [27-28] SMI
+ * [29-30] CP1 MSS I2C
+ * [6-26, 31] GPIO
* [32-62] = 0xff: Keep default CP1_shared_pins:
*/
/* 0 1 2 3 4 5 6 7 8 9 */
- pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0
- 0x0 0x0 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff
- 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x0 0x0 0x0
- 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+ pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
+ 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x8 0x8 0x8
+ 0x8 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff>;
+
+ cp1_smi_pins: cp1-smi-pins {
+ marvell,pins = < 27 28 >;
+ marvell,function = <8>;
+ };
};
&ap_spi0 {
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code
2021-10-04 13:12 [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Robert Marko
@ 2021-10-04 13:12 ` Robert Marko
2021-10-08 6:13 ` Stefan Roese
2021-10-08 6:12 ` [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Stefan Roese
1 sibling, 1 reply; 6+ messages in thread
From: Robert Marko @ 2021-10-04 13:12 UTC (permalink / raw)
To: u-boot, sr; +Cc: Robert Marko
Since the CP1 pinctrl is not properly set in the DTS, there is no
need for setting the pinctrl by writing hardcoded values to the MPP
registers.
So, drop the code relating to that.
Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
board/Marvell/mvebu_armada-8k/board.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index 7da5d9f96b..77c7dd7ab0 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -35,17 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define I2C_IO_REG_CL ((1 << I2C_IO_REG_0_USB_H0_CL) | \
(1 << I2C_IO_REG_0_USB_H1_CL))
-/*
- * Information specific to the iEi Puzzle-M801 board.
- */
-
-/* Internal configuration registers */
-#define CP1_CONF_REG_BASE 0xf4440000
-#define CONF_REG_MPP0 0x0
-#define CONF_REG_MPP1 0x4
-#define CONF_REG_MPP2 0x8
-#define CONF_REG_MPP3 0xC
-
static int usb_enabled = 0;
/* Board specific xHCI dis-/enable code */
@@ -153,14 +142,7 @@ int board_xhci_enable(fdt_addr_t base)
int board_early_init_f(void)
{
- /* Initialize some platform specific memory locations */
- if (of_machine_is_compatible("marvell,armada8040-puzzle-m801")) {
- /* MPP setup */
- writel(0x00444444, CP1_CONF_REG_BASE + CONF_REG_MPP0);
- writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP1);
- writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP2);
- writel(0x08888000, CP1_CONF_REG_BASE + CONF_REG_MPP3);
- }
+ /* Nothing to do yet */
return 0;
}
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl
2021-10-04 13:12 [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Robert Marko
2021-10-04 13:12 ` [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code Robert Marko
@ 2021-10-08 6:12 ` Stefan Roese
2021-10-08 9:20 ` Stefan Roese
1 sibling, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2021-10-08 6:12 UTC (permalink / raw)
To: Robert Marko, u-boot
On 04.10.21 15:12, Robert Marko wrote:
> Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
> CP1 pins are only used for the SMI bus and the MSS I2C, all other
> pins are just GPIO-s.
>
> Due to this being set completely wrong, the pinctrl was actually
> ended up being hardcoded in the board_early_init_f() step so that
> SMI would work.
>
> That is obviously not the right thing to do, so convert the register
> hex values that were being written to individual pin modes and set it
> in the DTS.
> Add the SMI pins to the CP1 MDIO node as otherwise CP1 pinctrl does
> not get probed without an consumer.
>
> Fixes: 2ae2b8a2 ("arm: mvebu: Initial iEi Puzzle-M801 support")
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/dts/armada-8040-puzzle-m801.dts | 36 ++++++++++--------------
> 1 file changed, 15 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts b/arch/arm/dts/armada-8040-puzzle-m801.dts
> index 510fb84d5a..9e714c33e9 100644
> --- a/arch/arm/dts/armada-8040-puzzle-m801.dts
> +++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
> @@ -243,6 +243,9 @@
>
> &cp1_mdio {
> status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&cp1_smi_pins>;
> +
> cp1_ge_phy0: ethernet-phy@3 {
> reg = <1>;
> };
> @@ -292,33 +295,24 @@
> /*
> * MPP Bus:
> * [0-5] TDM
> - * [6,7] CP1_UART 0
> - * [8] CP1 10G SFP LOS
> - * [9] CP1 10G PHY RESET
> - * [10] CP1 10G SFP TX Disable
> - * [11] CP1 10G SFP Mode
> - * [12] SPI1 CS1n
> - * [13] SPI1 MISO (TDM and SPI ROM shared)
> - * [14] SPI1 CS0n
> - * [15] SPI1 MOSI (TDM and SPI ROM shared)
> - * [16] SPI1 CLK (TDM and SPI ROM shared)
> - * [24] CP1 2.5G SFP TX Disable
> - * [26] CP0 10G SFP TX Fault
> - * [27] CP0 10G SFP Mode
> - * [28] CP0 10G SFP LOS
> - * [29] CP0 10G SFP TX Disable
> - * [30] USB Over current indication
> - * [31] 10G Port 0 phy reset
> + * [27-28] SMI
> + * [29-30] CP1 MSS I2C
> + * [6-26, 31] GPIO
> * [32-62] = 0xff: Keep default CP1_shared_pins:
> */
> /* 0 1 2 3 4 5 6 7 8 9 */
> - pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0
> - 0x0 0x0 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff
> - 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x0 0x0 0x0
> - 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
> + pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0
> + 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
> + 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x8 0x8 0x8
> + 0x8 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
> 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
> 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
> 0xff 0xff 0xff>;
> +
> + cp1_smi_pins: cp1-smi-pins {
> + marvell,pins = < 27 28 >;
> + marvell,function = <8>;
> + };
> };
>
> &ap_spi0 {
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code
2021-10-04 13:12 ` [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code Robert Marko
@ 2021-10-08 6:13 ` Stefan Roese
2021-10-08 9:20 ` Stefan Roese
0 siblings, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2021-10-08 6:13 UTC (permalink / raw)
To: Robert Marko, u-boot
On 04.10.21 15:12, Robert Marko wrote:
> Since the CP1 pinctrl is not properly set in the DTS, there is no
> need for setting the pinctrl by writing hardcoded values to the MPP
> registers.
>
> So, drop the code relating to that.
>
> Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking")
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> board/Marvell/mvebu_armada-8k/board.c | 20 +-------------------
> 1 file changed, 1 insertion(+), 19 deletions(-)
>
> diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
> index 7da5d9f96b..77c7dd7ab0 100644
> --- a/board/Marvell/mvebu_armada-8k/board.c
> +++ b/board/Marvell/mvebu_armada-8k/board.c
> @@ -35,17 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
> #define I2C_IO_REG_CL ((1 << I2C_IO_REG_0_USB_H0_CL) | \
> (1 << I2C_IO_REG_0_USB_H1_CL))
>
> -/*
> - * Information specific to the iEi Puzzle-M801 board.
> - */
> -
> -/* Internal configuration registers */
> -#define CP1_CONF_REG_BASE 0xf4440000
> -#define CONF_REG_MPP0 0x0
> -#define CONF_REG_MPP1 0x4
> -#define CONF_REG_MPP2 0x8
> -#define CONF_REG_MPP3 0xC
> -
> static int usb_enabled = 0;
>
> /* Board specific xHCI dis-/enable code */
> @@ -153,14 +142,7 @@ int board_xhci_enable(fdt_addr_t base)
>
> int board_early_init_f(void)
> {
> - /* Initialize some platform specific memory locations */
> - if (of_machine_is_compatible("marvell,armada8040-puzzle-m801")) {
> - /* MPP setup */
> - writel(0x00444444, CP1_CONF_REG_BASE + CONF_REG_MPP0);
> - writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP1);
> - writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP2);
> - writel(0x08888000, CP1_CONF_REG_BASE + CONF_REG_MPP3);
> - }
> + /* Nothing to do yet */
>
> return 0;
> }
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl
2021-10-08 6:12 ` [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Stefan Roese
@ 2021-10-08 9:20 ` Stefan Roese
0 siblings, 0 replies; 6+ messages in thread
From: Stefan Roese @ 2021-10-08 9:20 UTC (permalink / raw)
To: Robert Marko, u-boot
On 08.10.21 08:12, Stefan Roese wrote:
> On 04.10.21 15:12, Robert Marko wrote:
>> Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
>> CP1 pins are only used for the SMI bus and the MSS I2C, all other
>> pins are just GPIO-s.
>>
>> Due to this being set completely wrong, the pinctrl was actually
>> ended up being hardcoded in the board_early_init_f() step so that
>> SMI would work.
>>
>> That is obviously not the right thing to do, so convert the register
>> hex values that were being written to individual pin modes and set it
>> in the DTS.
>> Add the SMI pins to the CP1 MDIO node as otherwise CP1 pinctrl does
>> not get probed without an consumer.
>>
>> Fixes: 2ae2b8a2 ("arm: mvebu: Initial iEi Puzzle-M801 support")
>> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
>
> Reviewed-by: Stefan Roese <sr@denx.de>
Applied to u-boot-marvell/master
Thanks,
Stefan
> Thanks,
> Stefan
>
>> ---
>> arch/arm/dts/armada-8040-puzzle-m801.dts | 36 ++++++++++--------------
>> 1 file changed, 15 insertions(+), 21 deletions(-)
>>
>> diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts
>> b/arch/arm/dts/armada-8040-puzzle-m801.dts
>> index 510fb84d5a..9e714c33e9 100644
>> --- a/arch/arm/dts/armada-8040-puzzle-m801.dts
>> +++ b/arch/arm/dts/armada-8040-puzzle-m801.dts
>> @@ -243,6 +243,9 @@
>> &cp1_mdio {
>> status = "okay";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&cp1_smi_pins>;
>> +
>> cp1_ge_phy0: ethernet-phy@3 {
>> reg = <1>;
>> };
>> @@ -292,33 +295,24 @@
>> /*
>> * MPP Bus:
>> * [0-5] TDM
>> - * [6,7] CP1_UART 0
>> - * [8] CP1 10G SFP LOS
>> - * [9] CP1 10G PHY RESET
>> - * [10] CP1 10G SFP TX Disable
>> - * [11] CP1 10G SFP Mode
>> - * [12] SPI1 CS1n
>> - * [13] SPI1 MISO (TDM and SPI ROM shared)
>> - * [14] SPI1 CS0n
>> - * [15] SPI1 MOSI (TDM and SPI ROM shared)
>> - * [16] SPI1 CLK (TDM and SPI ROM shared)
>> - * [24] CP1 2.5G SFP TX Disable
>> - * [26] CP0 10G SFP TX Fault
>> - * [27] CP0 10G SFP Mode
>> - * [28] CP0 10G SFP LOS
>> - * [29] CP0 10G SFP TX Disable
>> - * [30] USB Over current indication
>> - * [31] 10G Port 0 phy reset
>> + * [27-28] SMI
>> + * [29-30] CP1 MSS I2C
>> + * [6-26, 31] GPIO
>> * [32-62] = 0xff: Keep default CP1_shared_pins:
>> */
>> /* 0 1 2 3 4 5 6 7 8 9 */
>> - pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0
>> - 0x0 0x0 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff
>> - 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x0 0x0 0x0
>> - 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
>> + pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0
>> + 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
>> + 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x8 0x8 0x8
>> + 0x8 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
>> 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
>> 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
>> 0xff 0xff 0xff>;
>> +
>> + cp1_smi_pins: cp1-smi-pins {
>> + marvell,pins = < 27 28 >;
>> + marvell,function = <8>;
>> + };
>> };
>> &ap_spi0 {
>>
>
>
> Viele Grüße,
> Stefan
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code
2021-10-08 6:13 ` Stefan Roese
@ 2021-10-08 9:20 ` Stefan Roese
0 siblings, 0 replies; 6+ messages in thread
From: Stefan Roese @ 2021-10-08 9:20 UTC (permalink / raw)
To: Robert Marko, u-boot
On 08.10.21 08:13, Stefan Roese wrote:
> On 04.10.21 15:12, Robert Marko wrote:
>> Since the CP1 pinctrl is not properly set in the DTS, there is no
>> need for setting the pinctrl by writing hardcoded values to the MPP
>> registers.
>>
>> So, drop the code relating to that.
>>
>> Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for
>> initializing iEi Puzzle-M801 networking")
>> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
>
> Reviewed-by: Stefan Roese <sr@denx.de>
Applied to u-boot-marvell/master
Thanks,
Stefan
>
> Thanks,
> Stefan
>
>> ---
>> board/Marvell/mvebu_armada-8k/board.c | 20 +-------------------
>> 1 file changed, 1 insertion(+), 19 deletions(-)
>>
>> diff --git a/board/Marvell/mvebu_armada-8k/board.c
>> b/board/Marvell/mvebu_armada-8k/board.c
>> index 7da5d9f96b..77c7dd7ab0 100644
>> --- a/board/Marvell/mvebu_armada-8k/board.c
>> +++ b/board/Marvell/mvebu_armada-8k/board.c
>> @@ -35,17 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
>> #define I2C_IO_REG_CL ((1 << I2C_IO_REG_0_USB_H0_CL) | \
>> (1 << I2C_IO_REG_0_USB_H1_CL))
>> -/*
>> - * Information specific to the iEi Puzzle-M801 board.
>> - */
>> -
>> -/* Internal configuration registers */
>> -#define CP1_CONF_REG_BASE 0xf4440000
>> -#define CONF_REG_MPP0 0x0
>> -#define CONF_REG_MPP1 0x4
>> -#define CONF_REG_MPP2 0x8
>> -#define CONF_REG_MPP3 0xC
>> -
>> static int usb_enabled = 0;
>> /* Board specific xHCI dis-/enable code */
>> @@ -153,14 +142,7 @@ int board_xhci_enable(fdt_addr_t base)
>> int board_early_init_f(void)
>> {
>> - /* Initialize some platform specific memory locations */
>> - if (of_machine_is_compatible("marvell,armada8040-puzzle-m801")) {
>> - /* MPP setup */
>> - writel(0x00444444, CP1_CONF_REG_BASE + CONF_REG_MPP0);
>> - writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP1);
>> - writel(0x00000000, CP1_CONF_REG_BASE + CONF_REG_MPP2);
>> - writel(0x08888000, CP1_CONF_REG_BASE + CONF_REG_MPP3);
>> - }
>> + /* Nothing to do yet */
>> return 0;
>> }
>>
>
>
> Viele Grüße,
> Stefan
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-08 9:20 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-04 13:12 [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Robert Marko
2021-10-04 13:12 ` [PATCH 2/2] arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code Robert Marko
2021-10-08 6:13 ` Stefan Roese
2021-10-08 9:20 ` Stefan Roese
2021-10-08 6:12 ` [PATCH 1/2] arm: mvebu: dts: m801: correct CP1 pinctrl Stefan Roese
2021-10-08 9:20 ` Stefan Roese
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