From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Xing, Beilei" Subject: Re: [PATCH v3 2/5] net/i40e: parse QinQ pattern Date: Wed, 29 Mar 2017 02:46:14 +0000 Message-ID: <94479800C636CB44BD422CB454846E01315C42A7@SHSMSX101.ccr.corp.intel.com> References: <1490287113-8895-1-git-send-email-bernard.iremonger@intel.com> <1490718059-380-3-git-send-email-bernard.iremonger@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "Zhang, Helin" , "Lu, Wenzhuo" To: "Iremonger, Bernard" , "dev@dpdk.org" , "Wu, Jingjing" Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 64FA21396 for ; Wed, 29 Mar 2017 04:46:20 +0200 (CEST) In-Reply-To: <1490718059-380-3-git-send-email-bernard.iremonger@intel.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Bernard, > -----Original Message----- > From: Iremonger, Bernard > Sent: Wednesday, March 29, 2017 12:21 AM > To: dev@dpdk.org; Xing, Beilei ; Wu, Jingjing > > Cc: Zhang, Helin ; Lu, Wenzhuo > ; Iremonger, Bernard > > Subject: [PATCH v3 2/5] net/i40e: parse QinQ pattern >=20 > add QinQ pattern. > add i40e_flow_parse_qinq_pattern function. > add i40e_flow_parse_qinq_filter function. >=20 > Signed-off-by: Bernard Iremonger > --- > drivers/net/i40e/i40e_flow.c | 187 > ++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 185 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c > index be243e172..39b09ead5 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > @@ -1,7 +1,7 @@ > /*- > * BSD LICENSE > * > - * Copyright (c) 2016 Intel Corporation. All rights reserved. > + * Copyright (c) 2016-2017 Intel Corporation. All rights reserved. > * > * Redistribution and use in source and binary forms, with or without > * modification, are permitted provided that the following conditions > @@ -128,6 +128,18 @@ static int i40e_flow_destroy_tunnel_filter(struct > i40e_pf *pf, static int i40e_flow_flush_fdir_filter(struct i40e_pf *pf);= static > int i40e_flow_flush_ethertype_filter(struct i40e_pf *pf); static int > i40e_flow_flush_tunnel_filter(struct i40e_pf *pf); > +static int > +i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev, > + const struct rte_flow_attr *attr, > + const struct rte_flow_item pattern[], > + const struct rte_flow_action actions[], > + struct rte_flow_error *error, > + union i40e_filter_t *filter); > +static int > +i40e_flow_parse_qinq_pattern(__rte_unused struct rte_eth_dev *dev, > + const struct rte_flow_item *pattern, > + struct rte_flow_error *error, > + struct i40e_tunnel_filter_conf *filter); >=20 > const struct rte_flow_ops i40e_flow_ops =3D { > .validate =3D i40e_flow_validate, > @@ -318,6 +330,14 @@ static enum rte_flow_item_type pattern_mpls_4[] =3D > { > RTE_FLOW_ITEM_TYPE_END, > }; >=20 > +/* Pattern matched QINQ */ > +static enum rte_flow_item_type pattern_qinq_1[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_VLAN, > + RTE_FLOW_ITEM_TYPE_VLAN, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > static struct i40e_valid_pattern i40e_supported_patterns[] =3D { > /* Ethertype */ > { pattern_ethertype, i40e_flow_parse_ethertype_filter }, @@ -348,6 > +368,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] =3D = { > { pattern_mpls_2, i40e_flow_parse_mpls_filter }, > { pattern_mpls_3, i40e_flow_parse_mpls_filter }, > { pattern_mpls_4, i40e_flow_parse_mpls_filter }, > + /* QINQ */ > + { pattern_qinq_1, i40e_flow_parse_qinq_filter }, > }; >=20 > #define NEXT_ITEM_OF_ACTION(act, actions, index) = \ > @@ -1171,7 +1193,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev > *dev, > return 0; > } >=20 > -/* Parse to get the action info of a tunnle filter > +/* Parse to get the action info of a tunnel filter > * Tunnel action only supports PF, VF and QUEUE. > */ > static int > @@ -1748,6 +1770,167 @@ i40e_flow_parse_mpls_filter(struct rte_eth_dev > *dev, } >=20 > static int > +i40e_flow_parse_qinq_pattern(__rte_unused struct rte_eth_dev *dev, > + const struct rte_flow_item *pattern, > + struct rte_flow_error *error, > + struct i40e_tunnel_filter_conf *filter) { > + const struct rte_flow_item *item =3D pattern; > + const struct rte_flow_item_eth *eth_spec; > + const struct rte_flow_item_eth *eth_mask; > + const struct rte_flow_item_eth *i_eth_spec =3D NULL; > + const struct rte_flow_item_eth *i_eth_mask =3D NULL; > + const struct rte_flow_item_vlan *vlan_spec =3D NULL; > + const struct rte_flow_item_vlan *vlan_mask =3D NULL; > + const struct rte_flow_item_vlan *i_vlan_spec =3D NULL; > + const struct rte_flow_item_vlan *o_vlan_spec =3D NULL; > + > + enum rte_flow_item_type item_type; > + bool vlan_flag =3D 0; Seems vlan_flag is not used at last. > + > + for (; item->type !=3D RTE_FLOW_ITEM_TYPE_END; item++) { > + if (item->last) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Not support range"); > + return -rte_errno; > + } > + item_type =3D item->type; > + switch (item_type) { > + case RTE_FLOW_ITEM_TYPE_ETH: > + eth_spec =3D (const struct rte_flow_item_eth *)item- > >spec; > + eth_mask =3D (const struct rte_flow_item_eth *)item- > >mask; > + if ((!eth_spec && eth_mask) || > + (eth_spec && !eth_mask)) { > + rte_flow_error_set(error, EINVAL, > + > RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid ether spec/mask"); > + return -rte_errno; > + } > + > + if (eth_spec && eth_mask) { > + /* DST address of inner MAC shouldn't be > masked. > + * SRC address of Inner MAC should be > masked. > + */ > + if (!is_broadcast_ether_addr(ð_mask- > >dst) || > + !is_zero_ether_addr(ð_mask->src) || > + eth_mask->type) { > + rte_flow_error_set(error, EINVAL, > + > RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid ether spec/mask"); > + return -rte_errno; > + } > + > + rte_memcpy(&filter->outer_mac, > + ð_spec->dst, > + ETHER_ADDR_LEN); > + } > + > + i_eth_spec =3D eth_spec; > + i_eth_mask =3D eth_mask; > + break; > + case RTE_FLOW_ITEM_TYPE_VLAN: > + vlan_spec =3D > + (const struct rte_flow_item_vlan *)item- > >spec; > + vlan_mask =3D > + (const struct rte_flow_item_vlan *)item- > >mask; > + > + if (!(vlan_spec && vlan_mask)) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid vlan item"); > + return -rte_errno; > + } > + > + if (!vlan_flag) { > + o_vlan_spec =3D vlan_spec; > + vlan_flag =3D 1; > + } else { > + i_vlan_spec =3D vlan_spec; > + vlan_flag =3D 0; > + } > + break; > + > + default: > + break; > + } > + } > + > + /* Check specification and mask to get the filter type */ > + if (vlan_spec && vlan_mask && > + (vlan_mask->tci =3D=3D rte_cpu_to_be_16(I40E_TCI_MASK))) { > + /* There is an inner and outer vlan */ > + filter->outer_vlan =3D rte_be_to_cpu_16(o_vlan_spec->tci) > + & I40E_TCI_MASK; > + filter->inner_vlan =3D rte_be_to_cpu_16(i_vlan_spec->tci) > + & I40E_TCI_MASK; > + if (i_eth_spec && i_eth_mask) > + filter->filter_type =3D > + I40E_TUNNEL_FILTER_CUSTOM_QINQ; > + else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + NULL, > + "Invalid filter type"); > + return -rte_errno; > + } > + } else if ((!vlan_spec && !vlan_mask) || > + (vlan_spec && vlan_mask && vlan_mask->tci =3D=3D 0x0)) { > + if (i_eth_spec && i_eth_mask) { > + filter->filter_type =3D > I40E_TUNNEL_FILTER_CUSTOM_QINQ; > + } else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, NULL, > + "Invalid filter type"); > + return -rte_errno; > + } > + } else { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, NULL, > + "Not supported by tunnel filter."); > + return -rte_errno; > + } > + > + filter->tunnel_type =3D I40E_TUNNEL_TYPE_QINQ; > + > + return 0; > +} > + > +static int > +i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev, > + const struct rte_flow_attr *attr, > + const struct rte_flow_item pattern[], > + const struct rte_flow_action actions[], > + struct rte_flow_error *error, > + union i40e_filter_t *filter) > +{ > + struct i40e_tunnel_filter_conf *tunnel_filter =3D > + &filter->consistent_tunnel_filter; > + int ret; > + > + ret =3D i40e_flow_parse_qinq_pattern(dev, pattern, > + error, tunnel_filter); > + if (ret) > + return ret; > + > + ret =3D i40e_flow_parse_tunnel_action(dev, actions, error, > tunnel_filter); > + if (ret) > + return ret; > + > + ret =3D i40e_flow_parse_attr(attr, error); > + if (ret) > + return ret; > + > + cons_filter_type =3D RTE_ETH_FILTER_TUNNEL; > + > + return ret; > +} > + > +static int > i40e_flow_validate(struct rte_eth_dev *dev, > const struct rte_flow_attr *attr, > const struct rte_flow_item pattern[], > -- > 2.11.0