Re: [PATCH 1/3] target/arm: keep translation start level unsigned - Rémi Denis-Courmont

From: "Rémi Denis-Courmont" <remi@remlab.net>
To: qemu-arm@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org, remi.denis.courmont@huawei.com
Subject: Re: [PATCH 1/3] target/arm: keep translation start level unsigned
Date: Thu, 31 Dec 2020 11:59:34 +0200	[thread overview]
Message-ID: <9468010.vzF1F9XyNR@philogene> (raw)
In-Reply-To: <002743e6-10d3-88b3-961a-8571efb4d1ed@linaro.org>

Le jeudi 31 décembre 2020, 00:38:14 EET Richard Henderson a écrit :
> On 12/30/20 2:10 PM, Richard Henderson wrote:
> > On 12/18/20 6:33 AM, remi.denis.courmont@huawei.com wrote:
> >> From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> >> 
> >> Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
> >> ---
> >> 
> >>  target/arm/helper.c | 14 ++++++--------
> >>  1 file changed, 6 insertions(+), 8 deletions(-)
> > 
> > The patch does more than what is described above.
> > 
> >> diff --git a/target/arm/helper.c b/target/arm/helper.c
> >> index df195c314c..b927e53ab0 100644
> >> --- a/target/arm/helper.c
> >> +++ b/target/arm/helper.c
> >> 
> >> @@ -10821,17 +10821,12 @@ do_fault:
> >>   * Returns true if the suggested S2 translation parameters are OK and
> >>   * false otherwise.
> >>   */
> >> 
> >> -static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
> >> +static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, uint32_t
> >> level,
> >> 
> >>                                 int inputsize, int stride)
> >>  
> >>  {
> >>  
> >>      const int grainsize = stride + 3;
> >>      int startsizecheck;
> >> 
> >> -    /* Negative levels are never allowed.  */
> >> -    if (level < 0) {
> >> -        return false;
> >> -    }
> >> -
> > 
> > I would expect this to be the only hunk from the patch description. 
> > Probably changing this negative check to a >= 3 check.
> 
> Having read the next patch, I think you should drop this type change.
> 
> >> @@ -11203,7 +11201,7 @@ static bool get_phys_addr_lpae(CPUARMState *env,
> >> uint64_t address,>> 
> >>          if (!aarch64 || stride == 9) {
> >>          
> >>              /* AArch32 or 4KB pages */
> >> 
> >> -            startlevel = 2 - sl0;
> >> +            startlevel = (2 - sl0) & 3;
> 
> This hunk belongs with the next patch, implementing TTST, and should be
> conditional.  I.e.
> 
>     if (stride == 9) {
>         startlevel = 2 - sl0;
>         if (aarch64 &&
>             cpu_isar_feature(aa64_st, env_archcpu(env)) {
>             startlevel &= 3;
>         }

You can do that but:
1) Nothing in the spec says that SL0 == b11 without ST means start level -1. 
It's undefined, and I don't see any reasons to treat it differently than with 
ST.
2) Functionally, checking for ST seems to belong naturally within 
check_s2_mmu_setup() in this particular case.

>     ...
> 
> 
> r~

-- 
Rémi Denis-Courmont