From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Ujfalusi Subject: Re: [PATCH] net: phy: at803x: disable delay only for RGMII mode Date: Thu, 14 Feb 2019 15:22:28 +0200 Message-ID: <96271de7-bda1-a86a-a78e-e132bc097efb@ti.com> References: <20190212141922.12849-1-vkoul@kernel.org> <20190213131206.GA460@centauri.lan> <20190213132900.GA24589@lunn.ch> <1ab5edac-a36c-9dc5-52e5-dbd3b70e7728@free.fr> <20190213174034.GA6954@centauri.lan> <3356ff05-8d08-591e-03bf-9d846f79097b@ti.com> <20190214123922.GA28897@centauri.ideon.se> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190214123922.GA28897@centauri.ideon.se> Content-Language: en-US Sender: netdev-owner@vger.kernel.org To: Niklas Cassel Cc: Marc Gonzalez , Andrew Lunn , Florian Fainelli , Vinod Koul , David S Miller , linux-arm-msm@vger.kernel.org, Bjorn Andersson , netdev@vger.kernel.org, "Nori, Sekhar" List-Id: linux-arm-msm@vger.kernel.org Hi Niklas, On 14/02/2019 14.39, Niklas Cassel wrote: >>> So, I've rebased your old patch, see attachment. >>> I suggest that Peter test it on am335x-evm. >> >> with the patch + s/rgmii-txid/rgmii-id in the am335x-evmsk.dts ethernet >> is working. >> I don't have am335x-evm to test, but it has the same PHY as evmsk. >> > > Florian's concern was that this PHY driver looked at "phy-mode" from the > perspective of the MAC rather than the PHY. > However, if s/rgmii-txid/rgmii-id is the correct fix for am335x-evm, > then this means that this PHY driver was just broken. > > If the driver had misinterpreted the perspective, then the correct > fix for am335x-evm would have been s/rgmii-txid/rgmii-rxid. Not sure if I got this right, but: rgmii-id/txid/rxid is the delay mode between PHY and MAC, right? on the PHY node it is from the PHY perspective, right? The errata I have mentioned for am335x say: "The reset state of RGMII1_IDMODE (bit 4) and RGMII2_IDMODE (bit 5) in the GMII_SEL register enables internal delay mode on the transmit clock of the respective RGMII port. The AM335x device does not support internal delay mode, so RGMII1_IDMODE and RGMII2_IDMODE must be set to 1b." If the delay mode on the transmit clock is not working on the am335x, then this translate that the rxid needs to be enabled on the PHY side? But then why it worked when only the txid was enabled and rxid was not on the PHY side, and why it works if both txid and rxid is enabled? Just tried w/ your patch and setting rgmii-rxid for am335x-evmsk and ethernet is not working, it only works w/ rgmii-id (so both tx and rx delay is enabled on the PHY side?) > So considering that this driver seems to be really broken > (rather then just inverted perspective), > perhaps we can merge the patch I attached in my previous email after all? > (Together with a s/rgmii-txid/rgmii-id in the am335x-evmsk.dts.) at the same time am335x-evm.dts needs to have the same change and most likely other boards which uses the same PHY needs to be checked? PS: sorry for my lack of knowledge on the networking stuff... - Péter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F152C43381 for ; Thu, 14 Feb 2019 13:22:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2DB88218EA for ; Thu, 14 Feb 2019 13:22:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="IpqbzIX0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437012AbfBNNWR (ORCPT ); Thu, 14 Feb 2019 08:22:17 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:55696 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728582AbfBNNWQ (ORCPT ); Thu, 14 Feb 2019 08:22:16 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x1EDM6dj065898; Thu, 14 Feb 2019 07:22:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1550150526; bh=5RpabQCvDOREr4idCrHgNpkEtAewZviOrtIBGgECKOI=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=IpqbzIX0CHqV/Rkac5e+fHisUBjVLx7KIGadptfBSmwijd6VbkzJzc9AhjmdvbrXA I9U/91zJFu7ULc5+Y1udtucdiQwFXnArOF1eY6z4QKT+WKHb0onETgTzx/AuLzioHh VCH1whXKXO2cNtKSCFuXBSoO8bi71EREd0wUGOQc= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x1EDM5iC009086 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 14 Feb 2019 07:22:06 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Thu, 14 Feb 2019 07:22:05 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Thu, 14 Feb 2019 07:22:05 -0600 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1EDM2mN009739; Thu, 14 Feb 2019 07:22:03 -0600 Subject: Re: [PATCH] net: phy: at803x: disable delay only for RGMII mode To: Niklas Cassel CC: Marc Gonzalez , Andrew Lunn , Florian Fainelli , Vinod Koul , David S Miller , , Bjorn Andersson , , "Nori, Sekhar" References: <20190212141922.12849-1-vkoul@kernel.org> <20190213131206.GA460@centauri.lan> <20190213132900.GA24589@lunn.ch> <1ab5edac-a36c-9dc5-52e5-dbd3b70e7728@free.fr> <20190213174034.GA6954@centauri.lan> <3356ff05-8d08-591e-03bf-9d846f79097b@ti.com> <20190214123922.GA28897@centauri.ideon.se> From: Peter Ujfalusi Message-ID: <96271de7-bda1-a86a-a78e-e132bc097efb@ti.com> Date: Thu, 14 Feb 2019 15:22:28 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.0 MIME-Version: 1.0 In-Reply-To: <20190214123922.GA28897@centauri.ideon.se> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi Niklas, On 14/02/2019 14.39, Niklas Cassel wrote: >>> So, I've rebased your old patch, see attachment. >>> I suggest that Peter test it on am335x-evm. >> >> with the patch + s/rgmii-txid/rgmii-id in the am335x-evmsk.dts ethernet >> is working. >> I don't have am335x-evm to test, but it has the same PHY as evmsk. >> > > Florian's concern was that this PHY driver looked at "phy-mode" from the > perspective of the MAC rather than the PHY. > However, if s/rgmii-txid/rgmii-id is the correct fix for am335x-evm, > then this means that this PHY driver was just broken. > > If the driver had misinterpreted the perspective, then the correct > fix for am335x-evm would have been s/rgmii-txid/rgmii-rxid. Not sure if I got this right, but: rgmii-id/txid/rxid is the delay mode between PHY and MAC, right? on the PHY node it is from the PHY perspective, right? The errata I have mentioned for am335x say: "The reset state of RGMII1_IDMODE (bit 4) and RGMII2_IDMODE (bit 5) in the GMII_SEL register enables internal delay mode on the transmit clock of the respective RGMII port. The AM335x device does not support internal delay mode, so RGMII1_IDMODE and RGMII2_IDMODE must be set to 1b." If the delay mode on the transmit clock is not working on the am335x, then this translate that the rxid needs to be enabled on the PHY side? But then why it worked when only the txid was enabled and rxid was not on the PHY side, and why it works if both txid and rxid is enabled? Just tried w/ your patch and setting rgmii-rxid for am335x-evmsk and ethernet is not working, it only works w/ rgmii-id (so both tx and rx delay is enabled on the PHY side?) > So considering that this driver seems to be really broken > (rather then just inverted perspective), > perhaps we can merge the patch I attached in my previous email after all? > (Together with a s/rgmii-txid/rgmii-id in the am335x-evmsk.dts.) at the same time am335x-evm.dts needs to have the same change and most likely other boards which uses the same PHY needs to be checked? PS: sorry for my lack of knowledge on the networking stuff... - Péter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki