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From: "Cédric Le Goater" <clg@kaod.org>
To: Daniel Henrique Barboza <danielhb413@gmail.com>, <qemu-ppc@nongnu.org>
Cc: <qemu-devel@nongnu.org>, BALATON Zoltan <balaton@eik.bme.hu>
Subject: Re: [PATCH 01/19] ppc/ppc405: Remove taihu machine
Date: Wed, 3 Aug 2022 09:33:36 +0200	[thread overview]
Message-ID: <97866187-6115-aa6e-5792-70fd0ec41409@kaod.org> (raw)
In-Reply-To: <4e9b5e09-6178-cff6-4c5a-c558eefcccb9@gmail.com>

On 8/2/22 20:02, Daniel Henrique Barboza wrote:
> 
> 
> On 8/1/22 10:10, Cédric Le Goater wrote:
>> It has been deprecated since 7.0.
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>   docs/about/deprecated.rst    |   9 --
>>   docs/system/ppc/embedded.rst |   1 -
>>   hw/ppc/ppc405_boards.c       | 232 -----------------------------------
>>   3 files changed, 242 deletions(-)
>>
>> diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
>> index 7ee26626d5cf..2f9b41aaea48 100644
>> --- a/docs/about/deprecated.rst
>> +++ b/docs/about/deprecated.rst
>> @@ -233,15 +233,6 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
>>   better reflects the way this property affects all random data within
>>   the device tree blob, not just the ``kaslr-seed`` node.
>> -PPC 405 ``taihu`` machine (since 7.0)
>> -'''''''''''''''''''''''''''''''''''''
>> -
>> -The PPC 405 CPU is a system-on-a-chip, so all 405 machines are very similar,
>> -except for some external periphery. However, the periphery of the ``taihu``
>> -machine is hardly emulated at all (e.g. neither the LCD nor the USB part had
>> -been implemented), so there is not much value added by this board. Use the
>> -``ref405ep`` machine instead.
>> -
> 
> I believe we need to add a note in docs/about/removed-feature.rst as well.
> E.g. 50f97a0ec6e81b8 where the swift-bmc Aspeed machine was removed. The
> deprecated.rst entry was deleted and an entry in removed-features.rst was
> added.


Ah yes. I forgot. Fixed in v2.

Thanks,

C.


> 
> Don't worry re-sending the series just for that. I can fixup in the tree if
> this is the only observation for the series.
> 
> 
> Thanks,
> 
> 
> Daniel
> 
>>   ``pc-i440fx-1.4`` up to ``pc-i440fx-1.7`` (since 7.0)
>>   '''''''''''''''''''''''''''''''''''''''''''''''''''''
>> diff --git a/docs/system/ppc/embedded.rst b/docs/system/ppc/embedded.rst
>> index cfffbda24da9..af3b3d9fa460 100644
>> --- a/docs/system/ppc/embedded.rst
>> +++ b/docs/system/ppc/embedded.rst
>> @@ -6,5 +6,4 @@ Embedded family boards
>>   - ``ppce500``              generic paravirt e500 platform
>>   - ``ref405ep``             ref405ep
>>   - ``sam460ex``             aCube Sam460ex
>> -- ``taihu``                taihu
>>   - ``virtex-ml507``         Xilinx Virtex ML507 reference design
>> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
>> index a66ad05e3ac3..1a4e7588c584 100644
>> --- a/hw/ppc/ppc405_boards.c
>> +++ b/hw/ppc/ppc405_boards.c
>> @@ -342,241 +342,9 @@ static const TypeInfo ref405ep_type = {
>>       .class_init = ref405ep_class_init,
>>   };
>> -/*****************************************************************************/
>> -/* AMCC Taihu evaluation board */
>> -/* - PowerPC 405EP processor
>> - * - SDRAM               128 MB at 0x00000000
>> - * - Boot flash          2 MB   at 0xFFE00000
>> - * - Application flash   32 MB  at 0xFC000000
>> - * - 2 serial ports
>> - * - 2 ethernet PHY
>> - * - 1 USB 1.1 device    0x50000000
>> - * - 1 LCD display       0x50100000
>> - * - 1 CPLD              0x50100000
>> - * - 1 I2C EEPROM
>> - * - 1 I2C thermal sensor
>> - * - a set of LEDs
>> - * - bit-bang SPI port using GPIOs
>> - * - 1 EBC interface connector 0 0x50200000
>> - * - 1 cardbus controller + expansion slot.
>> - * - 1 PCI expansion slot.
>> - */
>> -typedef struct taihu_cpld_t taihu_cpld_t;
>> -struct taihu_cpld_t {
>> -    uint8_t reg0;
>> -    uint8_t reg1;
>> -};
>> -
>> -static uint64_t taihu_cpld_read(void *opaque, hwaddr addr, unsigned size)
>> -{
>> -    taihu_cpld_t *cpld;
>> -    uint32_t ret;
>> -
>> -    cpld = opaque;
>> -    switch (addr) {
>> -    case 0x0:
>> -        ret = cpld->reg0;
>> -        break;
>> -    case 0x1:
>> -        ret = cpld->reg1;
>> -        break;
>> -    default:
>> -        ret = 0;
>> -        break;
>> -    }
>> -
>> -    return ret;
>> -}
>> -
>> -static void taihu_cpld_write(void *opaque, hwaddr addr,
>> -                             uint64_t value, unsigned size)
>> -{
>> -    taihu_cpld_t *cpld;
>> -
>> -    cpld = opaque;
>> -    switch (addr) {
>> -    case 0x0:
>> -        /* Read only */
>> -        break;
>> -    case 0x1:
>> -        cpld->reg1 = value;
>> -        break;
>> -    default:
>> -        break;
>> -    }
>> -}
>> -
>> -static const MemoryRegionOps taihu_cpld_ops = {
>> -    .read = taihu_cpld_read,
>> -    .write = taihu_cpld_write,
>> -    .impl = {
>> -        .min_access_size = 1,
>> -        .max_access_size = 1,
>> -    },
>> -    .endianness = DEVICE_NATIVE_ENDIAN,
>> -};
>> -
>> -static void taihu_cpld_reset (void *opaque)
>> -{
>> -    taihu_cpld_t *cpld;
>> -
>> -    cpld = opaque;
>> -    cpld->reg0 = 0x01;
>> -    cpld->reg1 = 0x80;
>> -}
>> -
>> -static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
>> -{
>> -    taihu_cpld_t *cpld;
>> -    MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
>> -
>> -    cpld = g_new0(taihu_cpld_t, 1);
>> -    memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
>> -    memory_region_add_subregion(sysmem, base, cpld_memory);
>> -    qemu_register_reset(&taihu_cpld_reset, cpld);
>> -}
>> -
>> -static void taihu_405ep_init(MachineState *machine)
>> -{
>> -    MachineClass *mc = MACHINE_GET_CLASS(machine);
>> -    const char *bios_name = machine->firmware ?: BIOS_FILENAME;
>> -    const char *kernel_filename = machine->kernel_filename;
>> -    const char *initrd_filename = machine->initrd_filename;
>> -    char *filename;
>> -    MemoryRegion *sysmem = get_system_memory();
>> -    MemoryRegion *bios;
>> -    MemoryRegion *ram_memories = g_new(MemoryRegion, 2);
>> -    hwaddr ram_bases[2], ram_sizes[2];
>> -    long bios_size;
>> -    target_ulong kernel_base, initrd_base;
>> -    long kernel_size, initrd_size;
>> -    int linux_boot;
>> -    int fl_idx;
>> -    DriveInfo *dinfo;
>> -    DeviceState *uicdev;
>> -
>> -    if (machine->ram_size != mc->default_ram_size) {
>> -        char *sz = size_to_str(mc->default_ram_size);
>> -        error_report("Invalid RAM size, should be %s", sz);
>> -        g_free(sz);
>> -        exit(EXIT_FAILURE);
>> -    }
>> -
>> -    ram_bases[0] = 0;
>> -    ram_sizes[0] = 0x04000000;
>> -    memory_region_init_alias(&ram_memories[0], NULL,
>> -                             "taihu_405ep.ram-0", machine->ram, ram_bases[0],
>> -                             ram_sizes[0]);
>> -    ram_bases[1] = 0x04000000;
>> -    ram_sizes[1] = 0x04000000;
>> -    memory_region_init_alias(&ram_memories[1], NULL,
>> -                             "taihu_405ep.ram-1", machine->ram, ram_bases[1],
>> -                             ram_sizes[1]);
>> -    ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
>> -                  33333333, &uicdev, kernel_filename == NULL ? 0 : 1);
>> -    /* allocate and load BIOS */
>> -    fl_idx = 0;
>> -#if defined(USE_FLASH_BIOS)
>> -    dinfo = drive_get(IF_PFLASH, 0, fl_idx);
>> -    if (dinfo) {
>> -        bios_size = 2 * MiB;
>> -        pflash_cfi02_register(0xFFE00000,
>> -                              "taihu_405ep.bios", bios_size,
>> -                              blk_by_legacy_dinfo(dinfo),
>> -                              64 * KiB, 1,
>> -                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
>> -                              1);
>> -        fl_idx++;
>> -    } else
>> -#endif
>> -    {
>> -        bios = g_new(MemoryRegion, 1);
>> -        memory_region_init_rom(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
>> -                               &error_fatal);
>> -        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
>> -        if (filename) {
>> -            bios_size = load_image_size(filename,
>> -                                        memory_region_get_ram_ptr(bios),
>> -                                        BIOS_SIZE);
>> -            g_free(filename);
>> -            if (bios_size < 0) {
>> -                error_report("Could not load PowerPC BIOS '%s'", bios_name);
>> -                exit(1);
>> -            }
>> -            bios_size = (bios_size + 0xfff) & ~0xfff;
>> -            memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
>> -        } else if (!qtest_enabled()) {
>> -            error_report("Could not load PowerPC BIOS '%s'", bios_name);
>> -            exit(1);
>> -        }
>> -    }
>> -    /* Register Linux flash */
>> -    dinfo = drive_get(IF_PFLASH, 0, fl_idx);
>> -    if (dinfo) {
>> -        bios_size = 32 * MiB;
>> -        pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
>> -                              blk_by_legacy_dinfo(dinfo),
>> -                              64 * KiB, 1,
>> -                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
>> -                              1);
>> -        fl_idx++;
>> -    }
>> -    /* Register CLPD & LCD display */
>> -    taihu_cpld_init(sysmem, 0x50100000);
>> -    /* Load kernel */
>> -    linux_boot = (kernel_filename != NULL);
>> -    if (linux_boot) {
>> -        kernel_base = KERNEL_LOAD_ADDR;
>> -        /* now we can load the kernel */
>> -        kernel_size = load_image_targphys(kernel_filename, kernel_base,
>> -                                          machine->ram_size - kernel_base);
>> -        if (kernel_size < 0) {
>> -            error_report("could not load kernel '%s'", kernel_filename);
>> -            exit(1);
>> -        }
>> -        /* load initrd */
>> -        if (initrd_filename) {
>> -            initrd_base = INITRD_LOAD_ADDR;
>> -            initrd_size = load_image_targphys(initrd_filename, initrd_base,
>> -                                              machine->ram_size - initrd_base);
>> -            if (initrd_size < 0) {
>> -                error_report("could not load initial ram disk '%s'",
>> -                             initrd_filename);
>> -                exit(1);
>> -            }
>> -        } else {
>> -            initrd_base = 0;
>> -            initrd_size = 0;
>> -        }
>> -    } else {
>> -        kernel_base = 0;
>> -        kernel_size = 0;
>> -        initrd_base = 0;
>> -        initrd_size = 0;
>> -    }
>> -}
>> -
>> -static void taihu_class_init(ObjectClass *oc, void *data)
>> -{
>> -    MachineClass *mc = MACHINE_CLASS(oc);
>> -
>> -    mc->desc = "taihu";
>> -    mc->init = taihu_405ep_init;
>> -    mc->default_ram_size = 0x08000000;
>> -    mc->default_ram_id = "taihu_405ep.ram";
>> -    mc->deprecation_reason = "incomplete, use 'ref405ep' instead";
>> -}
>> -
>> -static const TypeInfo taihu_type = {
>> -    .name = MACHINE_TYPE_NAME("taihu"),
>> -    .parent = TYPE_MACHINE,
>> -    .class_init = taihu_class_init,
>> -};
>> -
>>   static void ppc405_machine_init(void)
>>   {
>>       type_register_static(&ref405ep_type);
>> -    type_register_static(&taihu_type);
>>   }
>>   type_init(ppc405_machine_init)



  reply	other threads:[~2022-08-03  7:36 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-01 13:10 [PATCH 00/19] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-01 13:10 ` [PATCH 01/19] ppc/ppc405: Remove taihu machine Cédric Le Goater
2022-08-02 18:02   ` Daniel Henrique Barboza
2022-08-03  7:33     ` Cédric Le Goater [this message]
2022-08-01 13:10 ` [PATCH 02/19] ppc/ppc405: Introduce a PPC405 generic machine Cédric Le Goater
2022-08-02 19:07   ` Daniel Henrique Barboza
2022-08-03  7:34     ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 03/19] ppc/ppc405: Move devices under the ref405ep machine Cédric Le Goater
2022-08-02 19:08   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 04/19] ppc/ppc405: Introduce a PPC405 SoC Cédric Le Goater
2022-08-02 19:18   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 05/19] ppc/ppc405: Start QOMification of the SoC Cédric Le Goater
2022-08-02 19:18   ` Daniel Henrique Barboza
2022-08-02 21:24     ` BALATON Zoltan
2022-08-03  7:54       ` Cédric Le Goater
2022-08-03  9:23       ` Daniel Henrique Barboza
2022-08-03  8:03     ` Cédric Le Goater
2022-08-03 11:59       ` BALATON Zoltan
2022-08-03 12:28         ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 06/19] ppc/ppc405: QOM'ify CPU Cédric Le Goater
2022-08-03  9:09   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 07/19] ppc/ppc405: QOM'ify CPC Cédric Le Goater
2022-08-03  9:14   ` Daniel Henrique Barboza
2022-08-03  9:16     ` Cédric Le Goater
2022-08-01 13:10 ` [PATCH 08/19] ppc/ppc405: QOM'ify GPT Cédric Le Goater
2022-08-03  9:15   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 09/19] ppc/ppc405: QOM'ify OCM Cédric Le Goater
2022-08-03  9:16   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 10/19] ppc/ppc405: QOM'ify GPIO Cédric Le Goater
2022-08-03  9:24   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 11/19] ppc/ppc405: QOM'ify DMA Cédric Le Goater
2022-08-03  9:25   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 12/19] ppc/ppc405: QOM'ify EBC Cédric Le Goater
2022-08-03  9:26   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 13/19] ppc/ppc405: QOM'ify OPBA Cédric Le Goater
2022-08-03  9:27   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 14/19] ppc/ppc405: QOM'ify POB Cédric Le Goater
2022-08-03  9:27   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 15/19] ppc/ppc405: QOM'ify PLB Cédric Le Goater
2022-08-03  9:43   ` Daniel Henrique Barboza
2022-08-03 11:06     ` BALATON Zoltan
2022-08-01 13:10 ` [PATCH 16/19] ppc/ppc405: QOM'ify MAL Cédric Le Goater
2022-08-03  9:45   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 17/19] ppc/ppc405: QOM'ify FPGA Cédric Le Goater
2022-08-03  9:45   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 18/19] ppc/ppc405: QOM'ify UIC Cédric Le Goater
2022-08-01 13:17   ` Cédric Le Goater
2022-08-03  9:46   ` Daniel Henrique Barboza
2022-08-01 13:10 ` [PATCH 19/19] ppc/ppc405: QOM'ify I2C Cédric Le Goater
2022-08-03  9:46   ` Daniel Henrique Barboza

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