From: Julien Grall <julien.grall@arm.com>
To: Volodymyr Babchuk <volodymyr_babchuk@epam.com>, xen-devel@lists.xen.org
Cc: Stefano Stabellini <sstabellini@kernel.org>
Subject: Re: [PATCH 1/2] arm: smccc: handle SMCs/HVCs according to SMCCC
Date: Tue, 20 Jun 2017 12:55:43 +0100 [thread overview]
Message-ID: <97ca2b1f-9154-5643-4313-1480f71fab01@arm.com> (raw)
In-Reply-To: <e8b8130a-c6d8-1b03-e946-d3f999c0c373@epam.com>
On 06/19/2017 10:59 PM, Volodymyr Babchuk wrote:
> Hello Julien,
Hi Volodymyr,
[...]
>>> +/**
>>> + * smccc_handle_call() - handle SMC/HVC call according to ARM SMCCC
>>> + */
>>> +void smccc_handle_call(struct cpu_user_regs *regs, const union hsr hsr)
>>
>> hsr is already part of regs.
>>
>>> +{
>>> + bool handled = false;
>>> +
>>
>> I am a bit surprised, I don't see any check to prevent a 32-bit guest
>> to use SMC64 call.
> Should we return ARM_SMCCC_ERR_UNKNOWN_FUNCTION code in this case? Or
> inject undefined instruction?
We should follow what the spec says here. Per section 2.7 (ARM DEN
0028B), you should return ARM_SMCC_ERR_UNKOWN_FUNCTION for SMC64/HVC64
call from AArch32.
>> Furthermore, based from the SMCCC spec (see 2.9 in ARM DEN 0028B), the
>> compliant SMC calls should have the immediate value of zero.
> Looks like HSR does not hold immediate value (as if in case of HVC/SVC).
> That means that I need to map memory at PC and decode instruction
> manually. It is a bit complex, I think. Should we do this?
Well, the immediate is present for the ISS encoding for exception from
SMC executed in AArch64 state. So you can decode the immediate here.
For SMC executed in AArch32 state, indeed the immediate is not present.
I had a quick look at the arm trusted firmware. I haven't spot any
decoding of the immediate from an instruction.
My main concern is any non-zero value are reserved. If they are used in
the future, we may emulate them by mistake. So we should definitely
handle it for AArch64. For AArch32, we could decode the instruction, but
that would be time consuming for the benefits of future extension but
add overhead on the SMC call. So I would just consider it as always 0
with a suitable comment on top explaining why.
[...]
>>> +
>>> +#include <xen/types.h>
>>> +
>>> +/*
>>> + * This file provides common defines for ARM SMC Calling Convention as
>>> + * specified in
>>> + * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
>>> + */
>>> +
>>> +#define ARM_SMCCC_STD_CALL 0
>>
>> Is this file coming from Linux? If so, it should be mention. If not,
>> please use soft tab and not hard tab. This is valid in all this
>> file.Actually, part of this defines are from Linux, another defines
>> was added
> by myself. What I should to in this case?
Using Xen coding style always (see CODING_STYLE).
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2017-06-20 11:55 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-14 14:10 [PATCH 0/2] Handle SMCs and HVCs in conformance with SMCCC Volodymyr Babchuk
2017-06-14 14:10 ` [PATCH 1/2] arm: smccc: handle SMCs/HVCs according to SMCCC Volodymyr Babchuk
2017-06-15 10:48 ` Julien Grall
2017-06-19 21:59 ` Volodymyr Babchuk
2017-06-20 11:55 ` Julien Grall [this message]
2017-06-22 16:29 ` Volodymyr Babchuk
2017-06-27 11:08 ` Julien Grall
2017-06-27 14:40 ` Volodymyr Babchuk
2017-06-27 14:54 ` Julien Grall
2017-06-16 21:24 ` Stefano Stabellini
2017-08-01 10:59 ` Julien Grall
2017-08-01 14:25 ` Edgar E. Iglesias
2017-08-01 20:40 ` Stefano Stabellini
2017-08-01 21:02 ` Julien Grall
2017-08-01 21:22 ` Edgar E. Iglesias
2017-08-01 22:07 ` Julien Grall
2017-08-02 18:29 ` Stefano Stabellini
2017-06-14 14:10 ` [PATCH 2/2] arm: traps: handle PSCI calls inside `smccc.c` Volodymyr Babchuk
2017-06-14 14:21 ` Julien Grall
2017-06-14 14:37 ` Volodymyr Babchuk
2017-06-14 15:27 ` Julien Grall
2017-06-22 16:24 ` [PATCH v2 0/4] Handle SMCs and HVCs in conformance with SMCCC Volodymyr Babchuk
2017-06-22 16:24 ` [PATCH v2 1/4] arm: traps: psci: use generic register accessors Volodymyr Babchuk
2017-06-30 10:37 ` Julien Grall
2017-06-22 16:24 ` [PATCH v2 2/4] arm: smccc: handle SMCs/HVCs according to SMCCC Volodymyr Babchuk
2017-06-30 15:15 ` Julien Grall
2017-07-18 13:21 ` Julien Grall
2017-06-22 16:24 ` [PATCH v2 3/4] arm: traps: handle PSCI calls inside `vsmc.c` Volodymyr Babchuk
2017-06-30 21:13 ` Stefano Stabellini
2017-07-02 19:31 ` Julien Grall
2017-06-22 16:25 ` [PATCH v2 4/4] vsmc: psci: remove 64 bit mode check Volodymyr Babchuk
2017-06-30 21:19 ` Stefano Stabellini
2017-07-02 19:40 ` Julien Grall
2017-07-03 17:29 ` Stefano Stabellini
2017-07-04 11:44 ` Julien Grall
2017-07-02 19:34 ` Julien Grall
2017-07-02 19:34 ` Julien Grall
2017-06-27 12:57 ` [PATCH v2 0/4] Handle SMCs and HVCs in conformance with SMCCC Julien Grall
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