From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEB7DC4727C for ; Tue, 29 Sep 2020 00:31:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D7CA2100A for ; Tue, 29 Sep 2020 00:31:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="q82/RPzL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727058AbgI2AbK (ORCPT ); Mon, 28 Sep 2020 20:31:10 -0400 Received: from m42-4.mailgun.net ([69.72.42.4]:37722 "EHLO m42-4.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727048AbgI2AbK (ORCPT ); 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Tue, 29 Sep 2020 00:31:08 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: abhinavk) by smtp.codeaurora.org (Postfix) with ESMTPSA id A7AB1C433FE; Tue, 29 Sep 2020 00:31:06 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 28 Sep 2020 17:31:06 -0700 From: abhinavk@codeaurora.org To: Rob Clark Cc: dri-devel@lists.freedesktop.org, Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Jordan Crouse , Bjorn Andersson , Jonathan Marek , Brian Masney , linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/msm: fix 32b build warns In-Reply-To: <20200929001925.2916984-1-robdclark@gmail.com> References: <20200929001925.2916984-1-robdclark@gmail.com> Message-ID: <99486d8eae2223bc5131c56accca1444@codeaurora.org> X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2020-09-28 17:19, Rob Clark wrote: > From: Rob Clark > > Neither of these code-paths apply to older 32b devices, but it is rude > to introduce warnings. > > Signed-off-by: Rob Clark Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index fd8f491f2e48..458b5b26d3c2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -209,7 +209,7 @@ adreno_iommu_create_address_space(struct msm_gpu > *gpu, > size = iommu->geometry.aperture_end - start + 1; > > aspace = msm_gem_address_space_create(mmu, "gpu", > - start & GENMASK(48, 0), size); > + start & GENMASK_ULL(48, 0), size); > > if (IS_ERR(aspace) && !IS_ERR(mmu)) > mmu->funcs->destroy(mmu); > diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > index 029cc8bf5a04..de0dfb815125 100644 > --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > @@ -879,7 +879,7 @@ struct msm_dsi_pll *msm_dsi_pll_7nm_init(struct > platform_device *pdev, int id) > pll->max_rate = 3500000000UL; > if (pll->type == MSM_DSI_PHY_7NM_V4_1) { > pll->min_rate = 600000000UL; > - pll->max_rate = 5000000000UL; > + pll->max_rate = (unsigned long)5000000000ULL; > /* workaround for max rate overflowing on 32-bit builds: */ > pll->max_rate = max(pll->max_rate, 0xffffffffUL); > } From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4227C2D0A8 for ; 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Tue, 29 Sep 2020 00:31:06 +0000 (UTC) MIME-Version: 1.0 Date: Mon, 28 Sep 2020 17:31:06 -0700 From: abhinavk@codeaurora.org To: Rob Clark Subject: Re: [PATCH] drm/msm: fix 32b build warns In-Reply-To: <20200929001925.2916984-1-robdclark@gmail.com> References: <20200929001925.2916984-1-robdclark@gmail.com> Message-ID: <99486d8eae2223bc5131c56accca1444@codeaurora.org> X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , freedreno@lists.freedesktop.org, Jonathan Marek , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Bjorn Andersson , Sean Paul , Brian Masney Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 2020-09-28 17:19, Rob Clark wrote: > From: Rob Clark > > Neither of these code-paths apply to older 32b devices, but it is rude > to introduce warnings. > > Signed-off-by: Rob Clark Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index fd8f491f2e48..458b5b26d3c2 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -209,7 +209,7 @@ adreno_iommu_create_address_space(struct msm_gpu > *gpu, > size = iommu->geometry.aperture_end - start + 1; > > aspace = msm_gem_address_space_create(mmu, "gpu", > - start & GENMASK(48, 0), size); > + start & GENMASK_ULL(48, 0), size); > > if (IS_ERR(aspace) && !IS_ERR(mmu)) > mmu->funcs->destroy(mmu); > diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > index 029cc8bf5a04..de0dfb815125 100644 > --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c > @@ -879,7 +879,7 @@ struct msm_dsi_pll *msm_dsi_pll_7nm_init(struct > platform_device *pdev, int id) > pll->max_rate = 3500000000UL; > if (pll->type == MSM_DSI_PHY_7NM_V4_1) { > pll->min_rate = 600000000UL; > - pll->max_rate = 5000000000UL; > + pll->max_rate = (unsigned long)5000000000ULL; > /* workaround for max rate overflowing on 32-bit builds: */ > pll->max_rate = max(pll->max_rate, 0xffffffffUL); > } _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel