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From: "Kazlauskas, Nicholas" <nicholas.kazlauskas@amd.com>
To: "Kim, Sung joon" <Sungjoon.Kim@amd.com>,
	"igt-dev@lists.freedesktop.org" <igt-dev@lists.freedesktop.org>
Subject: Re: [igt-dev] [PATCH 1/3] lib: Add stride and size calculation for amdgpu + tiling
Date: Thu, 14 Jan 2021 11:45:40 -0500	[thread overview]
Message-ID: <9a8af02a-a4c9-16e1-007a-30f72662ed6d@amd.com> (raw)
In-Reply-To: <MN2PR12MB3054AEFE0CA1D96BABAF28E797A80@MN2PR12MB3054.namprd12.prod.outlook.com>

On 2021-01-14 11:43 a.m., Kim, Sung joon wrote:
> [AMD Official Use Only - Internal Distribution Only]
> 
> On 2021-01-12 5:53 p.m., Sung Joon Kim wrote:
>> For amdgpu, we need to calculate the stride and size of framebuffer
>> correctly during non-linear tiling mode
>>
>> v2: add call to amdgpu tiling/swizzle addressing
>> Signed-off-by: Sung Joon Kim <sungkim@amd.com>
>> ---
>>    lib/igt_fb.c | 24 +++++++++++++++++++++++-
>>    1 file changed, 23 insertions(+), 1 deletion(-)
>>
>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 4b9be47e..6eebe048
>> 100644
>> --- a/lib/igt_fb.c
>> +++ b/lib/igt_fb.c
>> @@ -671,6 +671,11 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>>    		 * so the easiest way is to align the luma stride to 256.
>>    		 */
>>    		return ALIGN(min_stride, 256);
>> +	}else if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE && is_amdgpu_device(fb->fd)) {
>> +		/*
>> +		 * For amdgpu device with tiling mode
>> +		 */
>> +		return ALIGN(min_stride, 512);
>>    	} else if (is_gen12_ccs_cc_plane(fb, plane)) {
>>    		/* clear color always fixed to 64 bytes */
>>    		return 64;
>> @@ -711,6 +716,12 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
>>    		size = roundup_power_of_two(size);
>>    
>>    		return size;
>> +	} else if (fb->modifier != LOCAL_DRM_FORMAT_MOD_NONE && is_amdgpu_device(fb->fd)) {
>> +		/*
>> +		 * For amdgpu device with tiling mode
>> +		 */
>> +		return (uint64_t) fb->strides[plane] *
>> +			ALIGN(fb->plane_height[plane], 512);
>>    	} else if (is_gen12_ccs_plane(fb, plane)) {
>>    		/* The AUX CCS surface must be page aligned */
>>    		return (uint64_t)fb->strides[plane] * @@ -2352,6 +2363,13 @@
>> static void free_linear_mapping(struct fb_blit_upload *blit)
>>    
>>    		vc4_fb_convert_plane_to_tiled(fb, map, &linear->fb, &linear->map);
>>    
>> +		munmap(map, fb->size);
>> +	} else if (is_amdgpu_device(fd) && fb->modifier != 0) {
>> +		void *map = igt_amd_mmap_bo(fd, fb->gem_handle, fb->size,
>> +PROT_WRITE);
>> +
>> +		igt_amd_fb_convert_plane_to_tiled(fb, map, &linear->fb,
>> +linear->map);
> 
> Hi Nicholas,
> 
> The definition of that function should be in igt_amd.c which is shown in [PATCH 3/3].
> 
> Thanks,
> Joon

Can you move that definition into patch #1 so each patch will correctly 
compile?

Regards,
Nicholas Kazlauskas

> 
> Are you missing a patch in the series?
> 
> I don't see the definition for igt_amd_fb_convert_plane_to_tiled() anywhere.
> 
> Regards,
> Nicholas Kazlauskas
> 
>> +
>> +		munmap(linear->map, fb->size);
>>    		munmap(map, fb->size);
>>    	} else {
>>    		gem_munmap(linear->map, linear->fb.size); @@ -2419,6 +2437,10 @@
>> static void setup_linear_mapping(struct fb_blit_upload *blit)
>>    		vc4_fb_convert_plane_from_tiled(&linear->fb, &linear->map, fb,
>> map);
>>    
>>    		munmap(map, fb->size);
>> +	} else if (is_amdgpu_device(fd) && fb->modifier != 0) {
>> +		linear->map = igt_amd_mmap_bo(fd, linear->fb.gem_handle,
>> +					      linear->fb.size,
>> +					      PROT_READ | PROT_WRITE);
>>    	} else {
>>    		/* Copy fb content to linear BO */
>>    		gem_set_domain(fd, linear->fb.gem_handle, @@ -3625,7 +3647,7 @@
>> cairo_surface_t *igt_get_cairo_surface(int fd, struct igt_fb *fb)
>>    		if (use_convert(fb))
>>    			create_cairo_surface__convert(fd, fb);
>>    		else if (use_blitter(fb) || use_enginecopy(fb) ||
>> -			 igt_vc4_is_tiled(fb->modifier))
>> +			 igt_vc4_is_tiled(fb->modifier) || (is_amdgpu_device(fd) &&
>> +fb->modifier != 0))
>>    			create_cairo_surface__gpu(fd, fb);
>>    		else
>>    			create_cairo_surface__gtt(fd, fb);
>>

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  reply	other threads:[~2021-01-14 16:45 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12 22:53 [igt-dev] [PATCH 1/3] lib: Add stride and size calculation for amdgpu + tiling Sung Joon Kim
2021-01-12 22:53 ` [igt-dev] [PATCH 2/3] kms_rotation_crc:Add HW rotation test case for amdgpu Sung Joon Kim
2021-01-13 23:30   ` Cornij, Nikola
2021-01-14 16:13   ` Cornij, Nikola
2021-01-14 16:47   ` Kazlauskas, Nicholas
2021-01-12 22:54 ` [igt-dev] [PATCH 3/3] lib: Implement tiling/swizzle addressing " Sung Joon Kim
2021-01-13 23:30   ` Cornij, Nikola
2021-01-14 16:13   ` Cornij, Nikola
2021-01-14 17:01   ` Kazlauskas, Nicholas
2021-01-12 23:34 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/3] lib: Add stride and size calculation for amdgpu + tiling Patchwork
2021-01-13  6:05 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2021-01-13 23:29 ` [igt-dev] [PATCH 1/3] " Cornij, Nikola
2021-01-13 23:42 ` [igt-dev] ✗ Fi.CI.BUILD: failure for series starting with [1/3] lib: Add stride and size calculation for amdgpu + tiling (rev4) Patchwork
2021-01-14  6:26 ` [igt-dev] [PATCH 1/3] lib: Add stride and size calculation for amdgpu + tiling Petri Latvala
2021-01-14 16:11 ` Cornij, Nikola
2021-01-14 16:41 ` Kazlauskas, Nicholas
2021-01-14 16:43   ` Kim, Sung joon
2021-01-14 16:45     ` Kazlauskas, Nicholas [this message]
2021-01-14 18:35 ` [igt-dev] ✗ Fi.CI.BUILD: failure for series starting with [1/3] lib: Add stride and size calculation for amdgpu + tiling (rev7) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2021-01-12 21:00 [igt-dev] [PATCH 1/3] lib: Add stride and size calculation for amdgpu + tiling Sung Joon Kim
2021-01-12 17:46 Sung Joon Kim
2021-01-11 22:16 Sung Joon Kim

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