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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?okXwB14W9cqLkawTOglL8jpJg76wgisTiY80odOsAy+m7/rzHp1GzV+AqfPj?= =?us-ascii?Q?+VR+JZ47Fh5PyMr496SRSpo6knO19fst8tJERVvHNBlF/s+3Fjb0YhC/HMgf?= =?us-ascii?Q?qzr4TuU7+9l1JC4cleZoNuxpwUc+UEXPHeCDYbFsNMw+Wbvqmvb+PQ9Zs3CW?= =?us-ascii?Q?B6RW1wN9Nn8Sqk/cSR2Zo0GaCVa+xw9hyuvxkn4udXg6mvCf21jrvucNbUxe?= =?us-ascii?Q?2xWKSVc+txIfj31xDRYR8BayuQWvS5JXlRdq0Cq4zD/PmqSrISxgK6tfAiOl?= =?us-ascii?Q?+WdezSSDtrN6oJbYbjO6z2K0na1ydHn3Q0RGrpww6AsE9qV9VVqQ4gTVOlXP?= =?us-ascii?Q?6H+w/w7K3UmX9z8pn+PFQxKhYNmTPF4ufCKN7AwLay9/G/3cG9gHE3xutdE1?= =?us-ascii?Q?8946l7ta+tHrgAkLRP4ntq4wHtWciY7xIjFuDS+mD7bVH/v0oVfwd/7gNEr/?= =?us-ascii?Q?QUl0062XyE5VS1/5UqigH4cLtmaSDFg1P/wab++mAufsYWquXo5LgKOJuP2D?= =?us-ascii?Q?hP1i0oIPeo3TXqeFQ7wMn8qveGF5uwkMXKRJ7puzwAjh5hOUrF3cD5xIyVkS?= =?us-ascii?Q?BVG2UCHA8xheAI8hpJ70wl8tcrJtRb7sCvVhtO0tIdLJA/jGTADsEQHikTyi?= =?us-ascii?Q?jZygmx+7CxnWwwzi9APlrT+RjAAVYruL7XlixDMs9Gt40NPK0ayHxHdPOiYQ?= =?us-ascii?Q?7JYhuny9mqO2FyPphPs3VPmbV6p54aBqNAs8XuPwo/iaM8ScHsfURbqp0tdF?= =?us-ascii?Q?O7YNYhEmm6u5kiTSEkuAfReEYwIyqzPUfvPRVqEphQeH+n7BNZzYR89cfe7D?= =?us-ascii?Q?gH0XG8s7fqsR+xxTeQhg853DabO2bcJBoAlr5CS6cPrjjwqciaDJKIOnJWGr?= =?us-ascii?Q?gemFFhvjomrL6OGJZUheBMPszV9Pccj3BvjfcNA3bMvXdKABfa6aLmQ8iiT8?= =?us-ascii?Q?xMfnvMTSffwC+LUauzb5K4snTCt4rTAx0O3yaNcClG2iaJ3cCbfeNN+/9UjO?= =?us-ascii?Q?sOayjys4cALbd1beDxWIrFARpApHnHWwDQos1JHgSbozh1LPRrfnYU2SKB6U?= =?us-ascii?Q?CusDgyBfwf00Eckbspyn6UfGx9OKrFfqHE64inOEfY1ND/GUT7ogcITU+7kt?= =?us-ascii?Q?cbbATFMQhvc12nG9Mm/4tb2DkTlc8hDiiAWDJzDxUw9h71aAwKkZjKdCwziy?= =?us-ascii?Q?Dd1YAnKw9/iBuPTqYaTEz590HVmWjLOQDfuOMniLxYcz/wTpeIJOE7bmDVNi?= =?us-ascii?Q?clLjiif9qGrhpqZTl8uco23w5jXalHnukM1fBUqzcmK4CKPvgMh/oXRvTcTE?= =?us-ascii?Q?8753D3+11m40bQp2aVXuSciagQ3+J3//7Au/o5IOuBgGB+ItjTyRF8rNnvrz?= =?us-ascii?Q?0MENEXwTKoQQ7l+g/lmACYW7fsSIlw3cyGBQ4dszkcMSJPLdS9zwJMoTCoPn?= =?us-ascii?Q?ymaJ3bHRnKl2Ayw3i8FfSTAC4gJqjPMQkxtzN7VKkmQ+LA0m7bt98VbBmnmD?= =?us-ascii?Q?B7gHOHY2F1zVKti/FtD/tcEf5v1+C2paMGBCLVQ8O84gnFK83rmheBC1dBjP?= =?us-ascii?Q?ZpWcna9doa8QpcfFFZ7GIq2cdAVOeII6rPwAOcwnfZL5OPnS/FD/EbIqSLKP?= =?us-ascii?Q?RGCUIraZUD/Df/SJI3+yK9M=3D?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: bfd78576-181a-4649-5eed-08d9fabbc815 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5600.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2022 13:11:07.3401 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nphEnF64kTJ8lQui2hr3hO/HdVGaiCwpluWf8Wf0Tir9ORbPx7/inf2cdoGmkVjW3shWaDJIlcMLBhEnJVT0gg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7229 On 28.02.2022 11:59, Roger Pau Monn=C3=A9 wrote: > On Thu, Feb 24, 2022 at 03:08:41PM +0100, Jan Beulich wrote: >> On 18.02.2022 18:29, Jane Malalane wrote: >>> Add XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_xapic and >>> XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_x2apic to report accelerated xapic >>> and x2apic, on x86 hardware. >>> No such features are currently implemented on AMD hardware. >>> >>> For that purpose, also add an arch-specific "capabilities" parameter >>> to struct xen_sysctl_physinfo. >>> >>> Suggested-by: Andrew Cooper >>> Signed-off-by: Jane Malalane >>> --- >>> v3: >>> * Define XEN_SYSCTL_PHYSCAP_ARCH_MAX for ABI checking and actually >>> set arch_capbilities, via a call to c_bitmap_to_ocaml_list() >>> * Have assisted_x2apic_available only depend on >>> cpu_has_vmx_virtualize_x2apic_mode >> >> I understand this was the result from previous discussion, but this >> needs justifying in the description. Not the least because it differs >> from when XEN_HVM_CPUID_X2APIC_VIRT would be set as well as from what >> vmx_vlapic_msr_changed() does. The difference between those two is >> probably intended (judging from a comment there), but the further >> difference to what you add isn't obvious. >> >> Which raises another thought: If that hypervisor leaf was part of the >> HVM feature set, the tool stack could be able to obtain the wanted >> information without altering sysctl (assuming the conditions to set >> the respective bits were the same). And I would view it as generally >> reasonable for there to be a way for tool stacks to know what >> hypervisor leaves guests are going to get to see (at the maximum and >> by default). >=20 > I'm not sure using CPUID would be appropriate for this. Those fields > are supposed to be used by a guest to decide whether it should prefer > the x{2}APIC over PV alternatives for certain operations (ie: IPIs for > example), but the level of control we can provide with the sysctl is > more fine grained. >=20 > The current proposal is limited to the exposure and control of the > usage of APIC virtualization, but we could also expose availability > and per-domain enablement of APIC register virtualization and posted > interrupts. But then I would still like to avoid duplication of information exposure and expose through the featureset what can be exposed there and limit sysctl to what cannot be expressed otherwise. Jan