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diff for duplicates of <9b3763f2-1dfa-5506-d7f2-93389647111c@redhat.com>

diff --git a/a/1.txt b/N1/1.txt
index acdc97c..df87633 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -7,9 +7,9 @@ On 08/03/18 08:01, Shunyong Yang wrote:
 > "When the PE acknowledges an SGI, a PPI, or an SPI at the CPU
 > interface, the IRI changes the status of the interrupt to active
 > and pending if:
-> • It is an edge-triggered interrupt, and another edge has been
+> ? It is an edge-triggered interrupt, and another edge has been
 > detected since the interrupt was acknowledged.
-> • It is a level-sensitive interrupt, and the level has not been
+> ? It is a level-sensitive interrupt, and the level has not been
 > deasserted since the interrupt was acknowledged."
 > 
 > GIC v2 specification IHI0048B.b has similar description on page
diff --git a/a/content_digest b/N1/content_digest
index 6949d2f..9ac0b1e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,27 +2,16 @@
   "ref\0001520492490-7943-1-git-send-email-shunyong.yang\@hxt-semitech.com\0"
 ]
 [
-  "From\0Auger Eric <eric.auger\@redhat.com>\0"
+  "From\0eric.auger\@redhat.com (Auger Eric)\0"
 ]
 [
-  "Subject\0Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
+  "Subject\0[RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
 ]
 [
   "Date\0Thu, 8 Mar 2018 09:57:37 +0100\0"
 ]
 [
-  "To\0Shunyong Yang <shunyong.yang\@hxt-semitech.com>",
-  " christoffer.dall\@linaro.org\0"
-]
-[
-  "Cc\0david.daney\@cavium.com",
-  " marc.zyngier\@arm.com",
-  " ard.biesheuvel\@linaro.org",
-  " will.deacon\@arm.com",
-  " linux-kernel\@vger.kernel.org",
-  " Joey Zheng <yu.zheng\@hxt-semitech.com>",
-  " kvmarm\@lists.cs.columbia.edu",
-  " linux-arm-kernel\@lists.infradead.org\0"
+  "To\0linux-arm-kernel\@lists.infradead.org\0"
 ]
 [
   "\0000:1\0"
@@ -40,9 +29,9 @@
   "> \"When the PE acknowledges an SGI, a PPI, or an SPI at the CPU\n",
   "> interface, the IRI changes the status of the interrupt to active\n",
   "> and pending if:\n",
-  "> \342\200\242 It is an edge-triggered interrupt, and another edge has been\n",
+  "> ? It is an edge-triggered interrupt, and another edge has been\n",
   "> detected since the interrupt was acknowledged.\n",
-  "> \342\200\242 It is a level-sensitive interrupt, and the level has not been\n",
+  "> ? It is a level-sensitive interrupt, and the level has not been\n",
   "> deasserted since the interrupt was acknowledged.\"\n",
   "> \n",
   "> GIC v2 specification IHI0048B.b has similar description on page\n",
@@ -164,4 +153,4 @@
   ">"
 ]
 
-6047d5ff3efc29afc596055392e6e87ebc72f6c7c20331de14165163223affeb
+d6d589c0bcefb7f131fdaa0f1fff4b8ef4c41b1dd99586b4e37e86775694b298
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