It's missing from the title but this is a v2.

v1 id:
Message-Id: <20220803122217.20847-1-lucas.araujo@eldorado.org.br>

On 05/08/2022 11:15, Lucas Mateus Castro(alqotel) wrote:
From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>

Changes in v2:
    - Completely reworked the solution:
        * Created re_bias in FloatFmt, it is 3/4 of the total exponent
          range of a FP type
        * Added rebias bools that dictates if the result should have
          its exponent add/subtract the re_bias value if an
          overflow/underflow occurs.
        * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset

The PowerISA defines that if an overflow exception happen with FPSCR.OE
set, the exponent of the intermediate result is subtracted 1536 in
double precision operations and is added 1536 in an underflow exception,
currently this behavior is not QEMU's behavior, this patch series fixes
that.

Currently there's no test in this patch series as there's no way to
disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
exception with OE/UE set causes a trapping exception.

Lucas Mateus Castro (alqotel) (2):
  fpu: Add rebias bool, value and operation
  target/ppc: Bugfix FP when OE/UE are set

 fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
 fpu/softfloat.c               |  2 ++
 include/fpu/softfloat-types.h |  4 ++++
 target/ppc/cpu.c              |  2 ++
 target/ppc/fpu_helper.c       |  2 --
 5 files changed, 27 insertions(+), 4 deletions(-)

--
Lucas Mateus M. Araujo e Castro
Instituto de Pesquisas ELDORADO
Departamento Computação Embarcada
Analista de Software Trainee
Aviso Legal - Disclaimer