From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFC43C43387 for ; Wed, 9 Jan 2019 16:34:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8556E20685 for ; Wed, 9 Jan 2019 16:34:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726506AbfAIQeP (ORCPT ); Wed, 9 Jan 2019 11:34:15 -0500 Received: from mx3.molgen.mpg.de ([141.14.17.11]:34513 "EHLO mx1.molgen.mpg.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726477AbfAIQeO (ORCPT ); Wed, 9 Jan 2019 11:34:14 -0500 Received: from keineahnung.molgen.mpg.de (keineahnung.molgen.mpg.de [141.14.17.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: pmenzel) by mx.molgen.mpg.de (Postfix) with ESMTPSA id 31223201353427; Wed, 9 Jan 2019 17:34:12 +0100 (CET) Subject: Re: General protection fault in `switch_mm_irqs_off()` To: Thomas Lendacky Cc: Thomas Gleixner , Jiri Kosina , "x86@kernel.org" , LKML , Tim Chen , Borislav Petkov References: <784ab00e-ed72-c1bc-bc0c-31264deb7726@molgen.mpg.de> <5c38f377-f088-5684-91a5-c2cc2d64dbbd@molgen.mpg.de> <206f4322-c15e-6f0b-733d-fd19cd9c24a7@molgen.mpg.de> <98ed83c0-3077-848b-9de4-add70e9b417a@amd.com> From: Paul Menzel Message-ID: <9bca3e26-1dfc-6e86-cf28-90cadd983ff4@molgen.mpg.de> Date: Wed, 9 Jan 2019 17:34:11 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <98ed83c0-3077-848b-9de4-add70e9b417a@amd.com> Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="------------ms000507060501090204040107" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a cryptographically signed message in MIME format. --------------ms000507060501090204040107 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable Dear Thomas, On 01/09/19 17:15, Lendacky, Thomas wrote: > On 1/9/19 8:34 AM, Paul Menzel wrote: >> On 01/09/19 15:29, Lendacky, Thomas wrote: >>> On 1/9/19 7:35 AM, Paul Menzel wrote: >> >>>> On 01/09/19 14:16, Thomas Gleixner wrote: >>>> >>>>> On Wed, 9 Jan 2019, Paul Menzel wrote: >>>>>> I get the same with microcode updates applied. >>>>>> >>>>>> $ dmesg | grep 'microcode: CPU0: patch_level' >>>>>> [ 3.809210] microcode: CPU0: patch_level=3D0x0600063e >>>>>> $ sudo modprobe msr >>>>>> $ sudo ./wrmsr 0x49 0x1 >>>>>> wrmsr: CPU 0 cannot set MSR 0x00000049 to 0x0000000000000001 >>>>>> >>>>>>> Could you please post /proc/cpuinfo from such a boot as well? >>>>> >>>>> /proc/cpuinfo unfortunately does not contain the amd specific IBPB = flag, >>>>> but the dmesg of the original report says: >>>>> >>>>> Spectre V2 : mitigation: Enabling conditional Indirect Branch Pre= diction Barrier >>>>> >>>>> which means, that the CPUID bit is set. >>>>> >>>>> Can you please provide the output of: >>>>> >>>>> cpuid -1 -l 0x80000008 -r >>>>> >>>>> On my AMD Opteron(TM) Processor 6276 with microcode 0x600063d loade= d I get: >>>>> >>>>> 0x80000008 0x00: eax=3D0x00003030 ebx=3D0x00000000 ecx=3D0x00005= 00f edx=3D0x00000000 >>>>> >>>>> EBX is 0, which means that X86_FEATURE_AMD_IBPB is not enabled. So = the >>>>> kernel does not try to use the speculation control MSR (0x49). >>>> >>>> With CPUID 20180519, I get the output below with both microcode upda= te versions. >>>> >>>> 0x600063d: >>>> >>>> $ sudo ./cpuid -1 -l 0x80000008 -r >>>> CPU: >>>> 0x80000008 0x00: eax=3D0x00003030 ebx=3D0x00000000 ecx=3D0x00= 00500f edx=3D0x00000000 >>>> >>>> 0x600063e: >>>> >>>> $ sudo ./cpuid -1 -l 0x80000008 -r >>>> CPU: >>>> 0x80000008 0x00: eax=3D0x00003030 ebx=3D0x00000000 ecx=3D0x00= 00500f edx=3D0x00000000 >>> >>> Hmmm... so ebx is 0 for both versions, so I'm not sure how IBPB is be= ing >>> set. What's the CPUID output for 0x07 (cpuid -1 -l 0x07 -r)? >> >> $ sudo ./cpuid -1 -l 0x07 -r >> CPU: >> 0x00000007 0x00: eax=3D0x00000000 ebx=3D0x00000000 ecx=3D0x0000= 0000 edx=3D0x00000000 >=20 > I'm confused then... the only way that I can see that the IBPB feature= > can be set is if 0x80000008[EBX] bit 12 is set or if 0x07[EDX] bit 26 i= s > set - neither of which is the case. I must be missing something... Is there a way to trace the value of `boot_cpu_data` from `arch/x86/include/asm/cpufeature.h` with some Linux Kernel magic? #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) Or is rebuilding with print statements the only solution? Kind regards, Paul --------------ms000507060501090204040107 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCC EFowggUSMIID+qADAgECAgkA4wvV+K8l2YEwDQYJKoZIhvcNAQELBQAwgYIxCzAJBgNVBAYT AkRFMSswKQYDVQQKDCJULVN5c3RlbXMgRW50ZXJwcmlzZSBTZXJ2aWNlcyBHbWJIMR8wHQYD VQQLDBZULVN5c3RlbXMgVHJ1c3QgQ2VudGVyMSUwIwYDVQQDDBxULVRlbGVTZWMgR2xvYmFs Um9vdCBDbGFzcyAyMB4XDTE2MDIyMjEzMzgyMloXDTMxMDIyMjIzNTk1OVowgZUxCzAJBgNV BAYTAkRFMUUwQwYDVQQKEzxWZXJlaW4genVyIEZvZXJkZXJ1bmcgZWluZXMgRGV1dHNjaGVu IEZvcnNjaHVuZ3NuZXR6ZXMgZS4gVi4xEDAOBgNVBAsTB0RGTi1QS0kxLTArBgNVBAMTJERG Ti1WZXJlaW4gQ2VydGlmaWNhdGlvbiBBdXRob3JpdHkgMjCCASIwDQYJKoZIhvcNAQEBBQAD ggEPADCCAQoCggEBAMtg1/9moUHN0vqHl4pzq5lN6mc5WqFggEcVToyVsuXPztNXS43O+FZs FVV2B+pG/cgDRWM+cNSrVICxI5y+NyipCf8FXRgPxJiZN7Mg9mZ4F4fCnQ7MSjLnFp2uDo0p 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