From mboxrd@z Thu Jan 1 00:00:00 1970 From: Robin Murphy Subject: Re: [PATCH 5/8] pci: Add Rockchip PCIe controller driver Date: Mon, 27 Apr 2020 18:19:37 +0100 Message-ID: <9c00b50f-cf17-9c4e-4c75-b6e85668f9a2@arm.com> References: <20200425110354.12381-1-jagan@amarulasolutions.com> <20200425110354.12381-6-jagan@amarulasolutions.com> <016196137a6060e1@bloch.sibelius.xs4all.nl> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-GB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane-mx.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Jagan Teki , Mark Kettenis Cc: Patrick Wildt , U-Boot-Denx , Simon Glass , Kever Yang , "open list:ARM/Rockchip SoC..." , Suniel Mahesh , Philipp Tomsich , linux-amarula List-Id: linux-rockchip.vger.kernel.org On 2020-04-25 8:36 pm, Jagan Teki wrote: > On Sun, Apr 26, 2020 at 12:23 AM Mark Kettenis wrote: >> >>> From: Jagan Teki >>> Date: Sat, 25 Apr 2020 16:33:51 +0530 >>> >>> Add Rockchip PCIe controller driver for rk3399 platform. >>> >>> Driver support Gen1 by operating as a Root complex. >>> >>> Thanks to Patrick for initial work. >> >> Tried to get this to work on my firefly-rk3399 which made me notice >> some shortcomings: >> >> 1. The vpcie1v8 and vpcie0v9 supplies are optional, just like the >> vpcie3v3 supply. FWIW those are "non-optional" in Linux in the sense that supplies to the PCIE_AVDD_0V9 and PCIE_AVDD_1V8 pins of the SoC must physically exist, even if they aren't described. If U-Boot doesn't have the same "create a dummy regulator if none is specified" behaviour then you might need some slightly different logic there. The 3.3V and 12V supplies on the other hand may legitimately not be part of the board at all, depending on whether it implements a full-size slot, a mini-PCI/M.2 socket, a hard-wired endpoint chip, or just the data and clock signal pairs exposed on some non-standard connector. Robin. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Robin Murphy Date: Mon, 27 Apr 2020 18:19:37 +0100 Subject: [PATCH 5/8] pci: Add Rockchip PCIe controller driver In-Reply-To: References: <20200425110354.12381-1-jagan@amarulasolutions.com> <20200425110354.12381-6-jagan@amarulasolutions.com> <016196137a6060e1@bloch.sibelius.xs4all.nl> Message-ID: <9c00b50f-cf17-9c4e-4c75-b6e85668f9a2@arm.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 2020-04-25 8:36 pm, Jagan Teki wrote: > On Sun, Apr 26, 2020 at 12:23 AM Mark Kettenis wrote: >> >>> From: Jagan Teki >>> Date: Sat, 25 Apr 2020 16:33:51 +0530 >>> >>> Add Rockchip PCIe controller driver for rk3399 platform. >>> >>> Driver support Gen1 by operating as a Root complex. >>> >>> Thanks to Patrick for initial work. >> >> Tried to get this to work on my firefly-rk3399 which made me notice >> some shortcomings: >> >> 1. The vpcie1v8 and vpcie0v9 supplies are optional, just like the >> vpcie3v3 supply. FWIW those are "non-optional" in Linux in the sense that supplies to the PCIE_AVDD_0V9 and PCIE_AVDD_1V8 pins of the SoC must physically exist, even if they aren't described. If U-Boot doesn't have the same "create a dummy regulator if none is specified" behaviour then you might need some slightly different logic there. The 3.3V and 12V supplies on the other hand may legitimately not be part of the board at all, depending on whether it implements a full-size slot, a mini-PCI/M.2 socket, a hard-wired endpoint chip, or just the data and clock signal pairs exposed on some non-standard connector. Robin.