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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id g13-20020a62520d000000b0050a923a7754sm7300256pfb.119.2022.04.20.11.18.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Apr 2022 11:18:45 -0700 (PDT) Message-ID: <9c037b8d-04d3-4c5b-cd61-f5a96dd40e28@linaro.org> Date: Wed, 20 Apr 2022 11:18:43 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [RFC PATCH v3 1/5] ppc64: Add semihosting support Content-Language: en-US To: Leandro Lupori , =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , qemu-devel@nongnu.org, qemu-ppc@nongnu.org References: <20220418191100.270334-1-leandro.lupori@eldorado.org.br> <20220418191100.270334-2-leandro.lupori@eldorado.org.br> <1d3aaac9-5aa1-9ff9-6b3c-5109ad7f4361@kaod.org> <92025187-7b4a-f8da-2204-d45160f9d711@eldorado.org.br> From: Richard Henderson In-Reply-To: <92025187-7b4a-f8da-2204-d45160f9d711@eldorado.org.br> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, groug@kaod.org, Nicholas Piggin , pbonzini@redhat.com, alex.bennee@linaro.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/20/22 10:54, Leandro Lupori wrote: > On 4/18/22 17:22, Cédric Le Goater wrote: > >>> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c >>> index 7a51fd0737..e1279c316c 100644 >>> --- a/semihosting/arm-compat-semi.c >>> +++ b/semihosting/arm-compat-semi.c >>> @@ -268,6 +268,31 @@ common_semi_sys_exit_extended(CPUState *cs, int nr) >>> >>>   #endif >>> >>> +#ifdef TARGET_PPC64 >> >> This PPC ifdef in an ARM file seems wrong. >> >> The rest looks OK. > > IIUC, arm-compat-semi.c is not an ARM specific file, but it's used by targets that > implement ARM-compatible semihosting. It's currently used by ARM and RISC-V and both use > target ifdefs in small parts of this file. It would be nice to split these out to target/arch/arm-compat-semi.h or something akin. r~