Re: [PATCH v3 1/3] arm64: dts: renesas: r8a779a0: Add DU support

[Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>]

On 23/09/2021 13:05, Kieran Bingham wrote:
> Hi Geert,
> 
> On 23/09/2021 08:00, Geert Uytterhoeven wrote:
>> Hi Kieran,
>>
>> On Thu, Sep 23, 2021 at 3:04 AM Kieran Bingham
>> <kieran.bingham@ideasonboard.com> wrote:
>>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>> Provide the device nodes for the DU on the V3U platforms.
>>>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>> ---
>>> v2
>>>  - Use a single clock specification for the whole DU.
>>>
>>> v3:
>>>  - Use 'du.0' clock name instead of 'du'
>>
>> Thanks for the update!
>>
>>> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>>> @@ -1251,6 +1251,36 @@ vspd1: vsp@fea28000 {
>>>                         renesas,fcp = <&fcpvd1>;
>>>                 };
>>>
>>> +               du: display@feb00000 {
>>> +                       compatible = "renesas,du-r8a779a0";
>>> +                       reg = <0 0xfeb00000 0 0x40000>;
>>> +                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                    <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
>>> +                       clocks = <&cpg CPG_MOD 411>;
>>> +                       clock-names = "du.0";
>>> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>>> +                       resets = <&cpg 411>;
>>
>> You missed reset-names.
> 
> Adding it in now.
> 
> Sorry I must get the dtchecks automated in my builds...
> 
> --
> Kieran
> 
> 
>>
>>> +                       vsps = <&vspd0 0>, <&vspd1 0>;


Also, clearly this should be 'renesas,vsps =' ;-)

--
Kieran


>>> +                       status = "disabled";
>>> +
>>> +                       ports {
>>> +                               #address-cells = <1>;
>>> +                               #size-cells = <0>;
>>> +
>>> +                               port@0 {
>>> +                                       reg = <0>;
>>> +                                       du_out_dsi0: endpoint {
>>> +                                       };
>>> +                               };
>>> +
>>> +                               port@1 {
>>> +                                       reg = <1>;
>>> +                                       du_out_dsi1: endpoint {
>>> +                                       };
>>> +                               };
>>> +                       };
>>> +               };
>>> +
>>>                 prr: chipid@fff00044 {
>>>                         compatible = "renesas,prr";
>>>                         reg = <0 0xfff00044 0 4>;
>>
>> Gr{oetje,eeting}s,
>>
>>                         Geert
>>


-- 
--
Kieran