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From: Florian Fainelli <f.fainelli@gmail.com>
To: Michael Chan <michael.chan@broadcom.com>, davem@davemloft.net
Cc: netdev@vger.kernel.org, kuba@kernel.org, edwin.peer@broadcom.com,
	gospo@broadcom.com, florian.fainelli@broadcom.com
Subject: Re: [PATCH net-next v2] bnxt_en: Fix 64-bit doorbell operation on 32-bit kernels
Date: Tue, 31 Aug 2021 18:46:22 -0700	[thread overview]
Message-ID: <9c86fc7c-43ac-e015-a5fd-083d17dec86e@gmail.com> (raw)
In-Reply-To: <1630458923-14161-1-git-send-email-michael.chan@broadcom.com>



On 8/31/2021 6:15 PM, Michael Chan wrote:
> The driver requires 64-bit doorbell writes to be atomic on 32-bit
> architectures.  So we redefined writeq as a new macro with spinlock
> protection on 32-bit architectures.  This created a new warning when
> we added a new file in a recent patchset.  writeq is defined on many
> 32-bit architectures to do the memory write non-atomically and it
> generated a new macro redefined warning.  This warning was fixed
> incorrectly in the recent patch.
> 
> Fix this properly by adding a new bnxt_writeq() function that will
> do the non-atomic write under spinlock on 32-bit systems.  All callers
> in the driver will now call bnxt_writeq() instead.
> 
> v2: Need to pass in bp to bnxt_writeq()
>      Use lo_hi_writeq() [suggested by Florian]
> 
> Reported-by: kernel test robot <lkp@intel.com>
> Fixes: f9ff578251dc ("bnxt_en: introduce new firmware message API based on DMA pools")
> Reviewed-by: Edwin Peer <edwin.peer@broadcom.com>
> Signed-off-by: Michael Chan <michael.chan@broadcom.com>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

  reply	other threads:[~2021-09-01  1:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-01  1:15 [PATCH net-next v2] bnxt_en: Fix 64-bit doorbell operation on 32-bit kernels Michael Chan
2021-09-01  1:46 ` Florian Fainelli [this message]
2021-09-01 10:50 ` patchwork-bot+netdevbpf

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