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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id t4sm2820719wmb.20.2020.11.11.05.51.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Nov 2020 05:51:13 -0800 (PST) Subject: Re: [PATCH stable-5.4] KVM: x86: don't expose MSR_IA32_UMWAIT_CONTROL unconditionally To: Jack Wang , gregkh@linuxfoundation.org, sashal@kernel.org, stable@vger.kernel.org Cc: Maxim Levitsky , Sean Christopherson References: <20201111132047.64845-1-jinpu.wang@cloud.ionos.com> From: Paolo Bonzini Message-ID: <9cdcac85-3f02-190f-cf4c-296a8eb415de@redhat.com> Date: Wed, 11 Nov 2020 14:51:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: <20201111132047.64845-1-jinpu.wang@cloud.ionos.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On 11/11/20 14:20, Jack Wang wrote: > From: Maxim Levitsky > > This msr is only available when the host supports WAITPKG feature. > > This breaks a nested guest, if the L1 hypervisor is set to ignore > unknown msrs, because the only other safety check that the > kernel does is that it attempts to read the msr and > rejects it if it gets an exception. > > Cc: stable@vger.kernel.org > Fixes: 6e3ba4abce ("KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL") > Signed-off-by: Maxim Levitsky > Message-Id: <20200523161455.3940-3-mlevitsk@redhat.com> > Reviewed-by: Sean Christopherson > Signed-off-by: Paolo Bonzini > (cherry picked from commit f4cfcd2d5aea4e96c5d483c476f3057b6b7baf6a > use boot_cpu_has for checking the feature) > Signed-off-by: Jack Wang > --- > arch/x86/kvm/x86.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 708b37274cb5..4cacf4669235 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -5226,6 +5226,10 @@ static void kvm_init_msr_list(void) > if (!kvm_x86_ops->rdtscp_supported()) > continue; > break; > + case MSR_IA32_UMWAIT_CONTROL: > + if (!boot_cpu_has(X86_FEATURE_WAITPKG)) > + continue; > + break; > case MSR_IA32_RTIT_CTL: > case MSR_IA32_RTIT_STATUS: > if (!kvm_x86_ops->pt_supported()) > Acked-by: Paolo Bonzini Thanks, Paolo