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From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 6/6] target/ppc: Implement HEIR SPR
Date: Mon, 15 May 2023 15:02:56 +0530	[thread overview]
Message-ID: <9d7d3ca6-85d2-ec00-148f-963a12bbc0ad@linux.ibm.com> (raw)
In-Reply-To: <67fcac44-675b-67b3-ba7b-61730c356f50@linux.ibm.com>



On 5/15/23 14:02, Harsh Prateek Bora wrote:
>>
>> That would be wrong for the other HSRR fallthroughs above it.
>>
> Oh yeh, in that case, may be move it to top of the EXCP_HISI, it would 
> need duplicating one line of assignment though (relatively better?).

correcting myself, no duplication needed if keeping above EXCP_HISI.

> 
> regards,
> Harsh


  reply	other threads:[~2023-05-15  9:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-23  2:22 [PATCH 1/6] target/ppc: Fix width of some 32-bit SPRs Nicholas Piggin
2023-03-23  2:22 ` [PATCH 2/6] target/ppc: Better CTRL SPR implementation Nicholas Piggin
2023-03-23  2:22 ` [PATCH 3/6] target/ppc: Fix instruction loading endianness in alignment interrupt Nicholas Piggin
2023-03-24 13:30   ` Fabiano Rosas
2023-03-27  4:25     ` Nicholas Piggin
2023-03-23  2:22 ` [PATCH 4/6] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward Nicholas Piggin
2023-03-24 13:39   ` Fabiano Rosas
2023-03-27  4:26     ` Nicholas Piggin
2023-03-23  2:22 ` [PATCH 5/6] target/ppc: Add SRR1 prefix indication to interrupt handlers Nicholas Piggin
2023-03-23  2:22 ` [PATCH 6/6] target/ppc: Implement HEIR SPR Nicholas Piggin
2023-05-09  9:51   ` Harsh Prateek Bora
2023-05-15  8:26     ` Nicholas Piggin
2023-05-15  8:32       ` Harsh Prateek Bora
2023-05-15  9:32         ` Harsh Prateek Bora [this message]
2023-05-15 10:45           ` Nicholas Piggin
2023-05-15 10:54             ` Harsh Prateek Bora

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