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[81.40.121.121]) by smtp.gmail.com with ESMTPSA id k1sm35756474wrw.91.2020.08.18.04.06.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Aug 2020 04:06:46 -0700 (PDT) Subject: Re: [PATCH v4 5/8] mips/cps: Use start-powered-off CPUState property From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Thiago Jung Bauermann , qemu-ppc@nongnu.org References: <20200818033323.336912-1-bauerman@linux.ibm.com> <20200818033323.336912-6-bauerman@linux.ibm.com> <8c454fa8-12a6-0258-04e8-6f3c093eb333@redhat.com> Autocrypt: addr=philmd@redhat.com; keydata= mQINBDXML8YBEADXCtUkDBKQvNsQA7sDpw6YLE/1tKHwm24A1au9Hfy/OFmkpzo+MD+dYc+7 bvnqWAeGweq2SDq8zbzFZ1gJBd6+e5v1a/UrTxvwBk51yEkadrpRbi+r2bDpTJwXc/uEtYAB GvsTZMtiQVA4kRID1KCdgLa3zztPLCj5H1VZhqZsiGvXa/nMIlhvacRXdbgllPPJ72cLUkXf z1Zu4AkEKpccZaJspmLWGSzGu6UTZ7UfVeR2Hcc2KI9oZB1qthmZ1+PZyGZ/Dy+z+zklC0xl XIpQPmnfy9+/1hj1LzJ+pe3HzEodtlVA+rdttSvA6nmHKIt8Ul6b/h1DFTmUT1lN1WbAGxmg CH1O26cz5nTrzdjoqC/b8PpZiT0kO5MKKgiu5S4PRIxW2+RA4H9nq7nztNZ1Y39bDpzwE5Sp bDHzd5owmLxMLZAINtCtQuRbSOcMjZlg4zohA9TQP9krGIk+qTR+H4CV22sWldSkVtsoTaA2 qNeSJhfHQY0TyQvFbqRsSNIe2gTDzzEQ8itsmdHHE/yzhcCVvlUzXhAT6pIN0OT+cdsTTfif MIcDboys92auTuJ7U+4jWF1+WUaJ8gDL69ThAsu7mGDBbm80P3vvUZ4fQM14NkxOnuGRrJxO qjWNJ2ZUxgyHAh5TCxMLKWZoL5hpnvx3dF3Ti9HW2dsUUWICSQARAQABtDJQaGlsaXBwZSBN YXRoaWV1LURhdWTDqSAoUGhpbCkgPHBoaWxtZEByZWRoYXQuY29tPokCVQQTAQgAPwIbDwYL CQgHAwIGFQgCCQoLBBYCAwECHgECF4AWIQSJweePYB7obIZ0lcuio/1u3q3A3gUCXsfWwAUJ KtymWgAKCRCio/1u3q3A3ircD/9Vjh3aFNJ3uF3hddeoFg1H038wZr/xi8/rX27M1Vj2j9VH 0B8Olp4KUQw/hyO6kUxqkoojmzRpmzvlpZ0cUiZJo2bQIWnvScyHxFCv33kHe+YEIqoJlaQc JfKYlbCoubz+02E2A6bFD9+BvCY0LBbEj5POwyKGiDMjHKCGuzSuDRbCn0Mz4kCa7nFMF5Jv piC+JemRdiBd6102ThqgIsyGEBXuf1sy0QIVyXgaqr9O2b/0VoXpQId7yY7OJuYYxs7kQoXI 6WzSMpmuXGkmfxOgbc/L6YbzB0JOriX0iRClxu4dEUg8Bs2pNnr6huY2Ft+qb41RzCJvvMyu gS32LfN0bTZ6Qm2A8ayMtUQgnwZDSO23OKgQWZVglGliY3ezHZ6lVwC24Vjkmq/2yBSLakZE 6DZUjZzCW1nvtRK05ebyK6tofRsx8xB8pL/kcBb9nCuh70aLR+5cmE41X4O+MVJbwfP5s/RW 9BFSL3qgXuXso/3XuWTQjJJGgKhB6xXjMmb1J4q/h5IuVV4juv1Fem9sfmyrh+Wi5V1IzKI7 RPJ3KVb937eBgSENk53P0gUorwzUcO+ASEo3Z1cBKkJSPigDbeEjVfXQMzNt0oDRzpQqH2vp apo2jHnidWt8BsckuWZpxcZ9+/9obQ55DyVQHGiTN39hkETy3Emdnz1JVHTU0Q== Message-ID: <9d8fdd74-feaf-27e3-9f09-26bbf7ebd779@redhat.com> Date: Tue, 18 Aug 2020 13:06:44 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Received-SPF: none client-ip=207.211.31.120; envelope-from=philmd@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 06:40:33 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Rikalo , Eduardo Habkost , Aleksandar Markovic , Cornelia Huck , Mark Cave-Ayland , qemu-devel@nongnu.org, Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Artyom Tarasenko , Thomas Huth , Paolo Bonzini , David Hildenbrand , Richard Henderson , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Aurelien Jarno , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/18/20 1:03 PM, Philippe Mathieu-Daudé wrote: > On 8/18/20 9:26 AM, Philippe Mathieu-Daudé wrote: >> On 8/18/20 5:33 AM, Thiago Jung Bauermann wrote: >>> Instead of setting CPUState::halted to 1 in main_cpu_reset(), use the >>> start-powered-off property which makes cpu_common_reset() initialize it >>> to 1 in common code. >>> >>> Also change creation of CPU object from cpu_create() to object_new() and >>> qdev_realize() because cpu_create() realizes the CPU and it's not possible to >>> set a property after the object is realized. >>> >>> Signed-off-by: Thiago Jung Bauermann >>> --- >>> hw/mips/cps.c | 16 ++++++++++++---- >>> 1 file changed, 12 insertions(+), 4 deletions(-) >>> >>> diff --git a/hw/mips/cps.c b/hw/mips/cps.c >>> index 615e1a1ad2..be85357dc0 100644 >>> --- a/hw/mips/cps.c >>> +++ b/hw/mips/cps.c >>> @@ -52,9 +52,6 @@ static void main_cpu_reset(void *opaque) >>> CPUState *cs = CPU(cpu); >>> >>> cpu_reset(cs); >>> - >>> - /* All VPs are halted on reset. Leave powering up to CPC. */ >>> - cs->halted = 1; >>> } >>> >>> static bool cpu_mips_itu_supported(CPUMIPSState *env) >>> @@ -76,7 +73,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) >>> bool saar_present = false; >>> >>> for (i = 0; i < s->num_vp; i++) { >>> - cpu = MIPS_CPU(cpu_create(s->cpu_type)); >>> + Error *err = NULL; >>> + >>> + cpu = MIPS_CPU(object_new(s->cpu_type)); >>> >>> /* Init internal devices */ >>> cpu_mips_irq_init_cpu(cpu); >>> @@ -89,7 +88,16 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) >>> env->itc_tag = mips_itu_get_tag_region(&s->itu); >>> env->itu = &s->itu; >>> } >>> + /* All VPs are halted on reset. Leave powering up to CPC. */ >>> + object_property_set_bool(OBJECT(cpu), "start-powered-off", true, >>> + &error_abort); >>> qemu_register_reset(main_cpu_reset, cpu); >>> + >>> + if (!qdev_realize(DEVICE(cpu), NULL, &err)) { >>> + error_report_err(err); >>> + object_unref(OBJECT(cpu)); >>> + exit(EXIT_FAILURE); >>> + } >> >> Here errp is available, so we can propagate the error to the caller: >> >> if (!qdev_realize(DEVICE(cpu), NULL, errp)) { > > Igor corrected me in the previous patch, to avoid leaking the > reference this snippet misses: > > object_unref(OBJECT(cpu)); Well this is simply: if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { > >> return; >> } >> >> For example in hw/mips/boston.c: >> >> object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS); >> object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type, >> &error_fatal); >> object_property_set_int(OBJECT(&s->cps), "num-vp", machine->smp.cpus, >> &error_fatal); >> sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); >> >> This will be propagated here ---------------^^^^^^^^^^^^^ >> >>> } >>> >>> cpu = MIPS_CPU(first_cpu); >>> >