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From: Auger Eric <eric.auger@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Robin Murphy <robin.murphy@arm.com>,
	zhangfei.gao@foxmail.com, QEMU Developers <qemu-devel@nongnu.org>,
	Peter Xu <peterx@redhat.com>, qemu-arm <qemu-arm@nongnu.org>,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
	Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>,
	Eric Auger <eric.auger.pro@gmail.com>
Subject: Re: [PATCH v3 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation
Date: Tue, 28 Jul 2020 17:09:42 +0200	[thread overview]
Message-ID: <9d9c93b8-9797-c18e-fc66-7f5bc6ebb0fd@redhat.com> (raw)
In-Reply-To: <CAFEAcA-zXyzq5ph3U0vFuqRz9=NEq-piw_9gsYbrwg=+g9nbXw@mail.gmail.com>

Hi Peter,

On 7/10/20 11:47 AM, Peter Maydell wrote:
> On Wed, 8 Jul 2020 at 15:20, Eric Auger <eric.auger@redhat.com> wrote:
>>
>> Expose the RIL bit so that the guest driver uses range
>> invalidation. Range invalidation being an SMMU3.2 feature,
>> let AIDR advertise SMMUv3.2 support.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
> I think that to advertise SMMUv3.2 we would also need to
> set the IDR3.BBML field to something non-zero. That means
> we need to analyze our implementation of the caching of page
> table structures to see if we need to do anything different
> (per the behaviours and guarantees described in section 3.21.1
> of the spec).
> 
> Alternatively, we could take advantage of the language
> in section 2.5 that says that a v3.x implementation is
> allowed to implement features from v3.(x+1), and just
> set the RIL bit while leaving AIDR advertising us as v3.1.
So I eventually lazily chose this solution. I will address BBML support
in a separate patch series.

Thanks

Eric
> 
> thanks
> -- PMM
> 



      parent reply	other threads:[~2020-07-28 15:12 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08 14:18 [PATCH v3 00/11] SMMUv3.2 Range-based TLB Invalidation Support Eric Auger
2020-07-08 14:18 ` [PATCH v3 01/11] hw/arm/smmu-common: Factorize some code in smmu_ptw_64() Eric Auger
2020-07-08 14:18 ` [PATCH v3 02/11] hw/arm/smmu-common: Add IOTLB helpers Eric Auger
2020-07-08 14:18 ` [PATCH v3 03/11] hw/arm/smmu: Introduce smmu_get_iotlb_key() Eric Auger
2020-07-08 14:18 ` [PATCH v3 04/11] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value Eric Auger
2020-07-08 14:18 ` [PATCH v3 05/11] hw/arm/smmu-common: Manage IOTLB block entries Eric Auger
2020-07-10  9:00   ` Peter Maydell
2020-07-10  9:02   ` Peter Maydell
2020-07-08 14:18 ` [PATCH v3 06/11] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper Eric Auger
2020-07-08 14:18 ` [PATCH v3 07/11] hw/arm/smmuv3: Get prepared for range invalidation Eric Auger
2020-07-10  9:06   ` Peter Maydell
2020-07-08 14:18 ` [PATCH v3 08/11] hw/arm/smmuv3: Fix IIDR offset Eric Auger
2020-07-10  9:08   ` Peter Maydell
2020-07-08 14:18 ` [PATCH v3 09/11] hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support Eric Auger
2020-07-10  9:10   ` Peter Maydell
2020-07-08 14:18 ` [PATCH v3 10/11] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support Eric Auger
2020-07-10  9:31   ` Peter Maydell
2020-07-08 14:18 ` [PATCH v3 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation Eric Auger
2020-07-10  9:47   ` Peter Maydell
2020-07-10 10:05     ` Auger Eric
2020-07-10 10:39       ` Peter Maydell
2020-07-28 15:09     ` Auger Eric [this message]

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