From: "Chatradhi, Naveen Krishna" <nchatrad@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: linux-edac@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org, mingo@redhat.com,
mchehab@kernel.org, yazen.ghannam@amd.com,
Muralidhara M K <muralimk@amd.com>
Subject: Re: [PATCH v6 1/5] x86/amd_nb: Add support for northbridges on Aldebaran
Date: Tue, 9 Nov 2021 17:00:11 +0530 [thread overview]
Message-ID: <9de7f807-32a6-b009-d8b7-28771c80bfaf@amd.com> (raw)
In-Reply-To: <YYl0l+XV/QRZieGY@zn.tnic>
Hi Boris,
On 11/9/2021 12:33 AM, Borislav Petkov wrote:
> [CAUTION: External Email]
>
> On Mon, Nov 08, 2021 at 10:23:49PM +0530, Chatradhi, Naveen Krishna wrote:
>> Northbridges on CPUs and GPUs can be described using the elements in the
>> above structure.
> If you're going to describe *northbridges*, then your struct cannot be called
> system_topology...
>
>> I thought organizing the data in a structure would simplify the
>> initialization of cpus and gpus.
> Ehh, did you even read my mail where I tried to explain that sprinkling
>
> if (gpu)
> this
> else
> that
>
> all over amd_cache_northbridges() is not proper design?
>
> ;-\
>
>> I will modify the patch to enumerate gpu northbridge info only if there are
>>
>> gpu nodes with pci_device to access the node_map registers.
> Why would you do that? What's the advantage?
>
> How about you answer my questions first so that we agree on the design
> first before you go and do things?
I was trying to handle both cpu and cpu northbridge enumeration in the
amd_cache_northbridges() itself by reusing the existing structures and APIs.
Should have seen this through more clearly. As, this is working well for
the following reasons.
a. Allocating the amd_northbridges.nb after identifying both the cpu and
gpu misc devices, would extend node_to_amd_nb(node) for both cpu and gpu
nodes.
It is used extensively in this module. However, the roots_per_misc
value is different in case of cpus and gpus and that needed to be
handled seperately.
b. amd_nb_num(void) is used by other modules in the kernel, returning
the total count of CPU and GPU northbridges would break the existing code.
I understood your point now.
When we create separate functions for caching cpu and gpu devices, is it
okay to create "struct amd_gpu_nb_info" with the following fields
a. gpu_num;
b. struct amd_northbridge *gpu_nb;
c. gpu_node_start_id;
While, amd_nb_num(), continues to return number of cpu NBs
Add new API amd_gpu_nb_num(), return number of gpu NBs
and modify the node_to_amd_nb(node) to extend the same behavior for gpu
devices also
Regards,
naveenk
>
> Hmm.
>
> --
> Regards/Gruss,
> Boris.
>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&data=04%7C01%7CNaveenKrishna.Chatradhi%40amd.com%7Cad9aea0ddff0446d80b108d9a2ea867d%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637719950521959255%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=PthEEyzphEyN3O1FrUcvKyMF%2FEb282qifUHPR6psFhg%3D&reserved=0
next prev parent reply other threads:[~2021-11-09 11:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 13:01 [PATCH v6 0/5] x86/edac/amd64: Add heterogeneous node support Naveen Krishna Chatradhi
2021-10-28 13:01 ` [PATCH v6 1/5] x86/amd_nb: Add support for northbridges on Aldebaran Naveen Krishna Chatradhi
2021-11-01 17:28 ` Borislav Petkov
2021-11-02 18:03 ` Borislav Petkov
2021-11-04 13:18 ` Chatradhi, Naveen Krishna
2021-11-08 13:34 ` Borislav Petkov
2021-11-08 16:53 ` Chatradhi, Naveen Krishna
2021-11-08 19:03 ` Borislav Petkov
2021-11-09 11:30 ` Chatradhi, Naveen Krishna [this message]
2021-11-09 20:41 ` Borislav Petkov
2021-11-04 13:21 ` Chatradhi, Naveen Krishna
2021-10-28 13:01 ` [PATCH v6 2/5] EDAC/mce_amd: Extract node id from MCA_IPID Naveen Krishna Chatradhi
2021-11-08 13:37 ` Borislav Petkov
2021-10-28 13:01 ` [PATCH v6 3/5] EDAC/amd64: Extend family ops functions Naveen Krishna Chatradhi
2021-11-10 17:45 ` Borislav Petkov
2021-11-11 16:23 ` Chatradhi, Naveen Krishna
2021-11-11 18:05 ` Borislav Petkov
2021-11-12 20:59 ` Yazen Ghannam
2021-11-13 11:58 ` Borislav Petkov
2021-10-28 13:01 ` [PATCH v6 4/5] EDAC/amd64: Move struct fam_type into amd64_pvt structure Naveen Krishna Chatradhi
2021-11-11 12:39 ` Borislav Petkov
2021-11-11 16:26 ` Chatradhi, Naveen Krishna
2021-10-28 13:01 ` [PATCH v6 5/5] EDAC/amd64: Enumerate memory on Aldebaran GPU nodes Naveen Krishna Chatradhi
2021-11-11 13:12 ` Borislav Petkov
2021-11-15 15:24 ` Chatradhi, Naveen Krishna
2021-11-15 16:04 ` Borislav Petkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9de7f807-32a6-b009-d8b7-28771c80bfaf@amd.com \
--to=nchatrad@amd.com \
--cc=bp@alien8.de \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mchehab@kernel.org \
--cc=mingo@redhat.com \
--cc=muralimk@amd.com \
--cc=x86@kernel.org \
--cc=yazen.ghannam@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.