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Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [RFC PATCH 12/15] hw/m68k: Restrict M68kCPU type to target/ code Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org References: <20220209215446.58402-1-f4bug@amsat.org> <20220209215446.58402-13-f4bug@amsat.org> <8070b23a-7072-58a2-f3dd-fbf5f626674a@linaro.org> <40db7e28-2399-9ff5-6d5c-2c61a95a25cf@amsat.org> From: Richard Henderson In-Reply-To: <40db7e28-2399-9ff5-6d5c-2c61a95a25cf@amsat.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62e (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Thomas Huth Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/10/22 10:09, Philippe Mathieu-Daudé wrote: > On 9/2/22 23:50, Richard Henderson wrote: >> On 2/10/22 08:54, Philippe Mathieu-Daudé wrote: >>> Signed-off-by: Philippe Mathieu-Daudé >>> --- >>>   include/hw/m68k/mcf.h | 3 +-- >>>   target/m68k/cpu-qom.h | 2 -- >>>   target/m68k/cpu.h     | 4 ++-- >>>   3 files changed, 3 insertions(+), 6 deletions(-) >>> >>> diff --git a/include/hw/m68k/mcf.h b/include/hw/m68k/mcf.h >>> index 8cbd587bbf..e84fcfb4ca 100644 >>> --- a/include/hw/m68k/mcf.h >>> +++ b/include/hw/m68k/mcf.h >>> @@ -3,7 +3,6 @@ >>>   /* Motorola ColdFire device prototypes.  */ >>>   #include "exec/hwaddr.h" >>> -#include "target/m68k/cpu-qom.h" >>>   /* mcf_uart.c */ >>>   uint64_t mcf_uart_read(void *opaque, hwaddr addr, >>> @@ -16,7 +15,7 @@ void mcf_uart_mm_init(hwaddr base, qemu_irq irq, Chardev *chr); >>>   /* mcf_intc.c */ >>>   qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem, >>>                           hwaddr base, >>> -                        M68kCPU *cpu); >>> +                        ArchCPU *cpu); >>>   /* mcf5206.c */ >>>   #define TYPE_MCF5206_MBAR "mcf5206-mbar" >> >> This part is ok. >> >>> diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h >>> index c2c0736b3b..ec75adad69 100644 >>> --- a/target/m68k/cpu-qom.h >>> +++ b/target/m68k/cpu-qom.h >>> @@ -25,8 +25,6 @@ >>>   #define TYPE_M68K_CPU "m68k-cpu" >>> -typedef struct ArchCPU M68kCPU; >>> - >>>   OBJECT_DECLARE_TYPE(ArchCPU, M68kCPUClass, >>>                       M68K_CPU) >>> diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h >>> index 872e8ce637..90be69e714 100644 >>> --- a/target/m68k/cpu.h >>> +++ b/target/m68k/cpu.h >>> @@ -156,14 +156,14 @@ typedef struct CPUArchState { >>>    * >>>    * A Motorola 68k CPU. >>>    */ >>> -struct ArchCPU { >>> +typedef struct ArchCPU { >>>       /*< private >*/ >>>       CPUState parent_obj; >>>       /*< public >*/ >>>       CPUNegativeOffsetState neg; >>>       CPUM68KState env; >>> -}; >>> +} M68kCPU; >> >> I don't like these.  Rationale? > > Short-term idea: hw/ models only have access to cpu-qom.h declarations > and opaque pointers to generic CPU objects. > > hw/ should not include cpu.h at all. By restricting FooCPU to target/ > code, hw/ files fail to compile if using FooCPU and not ArchCPU. Yes, that would be ideal. If you do want to bring the typedef into cpu.h, please keep it separate; it's easier to read. Especially since one normally expects typedef struct Foo { ... } Foo; and that's not what's happening here. > Long-term idea, each target/ is built as a module, exposing an uniform > arch-API. That would be awesome, yes. > I'm still prototyping to see how to disentangle arch-specific hw which > access CPU internals (such ARM NVIC or MIPS ITU). Complicated, yes. If it comes to it, I would not be opposed to having these tightly coupled devices live in target/, but let's see if you can avoid it. r~