From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71B56C433F5 for ; Sat, 21 May 2022 00:17:13 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BBBD18334E; Sat, 21 May 2022 02:17:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b="QSTTmZkL"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BC8AE83AE2; Sat, 21 May 2022 02:17:06 +0200 (CEST) Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0258683349 for ; Sat, 21 May 2022 02:17:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=googlemail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=chf.fritz@googlemail.com Received: by mail-wr1-x42d.google.com with SMTP id u3so13410869wrg.3 for ; Fri, 20 May 2022 17:17:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20210112; h=message-id:subject:from:reply-to:to:cc:date:in-reply-to:references :user-agent:mime-version:content-transfer-encoding; bh=J8kSeqGv+wtX087xdzkViC/uqbxktSqNtY9FJ3roxDU=; b=QSTTmZkLmqCWcKdrnKVV/5sG/RtTHss5bZDMT7COf3tO2r3SMBWiZ4VwoUlEvlPSP2 VISR2cLhTd9aNPesLXeKU69xvHc610kjJRyIDPDkzjOO24V5FRQS5DGw2rmHYeTWEt+d uRzs3Rw+fwugI0puGiBwKTzaBMh9xrxskLBDN+QZnMeV9qRzSxodDLykljUDd1Auf5o/ aq0M6ayTNb1kwBUoGTmi1WDaUdm6jwa3ya9ztD0txlRkO5VuwcFPYgHVtspO6ZAKUYUY yrqBO04icI2HleosnctGLAjkoUQ0aQw5m7Fm8HP7JHPLJE4lta7cDbmh3DJgjjKEDpVX Z5rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:subject:from:reply-to:to:cc:date :in-reply-to:references:user-agent:mime-version :content-transfer-encoding; bh=J8kSeqGv+wtX087xdzkViC/uqbxktSqNtY9FJ3roxDU=; b=o96IEH/p2eQqRpE5G5hI/uSnsNOrbLdE3k9qGk3v1BMH8+D/C+YgruMdfjOt2tqfpm 510CbTncQYFvCbNvgg9FsbUsuqT4UAzttyMOryMU1br2PIHAUgPVqt6ETPVXFeWA2Xou H8Wo+r7S/LgPl+BaWJbMFH97JvGNrBIfJY48YIFrK6J2FIL4sEriNLRcl8Dqmql67oHA wINyybyt1V+v0O0XdTtqN1wAebbip1qLdK/Qrgf6JzNR6SwEQBxNL1PJlZGyf9PonjNd BadYXe/JX4y6ntAQvWTUPyGMxakcGsJEm5VnPMhD1AhiDOvUNT0jXc++OHzc9RqoUEoT QiAA== X-Gm-Message-State: AOAM530n8i2L5tcmia9/Ig0FIXL7gMGQ1qHS9J+KwFBdvdMH+u8r0I2A WUl33EGaTIA/DoJEbpSbuTo= X-Google-Smtp-Source: ABdhPJzvXQ/ljh3HXK7FFJxsDdDd58LvkUOX71RHB/tj+zIHv3LQmGy67Lg2Xa6CpM0rYkT5le0SEw== X-Received: by 2002:adf:ae09:0:b0:20e:e4f0:2133 with SMTP id x9-20020adfae09000000b0020ee4f02133mr4266344wrc.104.1653092222489; Fri, 20 May 2022 17:17:02 -0700 (PDT) Received: from mars.fritz.box ([2a02:8070:bb0:8700:3e7c:3fff:fe20:2cae]) by smtp.gmail.com with ESMTPSA id t10-20020a1c770a000000b003942a244f57sm2957867wmi.48.2022.05.20.17.17.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 May 2022 17:17:01 -0700 (PDT) Message-ID: <9e29d4f808e754e6e8f597fda8081673084f7da8.camel@googlemail.com> Subject: Re: [RESEND PATCH] gpio: rgpio2p: Enhance reading of GPIO pin value From: Christoph Fritz To: Stefano Babic Cc: u-boot , Peng Fan , Fabio Estevam , Tom Rini Date: Sat, 21 May 2022 02:17:00 +0200 In-Reply-To: References: <9be9017e32432390c565202b1e61a81eb66a6b27.camel@googlemail.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: chf.fritz@googlemail.com Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean *ping* On Sat, 2022-04-23 at 22:37 +0200, Christoph Fritz wrote: > Hello Stefano, > >  could you please pick up this patch? > > bye >  -- Christoph > > On Tue, 2022-04-05 at 12:29 +0200, Christoph Fritz wrote: > > Add support for reading GPIO pin value when function is output. > > With this patch applied, gpio toggle command is working. > > > > Signed-off-by: Christoph Fritz > > Reviewed-by: Peng Fan > > Reviewed-by: Fabio Estevam > > --- > >  drivers/gpio/imx_rgpio2p.c | 14 +++++++++++++- > >  1 file changed, 13 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c > > index 0e2874ca95c..175e460aff5 100644 > > --- a/drivers/gpio/imx_rgpio2p.c > > +++ b/drivers/gpio/imx_rgpio2p.c > > @@ -39,6 +39,14 @@ static int imx_rgpio2p_is_output(struct gpio_regs > > *regs, int offset) > >         return val & (1 << offset) ? 1 : 0; > >  } > >   > > +static int imx_rgpio2p_bank_get_direction(struct gpio_regs *regs, > > int offset) > > +{ > > +       if ((readl(®s->gpio_pddr) >> offset) & 0x01) > > +               return IMX_RGPIO2P_DIRECTION_OUT; > > + > > +       return IMX_RGPIO2P_DIRECTION_IN; > > +} > > + > >  static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int > > offset, > >                                     enum imx_rgpio2p_direction > > direction) > >  { > > @@ -67,7 +75,11 @@ static void imx_rgpio2p_bank_set_value(struct > > gpio_regs *regs, int offset, > >   > >  static int imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int > > offset) > >  { > > -       return (readl(®s->gpio_pdir) >> offset) & 0x01; > > +       if (imx_rgpio2p_bank_get_direction(regs, offset) == > > +           IMX_RGPIO2P_DIRECTION_IN) > > +               return (readl(®s->gpio_pdir) >> offset) & 0x01; > > + > > +       return (readl(®s->gpio_pdor) >> offset) & 0x01; > >  } > >   > >  static int  imx_rgpio2p_direction_input(struct udevice *dev, > > unsigned offset) >