[PATCH 00/41] Chromebook Plus (aka kevin) kernel patches

[PATCH 00/41] Chromebook Plus (aka kevin) kernel patches

[Sean Paul]

Despite our best intentions (and we did a decent job this time around) of submitting
upstream first for the Chromebook Plus, we had a number of patches slip through the
cracks. This series includes all but one of those patches. The outlier breaks my
veyron board, so I dropped it.

The patches have been tested on the Chromebook Plus in our downstream kernel, and
my veyron-jaq board with an upstream kernel. They have also been compile tested
using the drm-misc configs.

Sean


Douglas Anderson (4):
  drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner
  drm/bridge: analogix_dp: Split the platform-specific poweron in two
    parts
  drm/bridge: analogix_dp: Properly log AUX CH errors
  drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

Haixia Shi (1):
  drm/rockchip: support prime import sg table

Lin Huang (6):
  drm/bridge: analogix_dp: Move enable video into config_video()
  drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer
  drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the
    panel
  drm/bridge: analogix_dp: Extend hpd check time to 100ms
  drm/bridge: analogix_dp: Check dpcd write/read status
  drm/bridge: analogix_dp: Reset aux channel if an error occurred

Mark Yao (1):
  drm/rockchip: pre dither down when output bpc is 8bit

Sean Paul (3):
  drm/panel: simple: Change mode for Sharp lq123p1jx31
  drm/rockchip: Don't use atomic constructs for psr
  drm/rockchip: Remove analogix psr worker

Tomasz Figa (6):
  drm/rockchip: Get rid of some unnecessary code
  drm/rockchip: Flush PSR before committing modeset disables/enables
  drm/bridge: analogix_dp: Allow master driver to cleanup in unbind
  drm/rockchip: analogix_dp: Fix invalid implementation of unbind
  drm/bridge: analogix_dp: Add analogix_dp_shutdown
  drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR

Yakir Yang (1):
  drm/bridge: analogix_dp: detect Sink PSR state after configuring the
    PSR

zain wang (18):
  drm/bridge: analogix_dp: set psr activate/deactivate when
    enable/disable bridge
  drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind
  drm/bridge: analogix_dp: Don't change psr while bridge is disabled
  drm/rockchip: add mutex vop lock
  drm/bridge: analogix_dp: add fast link train for eDP
  drm/rockchip: Only wait for panel ACK on PSR entry
  drm/bridge: analogix_dp: Don't use fast link training when panel just
    powered up
  drm/bridge: analogix_dp: Retry bridge enable when it failed
  drm/bridge: analogix_dp: Wait for HPD signal before configuring link
  drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy
  drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode
  drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip
  drm/rockchip: Restore psr->state when enable/disable psr failed
  drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll
  drm/bridge: analogix_dp: Fix timeout of video streamclk config
  drm/bridge: analogix_dp: Fix incorrect operations with register
    ANALOGIX_DP_FUNC_EN_1
  drm/bridge: analogix_dp: Move fast link training detect to set_bridge
  drm/rockchip: Disable VOP windows when PSR is active

Ørjan Eide (1):
  drm/rockchip: Respect page offset for PRIME mmap calls

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 471 +++++++++++++++------
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  14 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 273 +++++++-----
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   7 +
 drivers/gpu/drm/exynos/exynos_dp.c                 |   2 +-
 drivers/gpu/drm/panel/panel-simple.c               |   7 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 129 +++---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   3 +-
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c         |  13 +
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c        | 125 +++++-
 drivers/gpu/drm/rockchip/rockchip_drm_gem.h        |   5 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 112 ++---
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |   6 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c        |  81 +++-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h        |   1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c        |   6 +-
 include/drm/bridge/analogix_dp.h                   |   7 +-
 18 files changed, 882 insertions(+), 384 deletions(-)

-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31

[Sean Paul]

Change the mode for Sharp lq123p1jx31 panel to something more
rockchip-friendly such that we can use the fixed PLLs to
generate the pixel clock

Cc: Chris Zhong <zyw@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/panel/panel-simple.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 89eb0422821c..787b4d143220 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1598,17 +1598,18 @@ static const struct panel_desc sharp_lq101k1ly04 = {
 };
 
 static const struct drm_display_mode sharp_lq123p1jx31_mode = {
-	.clock = 252750,
+	.clock = 266667,
 	.hdisplay = 2400,
 	.hsync_start = 2400 + 48,
 	.hsync_end = 2400 + 48 + 32,
-	.htotal = 2400 + 48 + 32 + 80,
+	.htotal = 2400 + 48 + 32 + 139,
 	.vdisplay = 1600,
 	.vsync_start = 1600 + 3,
 	.vsync_end = 1600 + 3 + 10,
-	.vtotal = 1600 + 3 + 10 + 33,
+	.vtotal = 1600 + 3 + 10 + 84,
 	.vrefresh = 60,
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+	.type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER,
 };
 
 static const struct panel_desc sharp_lq123p1jx31 = {
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 02/41] drm/rockchip: Get rid of some unnecessary code

[Sean Paul]

From: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Current code implements prepare_fb and cleanup_fb callbacks only to
grab/release fb references, which is already done by atomic framework
when creating/destryoing plane state. Also there are some unused fields
vop and vop_win structs. Let's remove these unused bits.

Signed-off-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 2151e1cee4b4..0539afb6b7c8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -108,9 +108,6 @@ struct vop {
 	struct drm_device *drm_dev;
 	bool is_enabled;
 
-	/* mutex vsync_ work */
-	struct mutex vsync_mutex;
-	bool vsync_work_pending;
 	struct completion dsp_hold_completion;
 
 	/* protected by dev->event_lock */
@@ -1592,8 +1589,6 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	spin_lock_init(&vop->reg_lock);
 	spin_lock_init(&vop->irq_lock);
 
-	mutex_init(&vop->vsync_mutex);
-
 	ret = devm_request_irq(dev, vop->irq, vop_isr,
 			       IRQF_SHARED, dev_name(dev), vop);
 	if (ret)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 02/41] drm/rockchip: Get rid of some unnecessary code

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

Current code implements prepare_fb and cleanup_fb callbacks only to
grab/release fb references, which is already done by atomic framework
when creating/destryoing plane state. Also there are some unused fields
vop and vop_win structs. Let's remove these unused bits.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 2151e1cee4b4..0539afb6b7c8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -108,9 +108,6 @@ struct vop {
 	struct drm_device *drm_dev;
 	bool is_enabled;
 
-	/* mutex vsync_ work */
-	struct mutex vsync_mutex;
-	bool vsync_work_pending;
 	struct completion dsp_hold_completion;
 
 	/* protected by dev->event_lock */
@@ -1592,8 +1589,6 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 	spin_lock_init(&vop->reg_lock);
 	spin_lock_init(&vop->irq_lock);
 
-	mutex_init(&vop->vsync_mutex);
-
 	ret = devm_request_irq(dev, vop->irq, vop_isr,
 			       IRQF_SHARED, dev_name(dev), vop);
 	if (ret)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 03/41] drm/rockchip: support prime import sg table

From: Haixia Shi <hshi@chromium.org>

The prime fd to handle ioctl was not used with rockchip before. Support
was added in order to pass graphics_Gbm and to support potential uses
within Chrome OS (e.g. zero-copy video decode, camera).

Signed-off-by: Haixia Shi <hshi@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c |   1 +
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 118 ++++++++++++++++++++++++++--
 drivers/gpu/drm/rockchip/rockchip_drm_gem.h |   5 +-
 3 files changed, 115 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index ccf456938792..1e371b7a1506 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -238,6 +238,7 @@ static struct drm_driver rockchip_drm_driver = {
 	.gem_prime_import	= drm_gem_prime_import,
 	.gem_prime_export	= drm_gem_prime_export,
 	.gem_prime_get_sg_table	= rockchip_gem_prime_get_sg_table,
+	.gem_prime_import_sg_table	= rockchip_gem_prime_import_sg_table,
 	.gem_prime_vmap		= rockchip_gem_prime_vmap,
 	.gem_prime_vunmap	= rockchip_gem_prime_vunmap,
 	.gem_prime_mmap		= rockchip_gem_mmap_buf,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index df9e57064f19..5dffe276d2a7 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -16,6 +16,8 @@
 #include <drm/drmP.h>
 #include <drm/drm_gem.h>
 #include <drm/drm_vma_manager.h>
+
+#include <linux/dma-buf.h>
 #include <linux/iommu.h>
 
 #include "rockchip_drm_drv.h"
@@ -308,12 +310,10 @@ static void rockchip_gem_release_object(struct rockchip_gem_object *rk_obj)
 }
 
 struct rockchip_gem_object *
-	rockchip_gem_create_object(struct drm_device *drm, unsigned int size,
-				   bool alloc_kmap)
+	rockchip_gem_alloc_object(struct drm_device *drm, unsigned int size)
 {
 	struct rockchip_gem_object *rk_obj;
 	struct drm_gem_object *obj;
-	int ret;
 
 	size = round_up(size, PAGE_SIZE);
 
@@ -325,6 +325,20 @@ struct rockchip_gem_object *
 
 	drm_gem_object_init(drm, obj, size);
 
+	return rk_obj;
+}
+
+struct rockchip_gem_object *
+rockchip_gem_create_object(struct drm_device *drm, unsigned int size,
+			   bool alloc_kmap)
+{
+	struct rockchip_gem_object *rk_obj;
+	int ret;
+
+	rk_obj = rockchip_gem_alloc_object(drm, size);
+	if (IS_ERR(rk_obj))
+		return rk_obj;
+
 	ret = rockchip_gem_alloc_buf(rk_obj, alloc_kmap);
 	if (ret)
 		goto err_free_rk_obj;
@@ -342,11 +356,21 @@ struct rockchip_gem_object *
  */
 void rockchip_gem_free_object(struct drm_gem_object *obj)
 {
-	struct rockchip_gem_object *rk_obj;
-
-	rk_obj = to_rockchip_obj(obj);
+	struct drm_device *drm = obj->dev;
+	struct rockchip_drm_private *private = drm->dev_private;
+	struct rockchip_gem_object *rk_obj = to_rockchip_obj(obj);
 
-	rockchip_gem_free_buf(rk_obj);
+	if (obj->import_attach) {
+		if (private->domain) {
+			rockchip_gem_iommu_unmap(rk_obj);
+		} else {
+			dma_unmap_sg(drm->dev, rk_obj->sgt->sgl,
+				     rk_obj->sgt->nents, DMA_BIDIRECTIONAL);
+		}
+		drm_prime_gem_destroy(obj, rk_obj->sgt);
+	} else {
+		rockchip_gem_free_buf(rk_obj);
+	}
 
 	rockchip_gem_release_object(rk_obj);
 }
@@ -476,6 +500,86 @@ struct sg_table *rockchip_gem_prime_get_sg_table(struct drm_gem_object *obj)
 	return sgt;
 }
 
+static unsigned long rockchip_sg_get_contiguous_size(struct sg_table *sgt,
+						     int count)
+{
+	struct scatterlist *s;
+	dma_addr_t expected = sg_dma_address(sgt->sgl);
+	unsigned int i;
+	unsigned long size = 0;
+
+	for_each_sg(sgt->sgl, s, count, i) {
+		if (sg_dma_address(s) != expected)
+			break;
+		expected = sg_dma_address(s) + sg_dma_len(s);
+		size += sg_dma_len(s);
+	}
+	return size;
+}
+
+static int
+rockchip_gem_iommu_map_sg(struct drm_device *drm,
+			  struct dma_buf_attachment *attach,
+			  struct sg_table *sg,
+			  struct rockchip_gem_object *rk_obj)
+{
+	rk_obj->sgt = sg;
+	return rockchip_gem_iommu_map(rk_obj);
+}
+
+static int
+rockchip_gem_dma_map_sg(struct drm_device *drm,
+			struct dma_buf_attachment *attach,
+			struct sg_table *sg,
+			struct rockchip_gem_object *rk_obj)
+{
+	int count = dma_map_sg(drm->dev, sg->sgl, sg->nents,
+			       DMA_BIDIRECTIONAL);
+	if (!count)
+		return -EINVAL;
+
+	if (rockchip_sg_get_contiguous_size(sg, count) < attach->dmabuf->size) {
+		DRM_ERROR("failed to map sg_table to contiguous linear address.\n");
+		dma_unmap_sg(drm->dev, sg->sgl, sg->nents,
+			     DMA_BIDIRECTIONAL);
+		return -EINVAL;
+	}
+
+	rk_obj->dma_addr = sg_dma_address(sg->sgl);
+	rk_obj->sgt = sg;
+	return 0;
+}
+
+struct drm_gem_object *
+rockchip_gem_prime_import_sg_table(struct drm_device *drm,
+				   struct dma_buf_attachment *attach,
+				   struct sg_table *sg)
+{
+	struct rockchip_drm_private *private = drm->dev_private;
+	struct rockchip_gem_object *rk_obj;
+	int ret;
+
+	rk_obj = rockchip_gem_alloc_object(drm, attach->dmabuf->size);
+	if (IS_ERR(rk_obj))
+		return ERR_CAST(rk_obj);
+
+	if (private->domain)
+		ret = rockchip_gem_iommu_map_sg(drm, attach, sg, rk_obj);
+	else
+		ret = rockchip_gem_dma_map_sg(drm, attach, sg, rk_obj);
+
+	if (ret < 0) {
+		DRM_ERROR("failed to import sg table: %d\n", ret);
+		goto err_free_rk_obj;
+	}
+
+	return &rk_obj->base;
+
+err_free_rk_obj:
+	rockchip_gem_release_object(rk_obj);
+	return ERR_PTR(ret);
+}
+
 void *rockchip_gem_prime_vmap(struct drm_gem_object *obj)
 {
 	struct rockchip_gem_object *rk_obj = to_rockchip_obj(obj);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
index 3f6ea4d18a5c..89209a5f5e2c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
@@ -36,8 +36,9 @@ struct rockchip_gem_object {
 
 struct sg_table *rockchip_gem_prime_get_sg_table(struct drm_gem_object *obj);
 struct drm_gem_object *
-rockchip_gem_prime_import_sg_table(struct drm_device *dev, size_t size,
-				   struct sg_table *sgt);
+rockchip_gem_prime_import_sg_table(struct drm_device *dev,
+				   struct dma_buf_attachment *attach,
+				   struct sg_table *sg);
 void *rockchip_gem_prime_vmap(struct drm_gem_object *obj);
 void rockchip_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 03/41] drm/rockchip: support prime import sg table

[Sean Paul]

From: Haixia Shi <hshi@chromium.org>

The prime fd to handle ioctl was not used with rockchip before. Support
was added in order to pass graphics_Gbm and to support potential uses
within Chrome OS (e.g. zero-copy video decode, camera).

Signed-off-by: Haixia Shi <hshi@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c |   1 +
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 118 ++++++++++++++++++++++++++--
 drivers/gpu/drm/rockchip/rockchip_drm_gem.h |   5 +-
 3 files changed, 115 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index ccf456938792..1e371b7a1506 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -238,6 +238,7 @@ static struct drm_driver rockchip_drm_driver = {
 	.gem_prime_import	= drm_gem_prime_import,
 	.gem_prime_export	= drm_gem_prime_export,
 	.gem_prime_get_sg_table	= rockchip_gem_prime_get_sg_table,
+	.gem_prime_import_sg_table	= rockchip_gem_prime_import_sg_table,
 	.gem_prime_vmap		= rockchip_gem_prime_vmap,
 	.gem_prime_vunmap	= rockchip_gem_prime_vunmap,
 	.gem_prime_mmap		= rockchip_gem_mmap_buf,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index df9e57064f19..5dffe276d2a7 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -16,6 +16,8 @@
 #include <drm/drmP.h>
 #include <drm/drm_gem.h>
 #include <drm/drm_vma_manager.h>
+
+#include <linux/dma-buf.h>
 #include <linux/iommu.h>
 
 #include "rockchip_drm_drv.h"
@@ -308,12 +310,10 @@ static void rockchip_gem_release_object(struct rockchip_gem_object *rk_obj)
 }
 
 struct rockchip_gem_object *
-	rockchip_gem_create_object(struct drm_device *drm, unsigned int size,
-				   bool alloc_kmap)
+	rockchip_gem_alloc_object(struct drm_device *drm, unsigned int size)
 {
 	struct rockchip_gem_object *rk_obj;
 	struct drm_gem_object *obj;
-	int ret;
 
 	size = round_up(size, PAGE_SIZE);
 
@@ -325,6 +325,20 @@ struct rockchip_gem_object *
 
 	drm_gem_object_init(drm, obj, size);
 
+	return rk_obj;
+}
+
+struct rockchip_gem_object *
+rockchip_gem_create_object(struct drm_device *drm, unsigned int size,
+			   bool alloc_kmap)
+{
+	struct rockchip_gem_object *rk_obj;
+	int ret;
+
+	rk_obj = rockchip_gem_alloc_object(drm, size);
+	if (IS_ERR(rk_obj))
+		return rk_obj;
+
 	ret = rockchip_gem_alloc_buf(rk_obj, alloc_kmap);
 	if (ret)
 		goto err_free_rk_obj;
@@ -342,11 +356,21 @@ struct rockchip_gem_object *
  */
 void rockchip_gem_free_object(struct drm_gem_object *obj)
 {
-	struct rockchip_gem_object *rk_obj;
-
-	rk_obj = to_rockchip_obj(obj);
+	struct drm_device *drm = obj->dev;
+	struct rockchip_drm_private *private = drm->dev_private;
+	struct rockchip_gem_object *rk_obj = to_rockchip_obj(obj);
 
-	rockchip_gem_free_buf(rk_obj);
+	if (obj->import_attach) {
+		if (private->domain) {
+			rockchip_gem_iommu_unmap(rk_obj);
+		} else {
+			dma_unmap_sg(drm->dev, rk_obj->sgt->sgl,
+				     rk_obj->sgt->nents, DMA_BIDIRECTIONAL);
+		}
+		drm_prime_gem_destroy(obj, rk_obj->sgt);
+	} else {
+		rockchip_gem_free_buf(rk_obj);
+	}
 
 	rockchip_gem_release_object(rk_obj);
 }
@@ -476,6 +500,86 @@ struct sg_table *rockchip_gem_prime_get_sg_table(struct drm_gem_object *obj)
 	return sgt;
 }
 
+static unsigned long rockchip_sg_get_contiguous_size(struct sg_table *sgt,
+						     int count)
+{
+	struct scatterlist *s;
+	dma_addr_t expected = sg_dma_address(sgt->sgl);
+	unsigned int i;
+	unsigned long size = 0;
+
+	for_each_sg(sgt->sgl, s, count, i) {
+		if (sg_dma_address(s) != expected)
+			break;
+		expected = sg_dma_address(s) + sg_dma_len(s);
+		size += sg_dma_len(s);
+	}
+	return size;
+}
+
+static int
+rockchip_gem_iommu_map_sg(struct drm_device *drm,
+			  struct dma_buf_attachment *attach,
+			  struct sg_table *sg,
+			  struct rockchip_gem_object *rk_obj)
+{
+	rk_obj->sgt = sg;
+	return rockchip_gem_iommu_map(rk_obj);
+}
+
+static int
+rockchip_gem_dma_map_sg(struct drm_device *drm,
+			struct dma_buf_attachment *attach,
+			struct sg_table *sg,
+			struct rockchip_gem_object *rk_obj)
+{
+	int count = dma_map_sg(drm->dev, sg->sgl, sg->nents,
+			       DMA_BIDIRECTIONAL);
+	if (!count)
+		return -EINVAL;
+
+	if (rockchip_sg_get_contiguous_size(sg, count) < attach->dmabuf->size) {
+		DRM_ERROR("failed to map sg_table to contiguous linear address.\n");
+		dma_unmap_sg(drm->dev, sg->sgl, sg->nents,
+			     DMA_BIDIRECTIONAL);
+		return -EINVAL;
+	}
+
+	rk_obj->dma_addr = sg_dma_address(sg->sgl);
+	rk_obj->sgt = sg;
+	return 0;
+}
+
+struct drm_gem_object *
+rockchip_gem_prime_import_sg_table(struct drm_device *drm,
+				   struct dma_buf_attachment *attach,
+				   struct sg_table *sg)
+{
+	struct rockchip_drm_private *private = drm->dev_private;
+	struct rockchip_gem_object *rk_obj;
+	int ret;
+
+	rk_obj = rockchip_gem_alloc_object(drm, attach->dmabuf->size);
+	if (IS_ERR(rk_obj))
+		return ERR_CAST(rk_obj);
+
+	if (private->domain)
+		ret = rockchip_gem_iommu_map_sg(drm, attach, sg, rk_obj);
+	else
+		ret = rockchip_gem_dma_map_sg(drm, attach, sg, rk_obj);
+
+	if (ret < 0) {
+		DRM_ERROR("failed to import sg table: %d\n", ret);
+		goto err_free_rk_obj;
+	}
+
+	return &rk_obj->base;
+
+err_free_rk_obj:
+	rockchip_gem_release_object(rk_obj);
+	return ERR_PTR(ret);
+}
+
 void *rockchip_gem_prime_vmap(struct drm_gem_object *obj)
 {
 	struct rockchip_gem_object *rk_obj = to_rockchip_obj(obj);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
index 3f6ea4d18a5c..89209a5f5e2c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
@@ -36,8 +36,9 @@ struct rockchip_gem_object {
 
 struct sg_table *rockchip_gem_prime_get_sg_table(struct drm_gem_object *obj);
 struct drm_gem_object *
-rockchip_gem_prime_import_sg_table(struct drm_device *dev, size_t size,
-				   struct sg_table *sgt);
+rockchip_gem_prime_import_sg_table(struct drm_device *dev,
+				   struct dma_buf_attachment *attach,
+				   struct sg_table *sg);
 void *rockchip_gem_prime_vmap(struct drm_gem_object *obj);
 void rockchip_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls

[Sean Paul]

From: Ørjan Eide <orjan.eide@arm.com>

When mapping external DMA-bufs through the PRIME mmap call, we might be
given an offset which has to be respected. However for the internal DRM
GEM mmap path, we have to ignore the fake mmap offset used to identify
the buffer only. Currently the code always zeroes out vma->vm_pgoff,
which breaks the former.

This patch fixes the problem by moving the vm_pgoff assignment to a
function that is used only for GEM mmap path, so that the PRIME path
retains the original offset.

BUG=chrome-os-partner:56615
TEST=graphics_GLBench

Cc: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Ørjan Eide <orjan.eide@arm.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index 5dffe276d2a7..7fa2cb77bdc0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -263,7 +263,6 @@ static int rockchip_drm_gem_object_mmap(struct drm_gem_object *obj,
 	 * VM_PFNMAP flag that was set by drm_gem_mmap_obj()/drm_gem_mmap().
 	 */
 	vma->vm_flags &= ~VM_PFNMAP;
-	vma->vm_pgoff = 0;
 
 	if (rk_obj->pages)
 		ret = rockchip_drm_gem_object_mmap_iommu(obj, vma);
@@ -298,6 +297,12 @@ int rockchip_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	if (ret)
 		return ret;
 
+	/*
+	 * Set vm_pgoff (used as a fake buffer offset by DRM) to 0 and map the
+	 * whole buffer from the start.
+	 */
+	vma->vm_pgoff = 0;
+
 	obj = vma->vm_private_data;
 
 	return rockchip_drm_gem_object_mmap(obj, vma);
-- 
2.12.0.246.ga2ecc84866-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls

[Sean Paul]

From: ?rjan Eide <orjan.eide@arm.com>

When mapping external DMA-bufs through the PRIME mmap call, we might be
given an offset which has to be respected. However for the internal DRM
GEM mmap path, we have to ignore the fake mmap offset used to identify
the buffer only. Currently the code always zeroes out vma->vm_pgoff,
which breaks the former.

This patch fixes the problem by moving the vm_pgoff assignment to a
function that is used only for GEM mmap path, so that the PRIME path
retains the original offset.

BUG=chrome-os-partner:56615
TEST=graphics_GLBench

Cc: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: ?rjan Eide <orjan.eide@arm.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index 5dffe276d2a7..7fa2cb77bdc0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -263,7 +263,6 @@ static int rockchip_drm_gem_object_mmap(struct drm_gem_object *obj,
 	 * VM_PFNMAP flag that was set by drm_gem_mmap_obj()/drm_gem_mmap().
 	 */
 	vma->vm_flags &= ~VM_PFNMAP;
-	vma->vm_pgoff = 0;
 
 	if (rk_obj->pages)
 		ret = rockchip_drm_gem_object_mmap_iommu(obj, vma);
@@ -298,6 +297,12 @@ int rockchip_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	if (ret)
 		return ret;
 
+	/*
+	 * Set vm_pgoff (used as a fake buffer offset by DRM) to 0 and map the
+	 * whole buffer from the start.
+	 */
+	vma->vm_pgoff = 0;
+
 	obj = vma->vm_private_data;
 
 	return rockchip_drm_gem_object_mmap(obj, vma);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

There's a race between when bridge_disable and when vop_crtc_disable
are called. If the flush timer triggers a new psr work between these,
we will operate eDP without power shutdowned by bridge_disable. In this
case, moving activate/deactivate to enable/disable bridge to avoid it.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c |  7 +++++-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c     | 30 ++++++++++++++++++++-----
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h     |  4 ++--
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     |  4 ----
 4 files changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8548e8271639..28c0d4406454 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -159,12 +159,17 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 		return ret;
 	}
 
-	return 0;
+	return rockchip_drm_psr_activate(&dp->encoder);
 }
 
 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
 {
 	struct rockchip_dp_device *dp = to_dp(plat_data);
+	int ret;
+
+	ret = rockchip_drm_psr_deactivate(&dp->encoder);
+	if (ret != 0)
+		return ret;
 
 	clk_disable_unprepare(dp->pclk);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index a553e182ff53..4c379e90b178 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -57,6 +57,24 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 	return psr;
 }
 
+static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
+{
+	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
+	struct psr_drv *psr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	list_for_each_entry(psr, &drm_drv->psr_list, list) {
+		if (psr->encoder == encoder)
+			goto out;
+	}
+	psr = ERR_PTR(-ENODEV);
+
+out:
+	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	return psr;
+}
+
 static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 {
 	/*
@@ -115,14 +133,14 @@ static void psr_flush_handler(unsigned long data)
 
 /**
  * rockchip_drm_psr_activate - activate PSR on the given pipe
- * @crtc: CRTC to obtain the PSR encoder
+ * @encoder: encoder to obtain the PSR encoder
  *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_activate(struct drm_crtc *crtc)
+int rockchip_drm_psr_activate(struct drm_encoder *encoder)
 {
-	struct psr_drv *psr = find_psr_by_crtc(crtc);
+	struct psr_drv *psr = find_psr_by_encoder(encoder);
 	unsigned long flags;
 
 	if (IS_ERR(psr))
@@ -138,14 +156,14 @@ EXPORT_SYMBOL(rockchip_drm_psr_activate);
 
 /**
  * rockchip_drm_psr_deactivate - deactivate PSR on the given pipe
- * @crtc: CRTC to obtain the PSR encoder
+ * @encoder: encoder to obtain the PSR encoder
  *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_deactivate(struct drm_crtc *crtc)
+int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
 {
-	struct psr_drv *psr = find_psr_by_crtc(crtc);
+	struct psr_drv *psr = find_psr_by_encoder(encoder);
 	unsigned long flags;
 
 	if (IS_ERR(psr))
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index b420cf1bf902..b1ea0155e57c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
@@ -18,8 +18,8 @@
 void rockchip_drm_psr_flush_all(struct drm_device *dev);
 int rockchip_drm_psr_flush(struct drm_crtc *crtc);
 
-int rockchip_drm_psr_activate(struct drm_crtc *crtc);
-int rockchip_drm_psr_deactivate(struct drm_crtc *crtc);
+int rockchip_drm_psr_activate(struct drm_encoder *encoder);
+int rockchip_drm_psr_deactivate(struct drm_encoder *encoder);
 
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
 			void (*psr_set)(struct drm_encoder *, bool enable));
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 0539afb6b7c8..1c1e8535ad28 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -568,8 +568,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 	WARN_ON(vop->event);
 
-	rockchip_drm_psr_deactivate(&vop->crtc);
-
 	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
@@ -981,8 +979,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
 	VOP_CTRL_SET(vop, standby, 0);
-
-	rockchip_drm_psr_activate(&vop->crtc);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
-- 
2.12.0.246.ga2ecc84866-goog

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 05/41] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

There's a race between when bridge_disable and when vop_crtc_disable
are called. If the flush timer triggers a new psr work between these,
we will operate eDP without power shutdowned by bridge_disable. In this
case, moving activate/deactivate to enable/disable bridge to avoid it.

Cc: St?phane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c |  7 +++++-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c     | 30 ++++++++++++++++++++-----
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h     |  4 ++--
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     |  4 ----
 4 files changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8548e8271639..28c0d4406454 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -159,12 +159,17 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 		return ret;
 	}
 
-	return 0;
+	return rockchip_drm_psr_activate(&dp->encoder);
 }
 
 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
 {
 	struct rockchip_dp_device *dp = to_dp(plat_data);
+	int ret;
+
+	ret = rockchip_drm_psr_deactivate(&dp->encoder);
+	if (ret != 0)
+		return ret;
 
 	clk_disable_unprepare(dp->pclk);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index a553e182ff53..4c379e90b178 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -57,6 +57,24 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 	return psr;
 }
 
+static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
+{
+	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
+	struct psr_drv *psr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	list_for_each_entry(psr, &drm_drv->psr_list, list) {
+		if (psr->encoder == encoder)
+			goto out;
+	}
+	psr = ERR_PTR(-ENODEV);
+
+out:
+	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	return psr;
+}
+
 static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 {
 	/*
@@ -115,14 +133,14 @@ static void psr_flush_handler(unsigned long data)
 
 /**
  * rockchip_drm_psr_activate - activate PSR on the given pipe
- * @crtc: CRTC to obtain the PSR encoder
+ * @encoder: encoder to obtain the PSR encoder
  *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_activate(struct drm_crtc *crtc)
+int rockchip_drm_psr_activate(struct drm_encoder *encoder)
 {
-	struct psr_drv *psr = find_psr_by_crtc(crtc);
+	struct psr_drv *psr = find_psr_by_encoder(encoder);
 	unsigned long flags;
 
 	if (IS_ERR(psr))
@@ -138,14 +156,14 @@ EXPORT_SYMBOL(rockchip_drm_psr_activate);
 
 /**
  * rockchip_drm_psr_deactivate - deactivate PSR on the given pipe
- * @crtc: CRTC to obtain the PSR encoder
+ * @encoder: encoder to obtain the PSR encoder
  *
  * Returns:
  * Zero on success, negative errno on failure.
  */
-int rockchip_drm_psr_deactivate(struct drm_crtc *crtc)
+int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
 {
-	struct psr_drv *psr = find_psr_by_crtc(crtc);
+	struct psr_drv *psr = find_psr_by_encoder(encoder);
 	unsigned long flags;
 
 	if (IS_ERR(psr))
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index b420cf1bf902..b1ea0155e57c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
@@ -18,8 +18,8 @@
 void rockchip_drm_psr_flush_all(struct drm_device *dev);
 int rockchip_drm_psr_flush(struct drm_crtc *crtc);
 
-int rockchip_drm_psr_activate(struct drm_crtc *crtc);
-int rockchip_drm_psr_deactivate(struct drm_crtc *crtc);
+int rockchip_drm_psr_activate(struct drm_encoder *encoder);
+int rockchip_drm_psr_deactivate(struct drm_encoder *encoder);
 
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
 			void (*psr_set)(struct drm_encoder *, bool enable));
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 0539afb6b7c8..1c1e8535ad28 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -568,8 +568,6 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 	WARN_ON(vop->event);
 
-	rockchip_drm_psr_deactivate(&vop->crtc);
-
 	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
@@ -981,8 +979,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
 	VOP_CTRL_SET(vop, standby, 0);
-
-	rockchip_drm_psr_activate(&vop->crtc);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 06/41] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

The bridge does not need to be powered in analogix_dp_bind(), so
remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
as well as their power-off counterparts.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
[the patch originally just removed the power_on portion, seanpaul removed
the power off code as well as improved the commit message]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index c26997afd3cf..f64592f52262 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1385,11 +1385,6 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
 
 	pm_runtime_enable(dev);
 
-	pm_runtime_get_sync(dev);
-	phy_power_on(dp->phy);
-
-	analogix_dp_init_dp(dp);
-
 	ret = devm_request_threaded_irq(&pdev->dev, dp->irq,
 					analogix_dp_hardirq,
 					analogix_dp_irq_thread,
@@ -1418,15 +1413,10 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
 		goto err_disable_pm_runtime;
 	}
 
-	phy_power_off(dp->phy);
-	pm_runtime_put(dev);
-
 	return 0;
 
 err_disable_pm_runtime:
 
-	phy_power_off(dp->phy);
-	pm_runtime_put(dev);
 	pm_runtime_disable(dev);
 
 	return ret;
-- 
2.12.0.246.ga2ecc84866-goog


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH 07/41] drm/rockchip: Don't use atomic constructs for psr

[Sean Paul]

Instead of using timer and spinlocks, use delayed_work and
mutexes for rockchip psr. This allows us to make blocking
calls when enabling/disabling psr (which is sort of important
given we're talking over dpcd to the display).

Cc: Caesar Wang <wxt@rock-chips.com>
Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 14 +++--
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c     |  2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     |  2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c     | 68 +++++++++++--------------
 4 files changed, 37 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 28c0d4406454..90eb7908e2e5 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -72,7 +72,7 @@ struct rockchip_dp_device {
 	struct reset_control     *rst;
 
 	struct work_struct	 psr_work;
-	spinlock_t		 psr_lock;
+	struct mutex		 psr_lock;
 	unsigned int             psr_state;
 
 	const struct rockchip_dp_chip_data *data;
@@ -83,21 +83,20 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
-	unsigned long flags;
 
 	if (!analogix_dp_psr_supported(dp->dev))
 		return;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
 
-	spin_lock_irqsave(&dp->psr_lock, flags);
+	mutex_lock(&dp->psr_lock);
 	if (enabled)
 		dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
 	else
 		dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
 
 	schedule_work(&dp->psr_work);
-	spin_unlock_irqrestore(&dp->psr_lock, flags);
+	mutex_unlock(&dp->psr_lock);
 }
 
 static void analogix_dp_psr_work(struct work_struct *work)
@@ -108,7 +107,6 @@ static void analogix_dp_psr_work(struct work_struct *work)
 	int psr_state = dp->psr_state;
 	int vact_end;
 	int ret;
-	unsigned long flags;
 
 	if (!crtc)
 		return;
@@ -122,12 +120,12 @@ static void analogix_dp_psr_work(struct work_struct *work)
 		return;
 	}
 
-	spin_lock_irqsave(&dp->psr_lock, flags);
+	mutex_lock(&dp->psr_lock);
 	if (psr_state == EDP_VSC_PSR_STATE_ACTIVE)
 		analogix_dp_enable_psr(dp->dev);
 	else
 		analogix_dp_disable_psr(dp->dev);
-	spin_unlock_irqrestore(&dp->psr_lock, flags);
+	mutex_unlock(&dp->psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -406,7 +404,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-	spin_lock_init(&dp->psr_lock);
+	mutex_init(&dp->psr_lock);
 	dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
 	INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 1e371b7a1506..6b767b8dabd5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -134,7 +134,7 @@ static int rockchip_drm_bind(struct device *dev)
 	drm_dev->dev_private = private;
 
 	INIT_LIST_HEAD(&private->psr_list);
-	spin_lock_init(&private->psr_list_lock);
+	mutex_init(&private->psr_list_lock);
 
 	drm_mode_config_init(drm_dev);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 8aca219ec4c8..1844951118da 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -55,7 +55,7 @@ struct rockchip_drm_private {
 	struct mutex mm_lock;
 	struct drm_mm mm;
 	struct list_head psr_list;
-	spinlock_t psr_list_lock;
+	struct mutex psr_list_lock;
 };
 
 int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index 4c379e90b178..b339ca943139 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -18,7 +18,7 @@
 #include "rockchip_drm_drv.h"
 #include "rockchip_drm_psr.h"
 
-#define PSR_FLUSH_TIMEOUT	msecs_to_jiffies(100)
+#define PSR_FLUSH_TIMEOUT_MS	100
 
 enum psr_state {
 	PSR_FLUSH,
@@ -30,11 +30,11 @@ struct psr_drv {
 	struct list_head	list;
 	struct drm_encoder	*encoder;
 
-	spinlock_t		lock;
+	struct mutex		lock;
 	bool			active;
 	enum psr_state		state;
 
-	struct timer_list	flush_timer;
+	struct delayed_work	flush_work;
 
 	void (*set)(struct drm_encoder *encoder, bool enable);
 };
@@ -43,9 +43,8 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 {
 	struct rockchip_drm_private *drm_drv = crtc->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list) {
 		if (psr->encoder->crtc == crtc)
 			goto out;
@@ -53,7 +52,7 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 	psr = ERR_PTR(-ENODEV);
 
 out:
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 	return psr;
 }
 
@@ -61,9 +60,8 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list) {
 		if (psr->encoder == encoder)
 			goto out;
@@ -71,7 +69,7 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
 	psr = ERR_PTR(-ENODEV);
 
 out:
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 	return psr;
 }
 
@@ -112,23 +110,21 @@ static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 
 static void psr_set_state(struct psr_drv *psr, enum psr_state state)
 {
-	unsigned long flags;
-
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr_set_state_locked(psr, state);
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 }
 
-static void psr_flush_handler(unsigned long data)
+static void psr_flush_handler(struct work_struct *work)
 {
-	struct psr_drv *psr = (struct psr_drv *)data;
-	unsigned long flags;
+	struct psr_drv *psr = container_of(to_delayed_work(work),
+					   struct psr_drv, flush_work);
 
 	/* If the state has changed since we initiated the flush, do nothing */
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	if (psr->state == PSR_FLUSH)
 		psr_set_state_locked(psr, PSR_ENABLE);
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 }
 
 /**
@@ -141,14 +137,13 @@ static void psr_flush_handler(unsigned long data)
 int rockchip_drm_psr_activate(struct drm_encoder *encoder)
 {
 	struct psr_drv *psr = find_psr_by_encoder(encoder);
-	unsigned long flags;
 
 	if (IS_ERR(psr))
 		return PTR_ERR(psr);
 
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr->active = true;
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 
 	return 0;
 }
@@ -164,15 +159,14 @@ EXPORT_SYMBOL(rockchip_drm_psr_activate);
 int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
 {
 	struct psr_drv *psr = find_psr_by_encoder(encoder);
-	unsigned long flags;
 
 	if (IS_ERR(psr))
 		return PTR_ERR(psr);
 
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr->active = false;
-	spin_unlock_irqrestore(&psr->lock, flags);
-	del_timer_sync(&psr->flush_timer);
+	mutex_unlock(&psr->lock);
+	cancel_delayed_work_sync(&psr->flush_work);
 
 	return 0;
 }
@@ -180,9 +174,8 @@ EXPORT_SYMBOL(rockchip_drm_psr_deactivate);
 
 static void rockchip_drm_do_flush(struct psr_drv *psr)
 {
-	mod_timer(&psr->flush_timer,
-		  round_jiffies_up(jiffies + PSR_FLUSH_TIMEOUT));
 	psr_set_state(psr, PSR_FLUSH);
+	mod_delayed_work(system_wq, &psr->flush_work, PSR_FLUSH_TIMEOUT_MS);
 }
 
 /**
@@ -219,12 +212,11 @@ void rockchip_drm_psr_flush_all(struct drm_device *dev)
 {
 	struct rockchip_drm_private *drm_drv = dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list)
 		rockchip_drm_do_flush(psr);
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 }
 EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
 
@@ -241,7 +233,6 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder,
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
 	if (!encoder || !psr_set)
 		return -EINVAL;
@@ -250,17 +241,17 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder,
 	if (!psr)
 		return -ENOMEM;
 
-	setup_timer(&psr->flush_timer, psr_flush_handler, (unsigned long)psr);
-	spin_lock_init(&psr->lock);
+	INIT_DELAYED_WORK(&psr->flush_work, psr_flush_handler);
+	mutex_init(&psr->lock);
 
 	psr->active = true;
 	psr->state = PSR_DISABLE;
 	psr->encoder = encoder;
 	psr->set = psr_set;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_add_tail(&psr->list, &drm_drv->psr_list);
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 
 	return 0;
 }
@@ -278,16 +269,15 @@ void rockchip_drm_psr_unregister(struct drm_encoder *encoder)
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr, *n;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry_safe(psr, n, &drm_drv->psr_list, list) {
 		if (psr->encoder == encoder) {
-			del_timer(&psr->flush_timer);
+			cancel_delayed_work_sync(&psr->flush_work);
 			list_del(&psr->list);
 			kfree(psr);
 		}
 	}
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 }
 EXPORT_SYMBOL(rockchip_drm_psr_unregister);
-- 
2.12.0.246.ga2ecc84866-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 07/41] drm/rockchip: Don't use atomic constructs for psr

[Sean Paul]

Instead of using timer and spinlocks, use delayed_work and
mutexes for rockchip psr. This allows us to make blocking
calls when enabling/disabling psr (which is sort of important
given we're talking over dpcd to the display).

Cc: Caesar Wang <wxt@rock-chips.com>
Cc: ?? ? <wzz@rock-chips.com>
Cc: St?phane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 14 +++--
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c     |  2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     |  2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c     | 68 +++++++++++--------------
 4 files changed, 37 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 28c0d4406454..90eb7908e2e5 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -72,7 +72,7 @@ struct rockchip_dp_device {
 	struct reset_control     *rst;
 
 	struct work_struct	 psr_work;
-	spinlock_t		 psr_lock;
+	struct mutex		 psr_lock;
 	unsigned int             psr_state;
 
 	const struct rockchip_dp_chip_data *data;
@@ -83,21 +83,20 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
-	unsigned long flags;
 
 	if (!analogix_dp_psr_supported(dp->dev))
 		return;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
 
-	spin_lock_irqsave(&dp->psr_lock, flags);
+	mutex_lock(&dp->psr_lock);
 	if (enabled)
 		dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
 	else
 		dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
 
 	schedule_work(&dp->psr_work);
-	spin_unlock_irqrestore(&dp->psr_lock, flags);
+	mutex_unlock(&dp->psr_lock);
 }
 
 static void analogix_dp_psr_work(struct work_struct *work)
@@ -108,7 +107,6 @@ static void analogix_dp_psr_work(struct work_struct *work)
 	int psr_state = dp->psr_state;
 	int vact_end;
 	int ret;
-	unsigned long flags;
 
 	if (!crtc)
 		return;
@@ -122,12 +120,12 @@ static void analogix_dp_psr_work(struct work_struct *work)
 		return;
 	}
 
-	spin_lock_irqsave(&dp->psr_lock, flags);
+	mutex_lock(&dp->psr_lock);
 	if (psr_state == EDP_VSC_PSR_STATE_ACTIVE)
 		analogix_dp_enable_psr(dp->dev);
 	else
 		analogix_dp_disable_psr(dp->dev);
-	spin_unlock_irqrestore(&dp->psr_lock, flags);
+	mutex_unlock(&dp->psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -406,7 +404,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-	spin_lock_init(&dp->psr_lock);
+	mutex_init(&dp->psr_lock);
 	dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
 	INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 1e371b7a1506..6b767b8dabd5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -134,7 +134,7 @@ static int rockchip_drm_bind(struct device *dev)
 	drm_dev->dev_private = private;
 
 	INIT_LIST_HEAD(&private->psr_list);
-	spin_lock_init(&private->psr_list_lock);
+	mutex_init(&private->psr_list_lock);
 
 	drm_mode_config_init(drm_dev);
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 8aca219ec4c8..1844951118da 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -55,7 +55,7 @@ struct rockchip_drm_private {
 	struct mutex mm_lock;
 	struct drm_mm mm;
 	struct list_head psr_list;
-	spinlock_t psr_list_lock;
+	struct mutex psr_list_lock;
 };
 
 int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index 4c379e90b178..b339ca943139 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -18,7 +18,7 @@
 #include "rockchip_drm_drv.h"
 #include "rockchip_drm_psr.h"
 
-#define PSR_FLUSH_TIMEOUT	msecs_to_jiffies(100)
+#define PSR_FLUSH_TIMEOUT_MS	100
 
 enum psr_state {
 	PSR_FLUSH,
@@ -30,11 +30,11 @@ struct psr_drv {
 	struct list_head	list;
 	struct drm_encoder	*encoder;
 
-	spinlock_t		lock;
+	struct mutex		lock;
 	bool			active;
 	enum psr_state		state;
 
-	struct timer_list	flush_timer;
+	struct delayed_work	flush_work;
 
 	void (*set)(struct drm_encoder *encoder, bool enable);
 };
@@ -43,9 +43,8 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 {
 	struct rockchip_drm_private *drm_drv = crtc->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list) {
 		if (psr->encoder->crtc == crtc)
 			goto out;
@@ -53,7 +52,7 @@ static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
 	psr = ERR_PTR(-ENODEV);
 
 out:
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 	return psr;
 }
 
@@ -61,9 +60,8 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list) {
 		if (psr->encoder == encoder)
 			goto out;
@@ -71,7 +69,7 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder)
 	psr = ERR_PTR(-ENODEV);
 
 out:
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 	return psr;
 }
 
@@ -112,23 +110,21 @@ static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 
 static void psr_set_state(struct psr_drv *psr, enum psr_state state)
 {
-	unsigned long flags;
-
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr_set_state_locked(psr, state);
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 }
 
-static void psr_flush_handler(unsigned long data)
+static void psr_flush_handler(struct work_struct *work)
 {
-	struct psr_drv *psr = (struct psr_drv *)data;
-	unsigned long flags;
+	struct psr_drv *psr = container_of(to_delayed_work(work),
+					   struct psr_drv, flush_work);
 
 	/* If the state has changed since we initiated the flush, do nothing */
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	if (psr->state == PSR_FLUSH)
 		psr_set_state_locked(psr, PSR_ENABLE);
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 }
 
 /**
@@ -141,14 +137,13 @@ static void psr_flush_handler(unsigned long data)
 int rockchip_drm_psr_activate(struct drm_encoder *encoder)
 {
 	struct psr_drv *psr = find_psr_by_encoder(encoder);
-	unsigned long flags;
 
 	if (IS_ERR(psr))
 		return PTR_ERR(psr);
 
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr->active = true;
-	spin_unlock_irqrestore(&psr->lock, flags);
+	mutex_unlock(&psr->lock);
 
 	return 0;
 }
@@ -164,15 +159,14 @@ EXPORT_SYMBOL(rockchip_drm_psr_activate);
 int rockchip_drm_psr_deactivate(struct drm_encoder *encoder)
 {
 	struct psr_drv *psr = find_psr_by_encoder(encoder);
-	unsigned long flags;
 
 	if (IS_ERR(psr))
 		return PTR_ERR(psr);
 
-	spin_lock_irqsave(&psr->lock, flags);
+	mutex_lock(&psr->lock);
 	psr->active = false;
-	spin_unlock_irqrestore(&psr->lock, flags);
-	del_timer_sync(&psr->flush_timer);
+	mutex_unlock(&psr->lock);
+	cancel_delayed_work_sync(&psr->flush_work);
 
 	return 0;
 }
@@ -180,9 +174,8 @@ EXPORT_SYMBOL(rockchip_drm_psr_deactivate);
 
 static void rockchip_drm_do_flush(struct psr_drv *psr)
 {
-	mod_timer(&psr->flush_timer,
-		  round_jiffies_up(jiffies + PSR_FLUSH_TIMEOUT));
 	psr_set_state(psr, PSR_FLUSH);
+	mod_delayed_work(system_wq, &psr->flush_work, PSR_FLUSH_TIMEOUT_MS);
 }
 
 /**
@@ -219,12 +212,11 @@ void rockchip_drm_psr_flush_all(struct drm_device *dev)
 {
 	struct rockchip_drm_private *drm_drv = dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry(psr, &drm_drv->psr_list, list)
 		rockchip_drm_do_flush(psr);
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 }
 EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
 
@@ -241,7 +233,6 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder,
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
-	unsigned long flags;
 
 	if (!encoder || !psr_set)
 		return -EINVAL;
@@ -250,17 +241,17 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder,
 	if (!psr)
 		return -ENOMEM;
 
-	setup_timer(&psr->flush_timer, psr_flush_handler, (unsigned long)psr);
-	spin_lock_init(&psr->lock);
+	INIT_DELAYED_WORK(&psr->flush_work, psr_flush_handler);
+	mutex_init(&psr->lock);
 
 	psr->active = true;
 	psr->state = PSR_DISABLE;
 	psr->encoder = encoder;
 	psr->set = psr_set;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_add_tail(&psr->list, &drm_drv->psr_list);
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 
 	return 0;
 }
@@ -278,16 +269,15 @@ void rockchip_drm_psr_unregister(struct drm_encoder *encoder)
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr, *n;
-	unsigned long flags;
 
-	spin_lock_irqsave(&drm_drv->psr_list_lock, flags);
+	mutex_lock(&drm_drv->psr_list_lock);
 	list_for_each_entry_safe(psr, n, &drm_drv->psr_list, list) {
 		if (psr->encoder == encoder) {
-			del_timer(&psr->flush_timer);
+			cancel_delayed_work_sync(&psr->flush_work);
 			list_del(&psr->list);
 			kfree(psr);
 		}
 	}
-	spin_unlock_irqrestore(&drm_drv->psr_list_lock, flags);
+	mutex_unlock(&drm_drv->psr_list_lock);
 }
 EXPORT_SYMBOL(rockchip_drm_psr_unregister);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 08/41] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR

[Sean Paul]

From: Yakir Yang <ykk@rock-chips.com>

Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
function, or print the sink PSR error state if we failed to apply the
requested PSR setting.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
[seanpaul changed timeout loop to a readx poll]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  6 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  6 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 35 +++++++++++++++++++---
 3 files changed, 37 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index f64592f52262..8a8f05fe9da3 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -124,8 +124,7 @@ int analogix_dp_enable_psr(struct device *dev)
 	psr_vsc.DB0 = 0;
 	psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
 
-	analogix_dp_send_psr_spd(dp, &psr_vsc);
-	return 0;
+	return analogix_dp_send_psr_spd(dp, &psr_vsc);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
 
@@ -152,8 +151,7 @@ int analogix_dp_disable_psr(struct device *dev)
 	if (ret != 1)
 		dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
 
-	analogix_dp_send_psr_spd(dp, &psr_vsc);
-	return 0;
+	return analogix_dp_send_psr_spd(dp, &psr_vsc);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 5c6a28806129..b039b28d8fcc 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,6 +20,8 @@
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
 
+#define DP_TIMEOUT_PSR_LOOP_MS			300
+
 /* DP_MAX_LANE_COUNT */
 #define DPCD_ENHANCED_FRAME_CAP(x)		(((x) >> 7) & 0x1)
 #define DPCD_MAX_LANE_COUNT(x)			((x) & 0x1f)
@@ -247,8 +249,8 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
-void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-			      struct edp_vsc_psr *vsc);
+int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
+			     struct edp_vsc_psr *vsc);
 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 			     struct drm_dp_aux_msg *msg);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 303083ad28e3..005a3f7005d2 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -10,10 +10,11 @@
  * option) any later version.
  */
 
-#include <linux/device.h>
-#include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/device.h>
 #include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
 
 #include <drm/bridge/analogix_dp.h>
 
@@ -992,10 +993,25 @@ void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp)
 	writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON);
 }
 
-void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-			      struct edp_vsc_psr *vsc)
+static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp)
+{
+	ssize_t val;
+	u8 status;
+
+	val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, &status);
+	if (val < 0) {
+		dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val);
+		return val;
+	}
+	return status;
+}
+
+int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
+			     struct edp_vsc_psr *vsc)
 {
 	unsigned int val;
+	int ret;
+	ssize_t psr_status;
 
 	/* don't send info frame */
 	val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
@@ -1036,6 +1052,17 @@ void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
 	val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
 	val |= IF_EN;
 	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
+
+	ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
+		psr_status >= 0 &&
+		((vsc->DB1 && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
+		(!vsc->DB1 && psr_status == DP_PSR_SINK_INACTIVE)), 1500,
+		DP_TIMEOUT_PSR_LOOP_MS * 1000);
+	if (ret) {
+		dev_warn(dp->dev, "Failed to apply PSR %d\n", ret);
+		return ret;
+	}
+	return 0;
 }
 
 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
-- 
2.12.0.246.ga2ecc84866-goog


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH 09/41] drm/rockchip: Remove analogix psr worker

[Sean Paul]

Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 38 ++++---------------------
 1 file changed, 5 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 90eb7908e2e5..64e7e2c0bc58 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -71,10 +71,6 @@ struct rockchip_dp_device {
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
-	struct work_struct	 psr_work;
-	struct mutex		 psr_lock;
-	unsigned int             psr_state;
-
 	const struct rockchip_dp_chip_data *data;
 
 	struct analogix_dp_plat_data plat_data;
@@ -83,30 +79,14 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
+	struct drm_crtc *crtc = dp->encoder.crtc;
+	int vact_end;
+	int ret;
 
 	if (!analogix_dp_psr_supported(dp->dev))
 		return;
 
-	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
-
-	mutex_lock(&dp->psr_lock);
-	if (enabled)
-		dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
-	else
-		dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-
-	schedule_work(&dp->psr_work);
-	mutex_unlock(&dp->psr_lock);
-}
-
-static void analogix_dp_psr_work(struct work_struct *work)
-{
-	struct rockchip_dp_device *dp =
-				container_of(work, typeof(*dp), psr_work);
-	struct drm_crtc *crtc = dp->encoder.crtc;
-	int psr_state = dp->psr_state;
-	int vact_end;
-	int ret;
+	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
 
 	if (!crtc)
 		return;
@@ -120,12 +100,10 @@ static void analogix_dp_psr_work(struct work_struct *work)
 		return;
 	}
 
-	mutex_lock(&dp->psr_lock);
-	if (psr_state == EDP_VSC_PSR_STATE_ACTIVE)
+	if (enabled)
 		analogix_dp_enable_psr(dp->dev);
 	else
 		analogix_dp_disable_psr(dp->dev);
-	mutex_unlock(&dp->psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -142,8 +120,6 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 	struct rockchip_dp_device *dp = to_dp(plat_data);
 	int ret;
 
-	cancel_work_sync(&dp->psr_work);
-
 	ret = clk_prepare_enable(dp->pclk);
 	if (ret < 0) {
 		dev_err(dp->dev, "failed to enable pclk %d\n", ret);
@@ -404,10 +380,6 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-	mutex_init(&dp->psr_lock);
-	dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-	INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
-
 	rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
 
 	return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
-- 
2.12.0.246.ga2ecc84866-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 09/41] drm/rockchip: Remove analogix psr worker

[Sean Paul]

Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.

Cc: ?? ? <wzz@rock-chips.com>
Cc: St?phane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 38 ++++---------------------
 1 file changed, 5 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 90eb7908e2e5..64e7e2c0bc58 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -71,10 +71,6 @@ struct rockchip_dp_device {
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
-	struct work_struct	 psr_work;
-	struct mutex		 psr_lock;
-	unsigned int             psr_state;
-
 	const struct rockchip_dp_chip_data *data;
 
 	struct analogix_dp_plat_data plat_data;
@@ -83,30 +79,14 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
+	struct drm_crtc *crtc = dp->encoder.crtc;
+	int vact_end;
+	int ret;
 
 	if (!analogix_dp_psr_supported(dp->dev))
 		return;
 
-	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
-
-	mutex_lock(&dp->psr_lock);
-	if (enabled)
-		dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
-	else
-		dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-
-	schedule_work(&dp->psr_work);
-	mutex_unlock(&dp->psr_lock);
-}
-
-static void analogix_dp_psr_work(struct work_struct *work)
-{
-	struct rockchip_dp_device *dp =
-				container_of(work, typeof(*dp), psr_work);
-	struct drm_crtc *crtc = dp->encoder.crtc;
-	int psr_state = dp->psr_state;
-	int vact_end;
-	int ret;
+	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
 
 	if (!crtc)
 		return;
@@ -120,12 +100,10 @@ static void analogix_dp_psr_work(struct work_struct *work)
 		return;
 	}
 
-	mutex_lock(&dp->psr_lock);
-	if (psr_state == EDP_VSC_PSR_STATE_ACTIVE)
+	if (enabled)
 		analogix_dp_enable_psr(dp->dev);
 	else
 		analogix_dp_disable_psr(dp->dev);
-	mutex_unlock(&dp->psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -142,8 +120,6 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 	struct rockchip_dp_device *dp = to_dp(plat_data);
 	int ret;
 
-	cancel_work_sync(&dp->psr_work);
-
 	ret = clk_prepare_enable(dp->pclk);
 	if (ret < 0) {
 		dev_err(dp->dev, "failed to enable pclk %d\n", ret);
@@ -404,10 +380,6 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-	mutex_init(&dp->psr_lock);
-	dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-	INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
-
 	rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
 
 	return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.

Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Sean Paul <seanpaul@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
[seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
 include/drm/bridge/analogix_dp.h                   |  2 +-
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 8a8f05fe9da3..64d94a34874d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
 	return 0;
 }
 
-int analogix_dp_psr_supported(struct device *dev)
+int analogix_dp_psr_enabled(struct device *dev)
 {
 	struct analogix_dp_device *dp = dev_get_drvdata(dev);
 
-	return dp->psr_support;
+	return dp->psr_enable;
 }
-EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
+EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
 
 int analogix_dp_enable_psr(struct device *dev)
 {
 	struct analogix_dp_device *dp = dev_get_drvdata(dev);
 	struct edp_vsc_psr psr_vsc;
 
-	if (!dp->psr_support)
+	if (!dp->psr_enable)
 		return 0;
 
 	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
 	struct edp_vsc_psr psr_vsc;
 	int ret;
 
-	if (!dp->psr_support)
+	if (!dp->psr_enable)
 		return 0;
 
 	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 	/* Enable video */
 	analogix_dp_start_video(dp);
 
-	dp->psr_support = analogix_dp_detect_sink_psr(dp);
-	if (dp->psr_support)
+	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);
 }
 
@@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 	if (ret)
 		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 
+	dp->psr_enable = false;
 	dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index b039b28d8fcc..e135a42cb19e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -170,7 +170,7 @@ struct analogix_dp_device {
 	int			dpms_mode;
 	int			hpd_gpio;
 	bool                    force_hpd;
-	bool			psr_support;
+	bool			psr_enable;
 
 	struct mutex		panel_lock;
 	bool			panel_is_modeset;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 64e7e2c0bc58..f44756029478 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	int vact_end;
 	int ret;
 
-	if (!analogix_dp_psr_supported(dp->dev))
+	if (!analogix_dp_psr_enabled(dp->dev))
 		return;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index c99d6eaef1ac..4fc0165ed3f5 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
 			 struct drm_connector *);
 };
 
-int analogix_dp_psr_supported(struct device *dev);
+int analogix_dp_psr_enabled(struct device *dev);
 int analogix_dp_enable_psr(struct device *dev);
 int analogix_dp_disable_psr(struct device *dev);
 
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.

Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Sean Paul <seanpaul@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
[seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
 include/drm/bridge/analogix_dp.h                   |  2 +-
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 8a8f05fe9da3..64d94a34874d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
 	return 0;
 }
 
-int analogix_dp_psr_supported(struct device *dev)
+int analogix_dp_psr_enabled(struct device *dev)
 {
 	struct analogix_dp_device *dp = dev_get_drvdata(dev);
 
-	return dp->psr_support;
+	return dp->psr_enable;
 }
-EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
+EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
 
 int analogix_dp_enable_psr(struct device *dev)
 {
 	struct analogix_dp_device *dp = dev_get_drvdata(dev);
 	struct edp_vsc_psr psr_vsc;
 
-	if (!dp->psr_support)
+	if (!dp->psr_enable)
 		return 0;
 
 	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
 	struct edp_vsc_psr psr_vsc;
 	int ret;
 
-	if (!dp->psr_support)
+	if (!dp->psr_enable)
 		return 0;
 
 	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
@@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 	/* Enable video */
 	analogix_dp_start_video(dp);
 
-	dp->psr_support = analogix_dp_detect_sink_psr(dp);
-	if (dp->psr_support)
+	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);
 }
 
@@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 	if (ret)
 		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 
+	dp->psr_enable = false;
 	dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index b039b28d8fcc..e135a42cb19e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -170,7 +170,7 @@ struct analogix_dp_device {
 	int			dpms_mode;
 	int			hpd_gpio;
 	bool                    force_hpd;
-	bool			psr_support;
+	bool			psr_enable;
 
 	struct mutex		panel_lock;
 	bool			panel_is_modeset;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 64e7e2c0bc58..f44756029478 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	int vact_end;
 	int ret;
 
-	if (!analogix_dp_psr_supported(dp->dev))
+	if (!analogix_dp_psr_enabled(dp->dev))
 		return;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index c99d6eaef1ac..4fc0165ed3f5 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
 			 struct drm_connector *);
 };
 
-int analogix_dp_psr_supported(struct device *dev);
+int analogix_dp_psr_enabled(struct device *dev);
 int analogix_dp_enable_psr(struct device *dev);
 int analogix_dp_disable_psr(struct device *dev);
 
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 11/41] drm/rockchip: add mutex vop lock

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 30 +++++++++++++++++++++++------
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 1c1e8535ad28..aa5c528c59fc 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -130,6 +130,7 @@ struct vop {
 	spinlock_t reg_lock;
 	/* lock vop irq reg */
 	spinlock_t irq_lock;
+	struct mutex vop_lock;
 
 	unsigned int irq;
 
@@ -568,6 +569,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 	WARN_ON(vop->event);
 
+	mutex_lock(&vop->vop_lock);
 	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
@@ -619,6 +621,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	clk_disable(vop->aclk);
 	clk_disable(vop->hclk);
 	pm_runtime_put(vop->dev);
+	mutex_unlock(&vop->vop_lock);
 
 	if (crtc->state->event && !crtc->state->active) {
 		spin_lock_irq(&crtc->dev->event_lock);
@@ -885,10 +888,13 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	uint32_t pin_pol, val;
 	int ret;
 
+	mutex_lock(&vop->vop_lock);
+
 	WARN_ON(vop->event);
 
 	ret = vop_enable(crtc);
 	if (ret) {
+		mutex_unlock(&vop->vop_lock);
 		DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret);
 		return;
 	}
@@ -979,6 +985,7 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
 	VOP_CTRL_SET(vop, standby, 0);
+	mutex_unlock(&vop->vop_lock);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -1506,15 +1513,22 @@ int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 {
 	struct vop *vop = to_vop(crtc);
 	unsigned long jiffies_left;
+	int ret = 0;
 
 	if (!crtc || !vop->is_enabled)
 		return -ENODEV;
 
-	if (line_num > crtc->mode.vtotal || mstimeout <= 0)
-		return -EINVAL;
+	mutex_lock(&vop->vop_lock);
+
+	if (line_num > crtc->mode.vtotal || mstimeout <= 0) {
+		ret = -EINVAL;
+		goto out;
+	}
 
-	if (vop_line_flag_irq_is_enabled(vop))
-		return -EBUSY;
+	if (vop_line_flag_irq_is_enabled(vop)) {
+		ret = -EBUSY;
+		goto out;
+	}
 
 	reinit_completion(&vop->line_flag_completion);
 	vop_line_flag_irq_enable(vop, line_num);
@@ -1525,10 +1539,13 @@ int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 
 	if (jiffies_left == 0) {
 		dev_err(vop->dev, "Timeout waiting for IRQ\n");
-		return -ETIMEDOUT;
+		ret = -ETIMEDOUT;
+		goto out;
 	}
 
-	return 0;
+out:
+	mutex_unlock(&vop->vop_lock);
+	return ret;
 }
 EXPORT_SYMBOL(rockchip_drm_wait_line_flag);
 
@@ -1584,6 +1601,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	spin_lock_init(&vop->reg_lock);
 	spin_lock_init(&vop->irq_lock);
+	mutex_init(&vop->vop_lock);
 
 	ret = devm_request_irq(dev, vop->irq, vop_isr,
 			       IRQF_SHARED, dev_name(dev), vop);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 11/41] drm/rockchip: add mutex vop lock

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 30 +++++++++++++++++++++++------
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 1c1e8535ad28..aa5c528c59fc 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -130,6 +130,7 @@ struct vop {
 	spinlock_t reg_lock;
 	/* lock vop irq reg */
 	spinlock_t irq_lock;
+	struct mutex vop_lock;
 
 	unsigned int irq;
 
@@ -568,6 +569,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 	WARN_ON(vop->event);
 
+	mutex_lock(&vop->vop_lock);
 	/*
 	 * We need to make sure that all windows are disabled before we
 	 * disable that crtc. Otherwise we might try to scan from a destroyed
@@ -619,6 +621,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 	clk_disable(vop->aclk);
 	clk_disable(vop->hclk);
 	pm_runtime_put(vop->dev);
+	mutex_unlock(&vop->vop_lock);
 
 	if (crtc->state->event && !crtc->state->active) {
 		spin_lock_irq(&crtc->dev->event_lock);
@@ -885,10 +888,13 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	uint32_t pin_pol, val;
 	int ret;
 
+	mutex_lock(&vop->vop_lock);
+
 	WARN_ON(vop->event);
 
 	ret = vop_enable(crtc);
 	if (ret) {
+		mutex_unlock(&vop->vop_lock);
 		DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret);
 		return;
 	}
@@ -979,6 +985,7 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 	clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
 	VOP_CTRL_SET(vop, standby, 0);
+	mutex_unlock(&vop->vop_lock);
 }
 
 static bool vop_fs_irq_is_pending(struct vop *vop)
@@ -1506,15 +1513,22 @@ int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 {
 	struct vop *vop = to_vop(crtc);
 	unsigned long jiffies_left;
+	int ret = 0;
 
 	if (!crtc || !vop->is_enabled)
 		return -ENODEV;
 
-	if (line_num > crtc->mode.vtotal || mstimeout <= 0)
-		return -EINVAL;
+	mutex_lock(&vop->vop_lock);
+
+	if (line_num > crtc->mode.vtotal || mstimeout <= 0) {
+		ret = -EINVAL;
+		goto out;
+	}
 
-	if (vop_line_flag_irq_is_enabled(vop))
-		return -EBUSY;
+	if (vop_line_flag_irq_is_enabled(vop)) {
+		ret = -EBUSY;
+		goto out;
+	}
 
 	reinit_completion(&vop->line_flag_completion);
 	vop_line_flag_irq_enable(vop, line_num);
@@ -1525,10 +1539,13 @@ int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 
 	if (jiffies_left == 0) {
 		dev_err(vop->dev, "Timeout waiting for IRQ\n");
-		return -ETIMEDOUT;
+		ret = -ETIMEDOUT;
+		goto out;
 	}
 
-	return 0;
+out:
+	mutex_unlock(&vop->vop_lock);
+	return ret;
 }
 EXPORT_SYMBOL(rockchip_drm_wait_line_flag);
 
@@ -1584,6 +1601,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
 
 	spin_lock_init(&vop->reg_lock);
 	spin_lock_init(&vop->irq_lock);
+	mutex_init(&vop->vop_lock);
 
 	ret = devm_request_irq(dev, vop->irq, vop_isr,
 			       IRQF_SHARED, dev_name(dev), vop);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP

[Sean Paul]

From: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

We would meet a short black screen when exit PSR with the full link
training, In this case, we should use fast link train instead of full
link training.

Signed-off-by: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 142 ++++++++++++++++-----
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   3 +
 2 files changed, 114 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 64d94a34874d..5bc151b0995b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -10,17 +10,18 @@
 * option) any later version.
 */
 
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/io.h>
+#include <linux/component.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
-#include <linux/gpio.h>
-#include <linux/component.h>
 #include <linux/phy/phy.h>
+#include <linux/platform_device.h>
 
 #include <drm/drmP.h>
 #include <drm/drm_atomic_helper.h>
@@ -35,6 +36,8 @@
 
 #define to_dp(nm)	container_of(nm, struct analogix_dp_device, nm)
 
+static const bool verify_fast_training;
+
 struct bridge_init {
 	struct i2c_client *client;
 	struct device_node *node;
@@ -531,7 +534,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
 	int lane, lane_count, retval;
 	u32 reg;
-	u8 link_align, link_status[2], adjust_request[2];
+	u8 link_align, link_status[2], adjust_request[2], spread;
 
 	usleep_range(400, 401);
 
@@ -574,6 +577,20 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		dev_dbg(dp->dev, "final lane count = %.2x\n",
 			dp->link_train.lane_count);
 
+		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
+					   &spread);
+		if (retval != 1) {
+			dev_err(dp->dev, "failed to read downspread %d\n",
+				retval);
+			dp->fast_train_support = false;
+		} else {
+			dp->fast_train_support =
+				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
+					true : false;
+		}
+		dev_dbg(dp->dev, "fast link training %s\n",
+			dp->fast_train_support ? "supported" : "unsupported");
+
 		/* set enhanced mode if available */
 		analogix_dp_set_enhanced_mode(dp);
 		dp->link_train.lt_state = FINISHED;
@@ -630,10 +647,12 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
 	*lane_count = DPCD_MAX_LANE_COUNT(data);
 }
 
-static void analogix_dp_init_training(struct analogix_dp_device *dp,
-				      enum link_lane_count_type max_lane,
-				      int max_rate)
+static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
+				       u32 max_lanes, u32 max_rate)
 {
+	int retval = 0;
+	bool training_finished = false;
+
 	/*
 	 * MACRO_RST must be applied after the PLL_LOCK to avoid
 	 * the DP inter pair skew issue for at least 10 us
@@ -659,18 +678,13 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
 	}
 
 	/* Setup TX lane count & rate */
-	if (dp->link_train.lane_count > max_lane)
-		dp->link_train.lane_count = max_lane;
+	if (dp->link_train.lane_count > max_lanes)
+		dp->link_train.lane_count = max_lanes;
 	if (dp->link_train.link_rate > max_rate)
 		dp->link_train.link_rate = max_rate;
 
 	/* All DP analog module power up */
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
-}
-
-static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
-{
-	int retval = 0, training_finished = 0;
 
 	dp->link_train.lt_state = START;
 
@@ -705,22 +719,88 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 	return retval;
 }
 
-static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
-				      u32 count, u32 bwtype)
+static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
 {
-	int i;
-	int retval;
+	int i, ret;
+	u8 link_align, link_status[2];
+	enum pll_status status;
 
-	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
-		analogix_dp_init_training(dp, count, bwtype);
-		retval = analogix_dp_sw_link_training(dp);
-		if (retval == 0)
-			break;
+	analogix_dp_reset_macro(dp);
 
-		usleep_range(100, 110);
+	analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
+	analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
+
+	for (i = 0; i < dp->link_train.lane_count; i++) {
+		analogix_dp_set_lane_link_training(dp,
+			dp->link_train.training_lane[i], i);
 	}
 
-	return retval;
+	ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status,
+				 status != PLL_UNLOCKED, 120,
+				 120 * DP_TIMEOUT_LOOP_COUNT);
+	if (ret) {
+		DRM_DEV_ERROR(dp->dev, "Wait for pll lock failed %d\n", ret);
+		return ret;
+	}
+
+	/* source Set training pattern 1 */
+	analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
+	/* From DP spec, pattern must be on-screen for a minimum 500us */
+	usleep_range(500, 600);
+
+	analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
+	/* From DP spec, pattern must be on-screen for a minimum 500us */
+	usleep_range(500, 600);
+
+	/* TODO: enhanced_mode?*/
+	analogix_dp_set_training_pattern(dp, DP_NONE);
+
+	/*
+	 * Useful for debugging issues with fast link training, disable for more
+	 * speed
+	 */
+	if (verify_fast_training) {
+		ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED,
+					&link_align);
+		if (ret < 0) {
+			DRM_DEV_ERROR(dp->dev, "Read align status failed %d\n",
+				      ret);
+			return ret;
+		}
+
+		ret = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status,
+				       2);
+		if (ret < 0) {
+			DRM_DEV_ERROR(dp->dev, "Read link status failed %d\n",
+				      ret);
+			return ret;
+		}
+
+		if (analogix_dp_clock_recovery_ok(link_status,
+						  dp->link_train.lane_count)) {
+			DRM_DEV_ERROR(dp->dev, "Clock recovery failed\n");
+			analogix_dp_reduce_link_rate(dp);
+			return -EIO;
+		}
+
+		if (analogix_dp_channel_eq_ok(link_status, link_align,
+					      dp->link_train.lane_count)) {
+			DRM_DEV_ERROR(dp->dev, "Channel EQ failed\n");
+			analogix_dp_reduce_link_rate(dp);
+			return -EIO;
+		}
+	}
+
+	return 0;
+}
+
+static int analogix_dp_train_link(struct analogix_dp_device *dp)
+{
+	if (dp->fast_train_support)
+		return analogix_dp_fast_link_train(dp);
+
+	return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
+					   dp->video_info.max_link_rate);
 }
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)
@@ -853,10 +933,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 			DRM_ERROR("failed to disable the panel\n");
 	}
 
-	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
-					 dp->video_info.max_link_rate);
+	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
+				 DP_TIMEOUT_TRAINING_US * 5);
 	if (ret) {
-		dev_err(dp->dev, "unable to do link train\n");
+		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
 		return;
 	}
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index e135a42cb19e..920607d7eb3e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,6 +20,8 @@
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
 
+/* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
+#define DP_TIMEOUT_TRAINING_US			22000
 #define DP_TIMEOUT_PSR_LOOP_MS			300
 
 /* DP_MAX_LANE_COUNT */
@@ -171,6 +173,7 @@ struct analogix_dp_device {
 	int			hpd_gpio;
 	bool                    force_hpd;
 	bool			psr_enable;
+	bool			fast_train_support;
 
 	struct mutex		panel_lock;
 	bool			panel_is_modeset;
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit

[Sean Paul]

From: Mark Yao <mark.yao@rock-chips.com>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 4 ++++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 4 ++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 6 ++++--
 5 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index f44756029478..b6c6d6d09d7e 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -225,6 +225,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
 	struct rockchip_dp_device *dp = to_dp(encoder);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 	int ret;
 
 	/*
@@ -248,6 +249,9 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 			s->output_mode = ROCKCHIP_OUT_MODE_P888;
 	}
 
+	s->output_bpc = di->bpc;
+	s->output_type = DRM_MODE_CONNECTOR_eDP;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 1844951118da..a966d1d37378 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index aa5c528c59fc..ea3fff4170d9 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -968,6 +968,10 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 		DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n",
 			      s->output_type);
 	}
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_CTRL_SET(vop, pre_dither_down, 1);
+	else
+		VOP_CTRL_SET(vop, pre_dither_down, 0);
 	VOP_CTRL_SET(vop, out_mode, s->output_mode);
 
 	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 5a4faa85dbd2..9a1eb83271eb 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -47,6 +47,7 @@ struct vop_ctrl {
 	struct vop_reg mipi_en;
 	struct vop_reg dp_en;
 	struct vop_reg out_mode;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg pin_pol;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 91fbc7b52147..e645a9621721 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -212,7 +212,8 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
-	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
+	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x7, 2),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
 	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
@@ -289,7 +290,8 @@ static const struct vop_ctrl rk3399_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15),
-	.dither_down = VOP_REG(RK3399_DSP_CTRL1, 0xf, 1),
+	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
+	.dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x7, 2),
 	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
 	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 13/41] drm/rockchip: pre dither down when output bpc is 8bit

[Sean Paul]

From: Mark Yao <mark.yao@rock-chips.com>

Some encoder have a crc verification check, crc check fail if
input and output data is not equal.

That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.

So pre dither down vop data to 8bit if panel's bpc is 8.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 4 ++++
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 4 ++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h     | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c     | 6 ++++--
 5 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index f44756029478..b6c6d6d09d7e 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -225,6 +225,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 {
 	struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
 	struct rockchip_dp_device *dp = to_dp(encoder);
+	struct drm_display_info *di = &conn_state->connector->display_info;
 	int ret;
 
 	/*
@@ -248,6 +249,9 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
 			s->output_mode = ROCKCHIP_OUT_MODE_P888;
 	}
 
+	s->output_bpc = di->bpc;
+	s->output_type = DRM_MODE_CONNECTOR_eDP;
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 1844951118da..a966d1d37378 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -36,6 +36,7 @@ struct rockchip_crtc_state {
 	struct drm_crtc_state base;
 	int output_type;
 	int output_mode;
+	int output_bpc;
 };
 #define to_rockchip_crtc_state(s) \
 		container_of(s, struct rockchip_crtc_state, base)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index aa5c528c59fc..ea3fff4170d9 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -968,6 +968,10 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
 		DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n",
 			      s->output_type);
 	}
+	if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8)
+		VOP_CTRL_SET(vop, pre_dither_down, 1);
+	else
+		VOP_CTRL_SET(vop, pre_dither_down, 0);
 	VOP_CTRL_SET(vop, out_mode, s->output_mode);
 
 	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 5a4faa85dbd2..9a1eb83271eb 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -47,6 +47,7 @@ struct vop_ctrl {
 	struct vop_reg mipi_en;
 	struct vop_reg dp_en;
 	struct vop_reg out_mode;
+	struct vop_reg pre_dither_down;
 	struct vop_reg dither_down;
 	struct vop_reg dither_up;
 	struct vop_reg pin_pol;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 91fbc7b52147..e645a9621721 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -212,7 +212,8 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
-	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
+	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
+	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x7, 2),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
 	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
@@ -289,7 +290,8 @@ static const struct vop_ctrl rk3399_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15),
-	.dither_down = VOP_REG(RK3399_DSP_CTRL1, 0xf, 1),
+	.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),
+	.dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x7, 2),
 	.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
 	.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
 	.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 14/41] drm/rockchip: Only wait for panel ACK on PSR entry

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

We currently wait for the panel to mirror our intended PSR state
before continuing on both PSR enter and PSR exit. This is really
only important to do when we're entering PSR, since we want to
be sure the last frame we pushed is being served from the panel's
internal fb before shutting down the soc blocks (vop/analogix).

This patch changes the behavior such that we only wait for the
panel to complete the PSR transition when we're entering PSR, and
to skip verification when we're exiting.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Cc: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 4 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 5 ++++-
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 5bc151b0995b..9dfa1b507389 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -127,7 +127,7 @@ int analogix_dp_enable_psr(struct device *dev)
 	psr_vsc.DB0 = 0;
 	psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
 
-	return analogix_dp_send_psr_spd(dp, &psr_vsc);
+	return analogix_dp_send_psr_spd(dp, &psr_vsc, true);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
 
@@ -154,7 +154,7 @@ int analogix_dp_disable_psr(struct device *dev)
 	if (ret != 1)
 		dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
 
-	return analogix_dp_send_psr_spd(dp, &psr_vsc);
+	return analogix_dp_send_psr_spd(dp, &psr_vsc, false);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 920607d7eb3e..6a96ef7e6934 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -253,7 +253,7 @@ void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-			     struct edp_vsc_psr *vsc);
+			     struct edp_vsc_psr *vsc, bool blocking);
 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 			     struct drm_dp_aux_msg *msg);
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 005a3f7005d2..9df2f3ef000c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1007,7 +1007,7 @@ static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp)
 }
 
 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
-			     struct edp_vsc_psr *vsc)
+			     struct edp_vsc_psr *vsc, bool blocking)
 {
 	unsigned int val;
 	int ret;
@@ -1053,6 +1053,9 @@ int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
 	val |= IF_EN;
 	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
 
+	if (!blocking)
+		return 0;
+
 	ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
 		psr_status >= 0 &&
 		((vsc->DB1 && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
-- 
2.12.0.246.ga2ecc84866-goog

_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 15/41] drm/bridge: analogix_dp: Move enable video into config_video()

[Sean Paul]

From: Lin Huang <hl@rock-chips.com>

We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 9dfa1b507389..52218d743059 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -823,11 +823,10 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
 			break;
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			dev_err(dp->dev, "Timeout of video streamclk ok\n");
+			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
 			return -ETIMEDOUT;
 		}
-
-		usleep_range(1, 2);
+		usleep_range(1000, 1001);
 	}
 
 	/* Set to use the register calculated M/N video */
@@ -842,6 +841,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 	/* Configure video slave mode */
 	analogix_dp_enable_video_master(dp, 0);
 
+	/* Enable video */
+	analogix_dp_start_video(dp);
+
 	timeout_loop = 0;
 
 	for (;;) {
@@ -955,9 +957,6 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 			DRM_ERROR("failed to enable the panel\n");
 	}
 
-	/* Enable video */
-	analogix_dp_start_video(dp);
-
 	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
 	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);
-- 
2.12.0.246.ga2ecc84866-goog


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http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH 16/41] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer

[Sean Paul]

From: Lin Huang <hl@rock-chips.com>

We should check AUX_EN bit to confirm the AUX CH operation is completed.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 25 +++++++++++++----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 9df2f3ef000c..e78c861b9e06 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1073,9 +1073,9 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 {
 	u32 reg;
 	u8 *buffer = msg->buffer;
-	int timeout_loop = 0;
 	unsigned int i;
 	int num_transferred = 0;
+	int ret;
 
 	/* Buffer size of AUX CH is 16 bytes */
 	if (WARN_ON(msg->size > 16))
@@ -1139,17 +1139,20 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 
 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
 
-	/* Is AUX CH command reply received? */
+	ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2,
+				 reg, !(reg & AUX_EN), 25, 500 * 1000);
+	if (ret) {
+		dev_err(dp->dev, "AUX CH enable timeout!\n");
+		return -ETIMEDOUT;
+	}
+
 	/* TODO: Wait for an interrupt instead of looping? */
-	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-	while (!(reg & RPLY_RECEIV)) {
-		timeout_loop++;
-		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			dev_err(dp->dev, "AUX CH command reply failed!\n");
-			return -ETIMEDOUT;
-		}
-		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-		usleep_range(10, 11);
+	/* Is AUX CH command reply received? */
+	ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA,
+				 reg, reg & RPLY_RECEIV, 10, 20 * 1000);
+	if (ret) {
+		dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
+		return -ETIMEDOUT;
 	}
 
 	/* Clear interrupt source for AUX CH command reply */
-- 
2.12.0.246.ga2ecc84866-goog


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[PATCH 17/41] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

Panel would reset it's setting when it power down. It would forget the last
successed link training setting. So we can't use the last successful link
training setting to do fast link training. Let's reset fast_train_enable in
analogix_dp_bridge_disable();

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +++++----
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 52218d743059..919ae68e7670 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -582,14 +582,14 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		if (retval != 1) {
 			dev_err(dp->dev, "failed to read downspread %d\n",
 				retval);
-			dp->fast_train_support = false;
+			dp->fast_train_enable = false;
 		} else {
-			dp->fast_train_support =
+			dp->fast_train_enable =
 				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
 					true : false;
 		}
 		dev_dbg(dp->dev, "fast link training %s\n",
-			dp->fast_train_support ? "supported" : "unsupported");
+			dp->fast_train_enable ? "supported" : "unsupported");
 
 		/* set enhanced mode if available */
 		analogix_dp_set_enhanced_mode(dp);
@@ -796,7 +796,7 @@ static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
 
 static int analogix_dp_train_link(struct analogix_dp_device *dp)
 {
-	if (dp->fast_train_support)
+	if (dp->fast_train_enable)
 		return analogix_dp_fast_link_train(dp);
 
 	return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
@@ -1200,6 +1200,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 
 	dp->psr_enable = false;
+	dp->fast_train_enable = false;
 	dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 6a96ef7e6934..403ff853464b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -173,7 +173,7 @@ struct analogix_dp_device {
 	int			hpd_gpio;
 	bool                    force_hpd;
 	bool			psr_enable;
-	bool			fast_train_support;
+	bool			fast_train_enable;
 
 	struct mutex		panel_lock;
 	bool			panel_is_modeset;
-- 
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[PATCH 18/41] drm/bridge: analogix_dp: Retry bridge enable when it failed

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 65 +++++++++++++++++-----
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  3 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  5 +-
 3 files changed, 56 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 919ae68e7670..f3eea7636a2e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -43,8 +43,10 @@ struct bridge_init {
 	struct device_node *node;
 };
 
-static void analogix_dp_init_dp(struct analogix_dp_device *dp)
+static int analogix_dp_init_dp(struct analogix_dp_device *dp)
 {
+	int ret;
+
 	analogix_dp_reset(dp);
 
 	analogix_dp_swreset(dp);
@@ -56,10 +58,13 @@ static void analogix_dp_init_dp(struct analogix_dp_device *dp)
 	analogix_dp_enable_sw_function(dp);
 
 	analogix_dp_config_interrupt(dp);
-	analogix_dp_init_analog_func(dp);
+	ret = analogix_dp_init_analog_func(dp);
+	if (ret)
+		return ret;
 
 	analogix_dp_init_hpd(dp);
 	analogix_dp_init_aux(dp);
+	return 0;
 }
 
 static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
@@ -925,7 +930,7 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 	return IRQ_HANDLED;
 }
 
-static void analogix_dp_commit(struct analogix_dp_device *dp)
+static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
 	int ret;
 
@@ -935,11 +940,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 			DRM_ERROR("failed to disable the panel\n");
 	}
 
-	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
-				 DP_TIMEOUT_TRAINING_US * 5);
+	ret = analogix_dp_train_link(dp);
 	if (ret) {
 		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
-		return;
+		return ret;
 	}
 
 	analogix_dp_enable_scramble(dp, 1);
@@ -960,6 +964,7 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
 	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
 	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);
+	return 0;
 }
 
 /*
@@ -1152,12 +1157,9 @@ static void analogix_dp_bridge_pre_enable(struct drm_bridge *bridge)
 		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
 }
 
-static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
+static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 {
-	struct analogix_dp_device *dp = bridge->driver_private;
-
-	if (dp->dpms_mode == DRM_MODE_DPMS_ON)
-		return;
+	int ret;
 
 	pm_runtime_get_sync(dp->dev);
 
@@ -1165,11 +1167,46 @@ static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
 		dp->plat_data->power_on(dp->plat_data);
 
 	phy_power_on(dp->phy);
-	analogix_dp_init_dp(dp);
+
+	ret = analogix_dp_init_dp(dp);
+	if (ret)
+		goto out_dp_init;
+
+	ret = analogix_dp_commit(dp);
+	if (ret)
+		goto out_dp_init;
+
 	enable_irq(dp->irq);
-	analogix_dp_commit(dp);
+	return 0;
 
-	dp->dpms_mode = DRM_MODE_DPMS_ON;
+out_dp_init:
+	phy_power_off(dp->phy);
+	if (dp->plat_data->power_off)
+		dp->plat_data->power_off(dp->plat_data);
+	pm_runtime_put_sync(dp->dev);
+
+	return ret;
+}
+
+static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
+{
+	struct analogix_dp_device *dp = bridge->driver_private;
+	int timeout_loop = 0;
+
+	if (dp->dpms_mode == DRM_MODE_DPMS_ON)
+		return;
+
+	while (timeout_loop < MAX_PLL_LOCK_LOOP) {
+		if (analogix_dp_set_bridge(dp) == 0) {
+			dp->dpms_mode = DRM_MODE_DPMS_ON;
+			return;
+		}
+		dev_err(dp->dev, "failed to set bridge, retry: %d\n",
+			timeout_loop);
+		timeout_loop++;
+		usleep_range(10, 11);
+	}
+	dev_err(dp->dev, "too many times retry set bridge, give it up\n");
 }
 
 static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index 403ff853464b..769255dc6e99 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -19,6 +19,7 @@
 #define DP_TIMEOUT_LOOP_COUNT 100
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
+#define MAX_PLL_LOCK_LOOP 5
 
 /* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
 #define DP_TIMEOUT_TRAINING_US			22000
@@ -197,7 +198,7 @@ void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 				       enum analog_power_block block,
 				       bool enable);
-void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
+int analogix_dp_init_analog_func(struct analogix_dp_device *dp);
 void analogix_dp_init_hpd(struct analogix_dp_device *dp);
 void analogix_dp_force_hpd(struct analogix_dp_device *dp);
 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index e78c861b9e06..b47c5af43560 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -333,7 +333,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	}
 }
 
-void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
+int analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 {
 	u32 reg;
 	int timeout_loop = 0;
@@ -355,7 +355,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 			timeout_loop++;
 			if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
 				dev_err(dp->dev, "failed to get pll lock status\n");
-				return;
+				return -ETIMEDOUT;
 			}
 			usleep_range(10, 20);
 		}
@@ -366,6 +366,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 	reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
 		| AUX_FUNC_EN_N);
 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	return 0;
 }
 
 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)
-- 
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[PATCH 19/41] drm/bridge: analogix_dp: Wait for HPD signal before configuring link

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
must first detect that the HPD signal is asserted high by the Downstream
Device before establishing a link with it.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index f3eea7636a2e..048b6f7c9b6e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1172,6 +1172,15 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 	if (ret)
 		goto out_dp_init;
 
+	/* According to DP spec v1.3 chap 3.5.1.2 Link Training,
+	 * We should first make sure the HPD signal is asserted high by device
+	 * when we want to establish a link with it. */
+	ret = analogix_dp_detect_hpd(dp);
+	if (ret) {
+		DRM_ERROR("failed to get hpd single ret = %d\n", ret);
+		goto out_dp_init;
+	}
+
 	ret = analogix_dp_commit(dp);
 	if (ret)
 		goto out_dp_init;
-- 
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[PATCH 20/41] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++++++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  3 +++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index b47c5af43560..bb72f8b0e603 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -321,10 +321,16 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 		break;
 	case POWER_ALL:
 		if (enable) {
-			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
-				CH1_PD | CH0_PD;
+			reg = DP_ALL_PD;
 			writel(reg, dp->reg_base + phy_pd_addr);
 		} else {
+			reg = DP_ALL_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+			usleep_range(10, 15);
+			reg &= ~DP_INC_BG;
+			writel(reg, dp->reg_base + phy_pd_addr);
+			usleep_range(10, 15);
+
 			writel(0x00, dp->reg_base + phy_pd_addr);
 		}
 		break;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 40200c652533..9602668669f4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -342,12 +342,15 @@
 #define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
 
 /* ANALOGIX_DP_PHY_PD */
+#define DP_INC_BG				(0x1 << 7)
+#define DP_EXP_BG				(0x1 << 6)
 #define DP_PHY_PD				(0x1 << 5)
 #define AUX_PD					(0x1 << 4)
 #define CH3_PD					(0x1 << 3)
 #define CH2_PD					(0x1 << 2)
 #define CH1_PD					(0x1 << 1)
 #define CH0_PD					(0x1 << 0)
+#define DP_ALL_PD				(0xff)
 
 /* ANALOGIX_DP_PHY_TEST */
 #define MACRO_RST				(0x1 << 5)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 21/41] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel

[Sean Paul]

From: Lin Huang <hl@rock-chips.com>

When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 048b6f7c9b6e..3b2d53935ae9 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1163,6 +1163,12 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 
 	pm_runtime_get_sync(dp->dev);
 
+	ret = clk_prepare_enable(dp->clock);
+	if (ret < 0) {
+		DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);
+		goto out_dp_clk_pre;
+	}
+
 	if (dp->plat_data->power_on)
 		dp->plat_data->power_on(dp->plat_data);
 
@@ -1192,6 +1198,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 	phy_power_off(dp->phy);
 	if (dp->plat_data->power_off)
 		dp->plat_data->power_off(dp->plat_data);
+	clk_disable_unprepare(dp->clock);
+out_dp_clk_pre:
 	pm_runtime_put_sync(dp->dev);
 
 	return ret;
@@ -1235,10 +1243,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 
 	disable_irq(dp->irq);
 	phy_power_off(dp->phy);
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
 
 	if (dp->plat_data->power_off)
 		dp->plat_data->power_off(dp->plat_data);
 
+	clk_disable_unprepare(dp->clock);
+
 	pm_runtime_put_sync(dp->dev);
 
 	ret = analogix_dp_prepare_panel(dp, false, true);
-- 
2.12.0.246.ga2ecc84866-goog


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[PATCH 22/41] drm/bridge: analogix_dp: Extend hpd check time to 100ms

[Sean Paul]

From: Lin Huang <hl@rock-chips.com>

We only allocated 1ms to detect the hpd signal before, it too short to detect
a short pulse (hpd signal), extend it to 100ms.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Cc: 征增 王 <wzz@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 3b2d53935ae9..043641aa0a6f 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -76,7 +76,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
 			return 0;
 
 		timeout_loop++;
-		usleep_range(10, 11);
+		usleep_range(1000, 1100);
 	}
 
 	/*
-- 
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[PATCH 23/41] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode

[Sean Paul]

From: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Enhanced mode is required by the eDP 1.2 specification, and not doing it early
could result in a period of time where we have a link transmitting idle packets
without it. Since there is no reason to disable it, we just enable it at the
beginning of link training and then keep it on all the time

Cc: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 043641aa0a6f..8d69d4327871 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -284,6 +284,8 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2);
 	if (retval < 0)
 		return retval;
+	/* set enhanced mode if available */
+	analogix_dp_set_enhanced_mode(dp);
 
 	/* Set TX pre-emphasis to minimum */
 	for (lane = 0; lane < lane_count; lane++)
@@ -596,8 +598,6 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		dev_dbg(dp->dev, "fast link training %s\n",
 			dp->fast_train_enable ? "supported" : "unsupported");
 
-		/* set enhanced mode if available */
-		analogix_dp_set_enhanced_mode(dp);
 		dp->link_train.lt_state = FINISHED;
 
 		return 0;
@@ -947,8 +947,6 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
 	}
 
 	analogix_dp_enable_scramble(dp, 1);
-	analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
-	analogix_dp_enable_enhanced_mode(dp, 1);
 
 	analogix_dp_init_video(dp);
 	ret = analogix_dp_config_video(dp);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 24/41] drm/bridge: analogix_dp: Check dpcd write/read status

[Sean Paul]

From: Lin Huang <hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

We need to check the dpcd write/read return value to see whether the
write/read was successful

Cc: Kristian H. Kristensen <hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Lin Huang <hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 173 +++++++++++++++------
 1 file changed, 125 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 8d69d4327871..dcf39ea0d14b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -163,80 +163,132 @@ int analogix_dp_disable_psr(struct device *dev)
 }
 EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
 
-static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
 {
 	unsigned char psr_version;
+	int ret;
+
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to get PSR version, disable it\n");
+		return ret;
+	}
 
-	drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
 	dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version);
 
-	return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+	dp->psr_enable = (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
+	return 0;
 }
 
-static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
+static int analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
 {
 	unsigned char psr_en;
+	int ret;
 
 	/* Disable psr function */
-	drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to get psr config\n");
+		goto end;
+	}
+
 	psr_en &= ~DP_PSR_ENABLE;
-	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to disable panel psr\n");
+		goto end;
+	}
 
 	/* Main-Link transmitter remains active during PSR active states */
 	psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION;
-	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to set panel psr\n");
+		goto end;
+	}
 
 	/* Enable psr function */
 	psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
 		 DP_PSR_CRC_VERIFICATION;
-	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to set panel psr\n");
+		goto end;
+	}
 
 	analogix_dp_enable_psr_crc(dp);
+	return 0;
+end:
+	dev_err(dp->dev, "enable psr fail, force to disable psr\n");
+	dp->psr_enable = false;
+	return ret;
 }
 
-static void
+static int
 analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
 				       bool enable)
 {
 	u8 data;
+	int ret;
 
-	drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
+	if (ret < 0)
+		return ret;
 
 	if (enable)
-		drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
-				   DP_LANE_COUNT_ENHANCED_FRAME_EN |
-					DPCD_LANE_COUNT_SET(data));
+		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
+					 DP_LANE_COUNT_ENHANCED_FRAME_EN |
+					 DPCD_LANE_COUNT_SET(data));
 	else
-		drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
-				   DPCD_LANE_COUNT_SET(data));
+		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
+					 DPCD_LANE_COUNT_SET(data));
+
+	return ret < 0 ? ret : 0;
 }
 
-static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
+static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp,
+						  u8 *enhanced_mode_support)
 {
 	u8 data;
-	int retval;
+	int ret;
 
-	drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
-	retval = DPCD_ENHANCED_FRAME_CAP(data);
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
+	if (ret < 0)
+		return ret;
 
-	return retval;
+	*enhanced_mode_support = DPCD_ENHANCED_FRAME_CAP(data);
+
+	return 0;
 }
 
-static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
+static int analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
 {
 	u8 data;
+	int ret;
+
+	ret = analogix_dp_is_enhanced_mode_available(dp, &data);
+	if (ret < 0)
+		return ret;
+
+	ret = analogix_dp_enable_rx_to_enhanced_mode(dp, data);
+	if (ret < 0)
+		return ret;
 
-	data = analogix_dp_is_enhanced_mode_available(dp);
-	analogix_dp_enable_rx_to_enhanced_mode(dp, data);
 	analogix_dp_enable_enhanced_mode(dp, data);
+
+	return 0;
 }
 
-static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
+static int analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
 {
+	int retval;
+
 	analogix_dp_set_training_pattern(dp, DP_NONE);
 
-	drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
-			   DP_TRAINING_PATTERN_DISABLE);
+	retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+				    DP_TRAINING_PATTERN_DISABLE);
+
+	return retval < 0 ? retval : 0;
 }
 
 static void
@@ -285,7 +337,11 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	if (retval < 0)
 		return retval;
 	/* set enhanced mode if available */
-	analogix_dp_set_enhanced_mode(dp);
+	retval = analogix_dp_set_enhanced_mode(dp);
+	if (retval < 0) {
+		dev_err(dp->dev, "failed to set enhance mode\n");
+		return retval;
+	}
 
 	/* Set TX pre-emphasis to minimum */
 	for (lane = 0; lane < lane_count; lane++)
@@ -570,10 +626,11 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 
 	if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
 		/* traing pattern Set to Normal */
-		analogix_dp_training_pattern_dis(dp);
+		retval = analogix_dp_training_pattern_dis(dp);
+		if (retval < 0)
+			return retval;
 
 		dev_info(dp->dev, "Link Training success!\n");
-
 		analogix_dp_get_link_bandwidth(dp, &reg);
 		dp->link_train.link_rate = reg;
 		dev_dbg(dp->dev, "final bandwidth = %.2x\n",
@@ -810,7 +867,6 @@ static int analogix_dp_train_link(struct analogix_dp_device *dp)
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)
 {
-	int retval = 0;
 	int timeout_loop = 0;
 	int done_count = 0;
 
@@ -828,8 +884,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
 			break;
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
-			return -ETIMEDOUT;
+			dev_warn(dp->dev,
+				 "Ignoring timeout of slave video streamclk ok\n");
+			break;
 		}
 		usleep_range(1000, 1001);
 	}
@@ -868,30 +925,35 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		usleep_range(1000, 1001);
 	}
 
-	if (retval != 0)
-		dev_err(dp->dev, "Video stream is not detected!\n");
-
-	return retval;
+	return 0;
 }
 
-static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
+static int analogix_dp_enable_scramble(struct analogix_dp_device *dp,
 					bool enable)
 {
 	u8 data;
+	int ret;
 
 	if (enable) {
 		analogix_dp_enable_scrambling(dp);
 
-		drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
-		drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
+					&data);
+		if (ret != 1)
+			return ret;
+		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
 				   (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
 	} else {
 		analogix_dp_disable_scrambling(dp);
 
-		drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
-		drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
+		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
+					&data);
+		if (ret != 1)
+			return ret;
+		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
 				   (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
 	}
+	return ret < 0 ? ret : 0;
 }
 
 static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
@@ -946,23 +1008,36 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
 		return ret;
 	}
 
-	analogix_dp_enable_scramble(dp, 1);
+	ret = analogix_dp_enable_scramble(dp, 1);
+	if (ret < 0) {
+		dev_err(dp->dev, "can not enable scramble\n");
+		return ret;
+	}
 
 	analogix_dp_init_video(dp);
 	ret = analogix_dp_config_video(dp);
-	if (ret)
+	if (ret) {
 		dev_err(dp->dev, "unable to config video\n");
+		return ret;
+	}
 
 	/* Safe to enable the panel now */
 	if (dp->plat_data->panel) {
-		if (drm_panel_enable(dp->plat_data->panel))
+		ret = drm_panel_enable(dp->plat_data->panel);
+		if (ret) {
 			DRM_ERROR("failed to enable the panel\n");
+			return ret;
+		}
 	}
 
-	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+	ret = analogix_dp_detect_sink_psr(dp);
+	if (ret)
+		return ret;
+
 	if (dp->psr_enable)
-		analogix_dp_enable_sink_psr(dp);
-	return 0;
+		ret = analogix_dp_enable_sink_psr(dp);
+
+	return ret;
 }
 
 /*
@@ -1186,8 +1261,10 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 	}
 
 	ret = analogix_dp_commit(dp);
-	if (ret)
+	if (ret) {
+		DRM_ERROR("dp commit error, ret = %d\n", ret);
 		goto out_dp_init;
+	}
 
 	enable_irq(dp->irq);
 	return 0;
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 25/41] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip

[Sean Paul]

From: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

There some different bit between Rockchip and Exynos in register "AUX_PD",
So let's fix the incorrect operations about it.

Cc: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: zain wang <wzz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 116 ++++++++++++----------
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |   2 +
 2 files changed, 64 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index bb72f8b0e603..377bee4e20fd 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -248,76 +248,84 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 {
 	u32 reg;
 	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+	u32 mask;
 
 	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
 		phy_pd_addr = ANALOGIX_DP_PD;
 
 	switch (block) {
 	case AUX_BLOCK:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= AUX_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~AUX_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+			mask = RK_AUX_PD;
+		else
+			mask = AUX_PD;
+
+		reg = readl(dp->reg_base + phy_pd_addr);
+		if (enable)
+				reg |= mask;
+		else
+				reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
 		break;
 	case CH0_BLOCK:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= CH0_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~CH0_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		mask = CH0_PD;
+		reg = readl(dp->reg_base + phy_pd_addr);
+
+		if (enable)
+			reg |= mask;
+		else
+			reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
 		break;
 	case CH1_BLOCK:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= CH1_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~CH1_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		mask = CH1_PD;
+		reg = readl(dp->reg_base + phy_pd_addr);
+
+		if (enable)
+			reg |= mask;
+		else
+			reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
 		break;
 	case CH2_BLOCK:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= CH2_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~CH2_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		mask = CH2_PD;
+		reg = readl(dp->reg_base + phy_pd_addr);
+
+		if (enable)
+			reg |= mask;
+		else
+			reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
 		break;
 	case CH3_BLOCK:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= CH3_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~CH3_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		mask = CH3_PD;
+		reg = readl(dp->reg_base + phy_pd_addr);
+
+		if (enable)
+			reg |= mask;
+		else
+			reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
 		break;
 	case ANALOG_TOTAL:
-		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg |= DP_PHY_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
-			reg &= ~DP_PHY_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
-		}
+		/*
+		 * There is no bit named DP_PHY_PD, so We used DP_INC_BG
+		 * to power off everything instead of DP_PHY_PD in
+		 * Rockchip
+		 */
+		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+			mask = DP_INC_BG;
+		else
+			mask = DP_PHY_PD;
+
+		reg = readl(dp->reg_base + phy_pd_addr);
+		if (enable)
+				reg |= mask;
+		else
+				reg &= ~mask;
+		writel(reg, dp->reg_base + phy_pd_addr);
+		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+			usleep_range(10, 15);
 		break;
 	case POWER_ALL:
 		if (enable) {
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 9602668669f4..b633a4a5082a 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -345,7 +345,9 @@
 #define DP_INC_BG				(0x1 << 7)
 #define DP_EXP_BG				(0x1 << 6)
 #define DP_PHY_PD				(0x1 << 5)
+#define RK_AUX_PD				(0x1 << 5)
 #define AUX_PD					(0x1 << 4)
+#define RK_PLL_PD				(0x1 << 4)
 #define CH3_PD					(0x1 << 3)
 #define CH2_PD					(0x1 << 2)
 #define CH1_PD					(0x1 << 1)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 26/41] drm/bridge: analogix_dp: Reset aux channel if an error occurred

[Sean Paul]

From: Lin Huang <hl@rock-chips.com>

AUX errors are caused by many different reasons. We may not know what
happened in aux channel on failure, so let's reset aux channel if some
errors occurred.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 377bee4e20fd..1cb57e528ec8 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -465,6 +465,10 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	reg = RPLY_RECEIV | AUX_ERR;
 	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
 
+	analogix_dp_set_analog_power_down(dp, AUX_BLOCK, true);
+	usleep_range(10, 11);
+	analogix_dp_set_analog_power_down(dp, AUX_BLOCK, false);
+
 	analogix_dp_reset_aux(dp);
 
 	/* Disable AUX transaction H/W retry */
@@ -1158,7 +1162,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 				 reg, !(reg & AUX_EN), 25, 500 * 1000);
 	if (ret) {
 		dev_err(dp->dev, "AUX CH enable timeout!\n");
-		return -ETIMEDOUT;
+		goto aux_error;
 	}
 
 	/* TODO: Wait for an interrupt instead of looping? */
@@ -1167,7 +1171,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 				 reg, reg & RPLY_RECEIV, 10, 20 * 1000);
 	if (ret) {
 		dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
-		return -ETIMEDOUT;
+		goto aux_error;
 	}
 
 	/* Clear interrupt source for AUX CH command reply */
@@ -1177,7 +1181,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
 	if (reg & AUX_ERR) {
 		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
-		return -EREMOTEIO;
+		goto aux_error;
 	}
 
 	/* Check AUX CH error access status */
@@ -1185,7 +1189,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 	if ((reg & AUX_STATUS_MASK)) {
 		dev_err(dp->dev, "AUX CH error happened: %d\n\n",
 			reg & AUX_STATUS_MASK);
-		return -EREMOTEIO;
+		goto aux_error;
 	}
 
 	if (msg->request & DP_AUX_I2C_READ) {
@@ -1211,4 +1215,10 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 		msg->reply = DP_AUX_NATIVE_REPLY_ACK;
 
 	return num_transferred > 0 ? num_transferred : -EBUSY;
+
+aux_error:
+	/* if aux err happen, reset aux */
+	analogix_dp_init_aux(dp);
+
+	return -EREMOTEIO;
 }
-- 
2.12.0.246.ga2ecc84866-goog


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[PATCH 27/41] drm/rockchip: Restore psr->state when enable/disable psr failed

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  4 +++-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++------
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 20 +++++++++++++-------
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |  2 +-
 4 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index dcf39ea0d14b..35ea04ff4078 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -156,8 +156,10 @@ int analogix_dp_disable_psr(struct device *dev)
 	psr_vsc.DB1 = 0;
 
 	ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
-	if (ret != 1)
+	if (ret != 1) {
 		dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
+		return ret;
+	}
 
 	return analogix_dp_send_psr_spd(dp, &psr_vsc, false);
 }
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index b6c6d6d09d7e..0614d32c5435 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -76,7 +76,7 @@ struct rockchip_dp_device {
 	struct analogix_dp_plat_data plat_data;
 };
 
-static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
+static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
 	struct drm_crtc *crtc = dp->encoder.crtc;
@@ -84,12 +84,12 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	int ret;
 
 	if (!analogix_dp_psr_enabled(dp->dev))
-		return;
+		return 0;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
 
 	if (!crtc)
-		return;
+		return -EINVAL;
 
 	vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay;
 
@@ -97,13 +97,13 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 					  PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
 	if (ret) {
 		dev_err(dp->dev, "line flag interrupt did not arrive\n");
-		return;
+		return -ETIMEDOUT;
 	}
 
 	if (enabled)
-		analogix_dp_enable_psr(dp->dev);
+		return analogix_dp_enable_psr(dp->dev);
 	else
-		analogix_dp_disable_psr(dp->dev);
+		return analogix_dp_disable_psr(dp->dev);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index b339ca943139..9376f4396b6b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -36,7 +36,7 @@ struct psr_drv {
 
 	struct delayed_work	flush_work;
 
-	void (*set)(struct drm_encoder *encoder, bool enable);
+	int (*set)(struct drm_encoder *encoder, bool enable);
 };
 
 static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
@@ -93,19 +93,25 @@ static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 		return;
 	}
 
-	psr->state = state;
-
 	/* Actually commit the state change to hardware */
-	switch (psr->state) {
+	switch (state) {
 	case PSR_ENABLE:
-		psr->set(psr->encoder, true);
+		if (psr->set(psr->encoder, true))
+			return;
 		break;
 
 	case PSR_DISABLE:
 	case PSR_FLUSH:
-		psr->set(psr->encoder, false);
+		if (psr->set(psr->encoder, false))
+			return;
 		break;
+
+	default:
+		pr_err("%s: Unknown state %d\n", __func__, state);
+		return;
 	}
+
+	psr->state = state;
 }
 
 static void psr_set_state(struct psr_drv *psr, enum psr_state state)
@@ -229,7 +235,7 @@ EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
  * Zero on success, negative errno on failure.
  */
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
-			void (*psr_set)(struct drm_encoder *, bool enable))
+			int (*psr_set)(struct drm_encoder *, bool enable))
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index b1ea0155e57c..06537ee27565 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
@@ -22,7 +22,7 @@ int rockchip_drm_psr_activate(struct drm_encoder *encoder);
 int rockchip_drm_psr_deactivate(struct drm_encoder *encoder);
 
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
-			void (*psr_set)(struct drm_encoder *, bool enable));
+			int (*psr_set)(struct drm_encoder *, bool enable));
 void rockchip_drm_psr_unregister(struct drm_encoder *encoder);
 
 #endif /* __ROCKCHIP_DRM_PSR__ */
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 27/41] drm/rockchip: Restore psr->state when enable/disable psr failed

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  4 +++-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++------
 drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 20 +++++++++++++-------
 drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |  2 +-
 4 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index dcf39ea0d14b..35ea04ff4078 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -156,8 +156,10 @@ int analogix_dp_disable_psr(struct device *dev)
 	psr_vsc.DB1 = 0;
 
 	ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
-	if (ret != 1)
+	if (ret != 1) {
 		dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
+		return ret;
+	}
 
 	return analogix_dp_send_psr_spd(dp, &psr_vsc, false);
 }
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index b6c6d6d09d7e..0614d32c5435 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -76,7 +76,7 @@ struct rockchip_dp_device {
 	struct analogix_dp_plat_data plat_data;
 };
 
-static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
+static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
 	struct drm_crtc *crtc = dp->encoder.crtc;
@@ -84,12 +84,12 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	int ret;
 
 	if (!analogix_dp_psr_enabled(dp->dev))
-		return;
+		return 0;
 
 	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
 
 	if (!crtc)
-		return;
+		return -EINVAL;
 
 	vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay;
 
@@ -97,13 +97,13 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 					  PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
 	if (ret) {
 		dev_err(dp->dev, "line flag interrupt did not arrive\n");
-		return;
+		return -ETIMEDOUT;
 	}
 
 	if (enabled)
-		analogix_dp_enable_psr(dp->dev);
+		return analogix_dp_enable_psr(dp->dev);
 	else
-		analogix_dp_disable_psr(dp->dev);
+		return analogix_dp_disable_psr(dp->dev);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
index b339ca943139..9376f4396b6b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c
@@ -36,7 +36,7 @@ struct psr_drv {
 
 	struct delayed_work	flush_work;
 
-	void (*set)(struct drm_encoder *encoder, bool enable);
+	int (*set)(struct drm_encoder *encoder, bool enable);
 };
 
 static struct psr_drv *find_psr_by_crtc(struct drm_crtc *crtc)
@@ -93,19 +93,25 @@ static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state)
 		return;
 	}
 
-	psr->state = state;
-
 	/* Actually commit the state change to hardware */
-	switch (psr->state) {
+	switch (state) {
 	case PSR_ENABLE:
-		psr->set(psr->encoder, true);
+		if (psr->set(psr->encoder, true))
+			return;
 		break;
 
 	case PSR_DISABLE:
 	case PSR_FLUSH:
-		psr->set(psr->encoder, false);
+		if (psr->set(psr->encoder, false))
+			return;
 		break;
+
+	default:
+		pr_err("%s: Unknown state %d\n", __func__, state);
+		return;
 	}
+
+	psr->state = state;
 }
 
 static void psr_set_state(struct psr_drv *psr, enum psr_state state)
@@ -229,7 +235,7 @@ EXPORT_SYMBOL(rockchip_drm_psr_flush_all);
  * Zero on success, negative errno on failure.
  */
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
-			void (*psr_set)(struct drm_encoder *, bool enable))
+			int (*psr_set)(struct drm_encoder *, bool enable))
 {
 	struct rockchip_drm_private *drm_drv = encoder->dev->dev_private;
 	struct psr_drv *psr;
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
index b1ea0155e57c..06537ee27565 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.h
@@ -22,7 +22,7 @@ int rockchip_drm_psr_activate(struct drm_encoder *encoder);
 int rockchip_drm_psr_deactivate(struct drm_encoder *encoder);
 
 int rockchip_drm_psr_register(struct drm_encoder *encoder,
-			void (*psr_set)(struct drm_encoder *, bool enable));
+			int (*psr_set)(struct drm_encoder *, bool enable));
 void rockchip_drm_psr_unregister(struct drm_encoder *encoder);
 
 #endif /* __ROCKCHIP_DRM_PSR__ */
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 28/41] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list.  We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.

Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 1cb57e528ec8..2cacd1e84b4d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -230,16 +230,20 @@ enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp)
 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
 {
 	u32 reg;
+	u32 mask = DP_PLL_PD;
+	u32 pd_addr = ANALOGIX_DP_PLL_CTL;
 
-	if (enable) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-		reg |= DP_PLL_PD;
-		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
-	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-		reg &= ~DP_PLL_PD;
-		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+		pd_addr = ANALOGIX_DP_PD;
+		mask = RK_PLL_PD;
 	}
+
+	reg = readl(dp->reg_base + pd_addr);
+	if (enable)
+		reg |= mask;
+	else
+		reg &= ~mask;
+	writel(reg, dp->reg_base + pd_addr);
 }
 
 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 29/41] drm/bridge: analogix_dp: Fix timeout of video streamclk config

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

The STRM_VALID bit in register ANALOGIX_DP_SYS_CTL_3 may be unstable,
so we may hit the error log "Timeout of video streamclk ok" since
checked this unstable bit.
In fact, we can go continue and the streamclk is ok if we wait enough time,
it does no effect on display.
Let's change this error to warn.

Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 35ea04ff4078..4ebbf3053639 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -886,9 +886,8 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
 			break;
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			dev_warn(dp->dev,
-				 "Ignoring timeout of slave video streamclk ok\n");
-			break;
+			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
+			return -ETIMEDOUT;
 		}
 		usleep_range(1000, 1001);
 	}
@@ -920,8 +919,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 			done_count = 0;
 		}
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			dev_err(dp->dev, "Timeout of video streamclk ok\n");
-			return -ETIMEDOUT;
+			dev_warn(dp->dev,
+				 "Ignoring timeout of video streamclk ok\n");
+			break;
 		}
 
 		usleep_range(1000, 1001);
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 30/41] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to Exynos:
on Exynos edp phy,
BIT 7		MASTER_VID_FUNC_EN_N
BIT 6		reserved
BIT 5		SLAVE_VID_FUNC_EN_N
on Rockchip edp phy,
BIT 7		reserved
BIT 6		RK_VID_CAP_FUNC_EN_N
BIT 5		RK_VID_FIFO_FUNC_EN_N
So, we should do some private operations to Rockchip.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 ++++++++++++++-----
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  2 ++
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 2cacd1e84b4d..ddc8165947c1 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -126,9 +126,14 @@ void analogix_dp_reset(struct analogix_dp_device *dp)
 	analogix_dp_stop_video(dp);
 	analogix_dp_enable_video_mute(dp, 0);
 
-	reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
-		AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
-		HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
+		reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N |
+			SW_FUNC_EN_N;
+	else
+		reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
+			AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
+			HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+
 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
 
 	reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
@@ -970,8 +975,12 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
 	u32 reg;
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
-	reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
-	reg |= MASTER_VID_FUNC_EN_N;
+	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+		reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N);
+	} else {
+		reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
+		reg |= MASTER_VID_FUNC_EN_N;
+	}
 	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index b633a4a5082a..0cf27c731727 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -127,7 +127,9 @@
 
 /* ANALOGIX_DP_FUNC_EN_1 */
 #define MASTER_VID_FUNC_EN_N			(0x1 << 7)
+#define RK_VID_CAP_FUNC_EN_N			(0x1 << 6)
 #define SLAVE_VID_FUNC_EN_N			(0x1 << 5)
+#define RK_VID_FIFO_FUNC_EN_N			(0x1 << 5)
 #define AUD_FIFO_FUNC_EN_N			(0x1 << 4)
 #define AUD_FUNC_EN_N				(0x1 << 3)
 #define HDCP_FUNC_EN_N				(0x1 << 2)
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 31/41] drm/bridge: analogix_dp: Move fast link training detect to set_bridge

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

It's too early to detect fast link training, if other step after it failed,
we will set fast_link flag to 1, and retry set_bridge again. In this case
we will power down and power up panel power supply, and we will do fast link
training since we have set fast_link flag to 1. In fact, we should do full
link training now, not the fast link training. So we should move the fast
link detection at the end of set_bridge.

Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 42 +++++++++++++---------
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 4ebbf3053639..65af5ef8ec12 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -599,7 +599,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
 	int lane, lane_count, retval;
 	u32 reg;
-	u8 link_align, link_status[2], adjust_request[2], spread;
+	u8 link_align, link_status[2], adjust_request[2];
 
 	usleep_range(400, 401);
 
@@ -643,20 +643,6 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		dev_dbg(dp->dev, "final lane count = %.2x\n",
 			dp->link_train.lane_count);
 
-		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
-					   &spread);
-		if (retval != 1) {
-			dev_err(dp->dev, "failed to read downspread %d\n",
-				retval);
-			dp->fast_train_enable = false;
-		} else {
-			dp->fast_train_enable =
-				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
-					true : false;
-		}
-		dev_dbg(dp->dev, "fast link training %s\n",
-			dp->fast_train_enable ? "supported" : "unsupported");
-
 		dp->link_train.lt_state = FINISHED;
 
 		return 0;
@@ -994,6 +980,22 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 	return IRQ_HANDLED;
 }
 
+static int analogix_dp_fast_link_train_detection(struct analogix_dp_device *dp)
+{
+	int ret;
+	u8 spread;
+
+	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD, &spread);
+	if (ret != 1) {
+		dev_err(dp->dev, "failed to read downspread %d\n", ret);
+		return ret;
+	}
+	dp->fast_train_enable = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
+	dev_dbg(dp->dev, "fast link training %s\n",
+		dp->fast_train_enable ? "supported" : "unsupported");
+	return 0;
+}
+
 static int analogix_dp_commit(struct analogix_dp_device *dp)
 {
 	int ret;
@@ -1036,8 +1038,16 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
 	if (ret)
 		return ret;
 
-	if (dp->psr_enable)
+	if (dp->psr_enable) {
 		ret = analogix_dp_enable_sink_psr(dp);
+		if (ret)
+			return ret;
+	}
+
+	/* Check whether panel supports fast training */
+	ret =  analogix_dp_fast_link_train_detection(dp);
+	if (ret)
+		dp->psr_enable = false;
 
 	return ret;
 }
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 32/41] drm/rockchip: Flush PSR before committing modeset disables/enables

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it can
race with hardware programming done in the aforementioned stages.

To avoid the race, we can trigger PSR flush before committing modeset
disables/enables. This also has the advantage of removing some
PSR-specific knowledge from the VOP driver.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c  | 13 +++++++++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  7 -------
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index 81f9548672b0..2067f4afadf3 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -175,10 +175,23 @@ static void rockchip_drm_output_poll_changed(struct drm_device *dev)
 }
 
 static void
+rockchip_drm_psr_flush_state(struct drm_atomic_state *state)
+{
+	struct drm_crtc_state *crtc_state;
+	struct drm_crtc *crtc;
+	int i;
+
+	for_each_crtc_in_state(state, crtc, crtc_state, i)
+		rockchip_drm_psr_flush(crtc);
+}
+
+static void
 rockchip_atomic_commit_tail(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
 
+	rockchip_drm_psr_flush_state(state);
+
 	drm_atomic_helper_commit_modeset_disables(dev, state);
 
 	drm_atomic_helper_commit_modeset_enables(dev, state);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ea3fff4170d9..879efc3a6c67 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1067,18 +1067,11 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
 	}
 }
 
-static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
-				  struct drm_crtc_state *old_crtc_state)
-{
-	rockchip_drm_psr_flush(crtc);
-}
-
 static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
 	.enable = vop_crtc_enable,
 	.disable = vop_crtc_disable,
 	.mode_fixup = vop_crtc_mode_fixup,
 	.atomic_flush = vop_crtc_atomic_flush,
-	.atomic_begin = vop_crtc_atomic_begin,
 };
 
 static void vop_crtc_destroy(struct drm_crtc *crtc)
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 32/41] drm/rockchip: Flush PSR before committing modeset disables/enables

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it can
race with hardware programming done in the aforementioned stages.

To avoid the race, we can trigger PSR flush before committing modeset
disables/enables. This also has the advantage of removing some
PSR-specific knowledge from the VOP driver.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c  | 13 +++++++++++++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  7 -------
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index 81f9548672b0..2067f4afadf3 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -175,10 +175,23 @@ static void rockchip_drm_output_poll_changed(struct drm_device *dev)
 }
 
 static void
+rockchip_drm_psr_flush_state(struct drm_atomic_state *state)
+{
+	struct drm_crtc_state *crtc_state;
+	struct drm_crtc *crtc;
+	int i;
+
+	for_each_crtc_in_state(state, crtc, crtc_state, i)
+		rockchip_drm_psr_flush(crtc);
+}
+
+static void
 rockchip_atomic_commit_tail(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
 
+	rockchip_drm_psr_flush_state(state);
+
 	drm_atomic_helper_commit_modeset_disables(dev, state);
 
 	drm_atomic_helper_commit_modeset_enables(dev, state);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ea3fff4170d9..879efc3a6c67 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1067,18 +1067,11 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
 	}
 }
 
-static void vop_crtc_atomic_begin(struct drm_crtc *crtc,
-				  struct drm_crtc_state *old_crtc_state)
-{
-	rockchip_drm_psr_flush(crtc);
-}
-
 static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
 	.enable = vop_crtc_enable,
 	.disable = vop_crtc_disable,
 	.mode_fixup = vop_crtc_mode_fixup,
 	.atomic_flush = vop_crtc_atomic_flush,
-	.atomic_begin = vop_crtc_atomic_begin,
 };
 
 static void vop_crtc_destroy(struct drm_crtc *crtc)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

We do not have to drive the display when it is in PSR mode, so we can
save some power by disabling active VOP windows, until a next PSR flush
turns them back on.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 34 +++++++++++++++++--------
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     |  1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 31 ++++++++++++++++++++++
 3 files changed, 55 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0614d32c5435..de23cc6fd05d 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -91,19 +91,31 @@ static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	if (!crtc)
 		return -EINVAL;
 
-	vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay;
+	if (enabled) {
+		vact_end = crtc->mode.vtotal - crtc->mode.vsync_start +
+			crtc->mode.vdisplay;
+		ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end,
+						PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
+		if (ret) {
+			dev_err(dp->dev, "line flag interrupt did not arrive\n");
+			return -ETIMEDOUT;
+		}
 
-	ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end,
-					  PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
-	if (ret) {
-		dev_err(dp->dev, "line flag interrupt did not arrive\n");
-		return -ETIMEDOUT;
+		ret = analogix_dp_enable_psr(dp->dev);
+		if (ret) {
+			dev_err(dp->dev, "failed to enable psr %d\n", ret);
+			return ret;
+		}
+		rockchip_drm_set_win_enabled(crtc, false);
+	} else {
+		rockchip_drm_set_win_enabled(crtc, true);
+		ret = analogix_dp_disable_psr(dp->dev);
+		if (ret) {
+			dev_err(dp->dev, "failed to disable psr %d\n", ret);
+			return ret;
+		}
 	}
-
-	if (enabled)
-		return analogix_dp_enable_psr(dp->dev);
-	else
-		return analogix_dp_disable_psr(dp->dev);
+	return 0;
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index a966d1d37378..be4ad9b670cf 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -65,5 +65,6 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
 				    struct device *dev);
 int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 				unsigned int mstimeout);
+void rockchip_drm_set_win_enabled(struct drm_crtc *ctrc, bool enabled);
 
 #endif /* _ROCKCHIP_DRM_DRV_H_ */
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 879efc3a6c67..e90a32ee5a36 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -89,6 +89,9 @@
 #define VOP_WIN_GET_YRGBADDR(vop, win) \
 		vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
 
+#define VOP_WIN_TO_INDEX(vop_win) \
+	((vop_win) - (vop_win)->vop->win)
+
 #define to_vop(x) container_of(x, struct vop, crtc)
 #define to_vop_win(x) container_of(x, struct vop_win, base)
 
@@ -108,6 +111,8 @@ struct vop {
 	struct drm_device *drm_dev;
 	bool is_enabled;
 
+	unsigned int win_enabled;
+
 	struct completion dsp_hold_completion;
 
 	/* protected by dev->event_lock */
@@ -562,6 +567,27 @@ static int vop_enable(struct drm_crtc *crtc)
 	return ret;
 }
 
+void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled)
+{
+	struct vop *vop = to_vop(crtc);
+	int i;
+
+	spin_lock(&vop->reg_lock);
+
+	for (i = 0; i < vop->data->win_size; i++) {
+		struct vop_win *vop_win = &vop->win[i];
+		const struct vop_win_data *win = vop_win->data;
+
+		VOP_WIN_SET(vop, win, enable,
+			    enabled && (vop->win_enabled & BIT(i)));
+	}
+
+	vop_cfg_done(vop);
+
+	spin_unlock(&vop->reg_lock);
+}
+EXPORT_SYMBOL(rockchip_drm_set_win_enabled);
+
 static void vop_crtc_disable(struct drm_crtc *crtc)
 {
 	struct vop *vop = to_vop(crtc);
@@ -581,6 +607,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 		spin_lock(&vop->reg_lock);
 		VOP_WIN_SET(vop, win, enable, 0);
+		vop->win_enabled &= ~BIT(i);
 		spin_unlock(&vop->reg_lock);
 	}
 
@@ -700,6 +727,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane,
 	spin_lock(&vop->reg_lock);
 
 	VOP_WIN_SET(vop, win, enable, 0);
+	vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win));
 
 	spin_unlock(&vop->reg_lock);
 }
@@ -807,6 +835,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
 	}
 
 	VOP_WIN_SET(vop, win, enable, 1);
+	vop->win_enabled |= BIT(VOP_WIN_TO_INDEX(vop_win));
+
 	spin_unlock(&vop->reg_lock);
 }
 
@@ -1443,6 +1473,7 @@ static int vop_initial(struct vop *vop)
 		const struct vop_win_data *win = &vop_data->win[i];
 
 		VOP_WIN_SET(vop, win, enable, 0);
+		vop->win_enabled &= ~BIT(i);
 	}
 
 	vop_cfg_done(vop);
-- 
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[PATCH 33/41] drm/rockchip: Disable VOP windows when PSR is active

[Sean Paul]

From: zain wang <wzz@rock-chips.com>

We do not have to drive the display when it is in PSR mode, so we can
save some power by disabling active VOP windows, until a next PSR flush
turns them back on.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 34 +++++++++++++++++--------
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h     |  1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c     | 31 ++++++++++++++++++++++
 3 files changed, 55 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0614d32c5435..de23cc6fd05d 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -91,19 +91,31 @@ static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 	if (!crtc)
 		return -EINVAL;
 
-	vact_end = crtc->mode.vtotal - crtc->mode.vsync_start + crtc->mode.vdisplay;
+	if (enabled) {
+		vact_end = crtc->mode.vtotal - crtc->mode.vsync_start +
+			crtc->mode.vdisplay;
+		ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end,
+						PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
+		if (ret) {
+			dev_err(dp->dev, "line flag interrupt did not arrive\n");
+			return -ETIMEDOUT;
+		}
 
-	ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end,
-					  PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
-	if (ret) {
-		dev_err(dp->dev, "line flag interrupt did not arrive\n");
-		return -ETIMEDOUT;
+		ret = analogix_dp_enable_psr(dp->dev);
+		if (ret) {
+			dev_err(dp->dev, "failed to enable psr %d\n", ret);
+			return ret;
+		}
+		rockchip_drm_set_win_enabled(crtc, false);
+	} else {
+		rockchip_drm_set_win_enabled(crtc, true);
+		ret = analogix_dp_disable_psr(dp->dev);
+		if (ret) {
+			dev_err(dp->dev, "failed to disable psr %d\n", ret);
+			return ret;
+		}
 	}
-
-	if (enabled)
-		return analogix_dp_enable_psr(dp->dev);
-	else
-		return analogix_dp_disable_psr(dp->dev);
+	return 0;
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index a966d1d37378..be4ad9b670cf 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -65,5 +65,6 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
 				    struct device *dev);
 int rockchip_drm_wait_line_flag(struct drm_crtc *crtc, unsigned int line_num,
 				unsigned int mstimeout);
+void rockchip_drm_set_win_enabled(struct drm_crtc *ctrc, bool enabled);
 
 #endif /* _ROCKCHIP_DRM_DRV_H_ */
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 879efc3a6c67..e90a32ee5a36 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -89,6 +89,9 @@
 #define VOP_WIN_GET_YRGBADDR(vop, win) \
 		vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
 
+#define VOP_WIN_TO_INDEX(vop_win) \
+	((vop_win) - (vop_win)->vop->win)
+
 #define to_vop(x) container_of(x, struct vop, crtc)
 #define to_vop_win(x) container_of(x, struct vop_win, base)
 
@@ -108,6 +111,8 @@ struct vop {
 	struct drm_device *drm_dev;
 	bool is_enabled;
 
+	unsigned int win_enabled;
+
 	struct completion dsp_hold_completion;
 
 	/* protected by dev->event_lock */
@@ -562,6 +567,27 @@ static int vop_enable(struct drm_crtc *crtc)
 	return ret;
 }
 
+void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled)
+{
+	struct vop *vop = to_vop(crtc);
+	int i;
+
+	spin_lock(&vop->reg_lock);
+
+	for (i = 0; i < vop->data->win_size; i++) {
+		struct vop_win *vop_win = &vop->win[i];
+		const struct vop_win_data *win = vop_win->data;
+
+		VOP_WIN_SET(vop, win, enable,
+			    enabled && (vop->win_enabled & BIT(i)));
+	}
+
+	vop_cfg_done(vop);
+
+	spin_unlock(&vop->reg_lock);
+}
+EXPORT_SYMBOL(rockchip_drm_set_win_enabled);
+
 static void vop_crtc_disable(struct drm_crtc *crtc)
 {
 	struct vop *vop = to_vop(crtc);
@@ -581,6 +607,7 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
 
 		spin_lock(&vop->reg_lock);
 		VOP_WIN_SET(vop, win, enable, 0);
+		vop->win_enabled &= ~BIT(i);
 		spin_unlock(&vop->reg_lock);
 	}
 
@@ -700,6 +727,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane,
 	spin_lock(&vop->reg_lock);
 
 	VOP_WIN_SET(vop, win, enable, 0);
+	vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win));
 
 	spin_unlock(&vop->reg_lock);
 }
@@ -807,6 +835,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
 	}
 
 	VOP_WIN_SET(vop, win, enable, 1);
+	vop->win_enabled |= BIT(VOP_WIN_TO_INDEX(vop_win));
+
 	spin_unlock(&vop->reg_lock);
 }
 
@@ -1443,6 +1473,7 @@ static int vop_initial(struct vop *vop)
 		const struct vop_win_data *win = &vop_data->win[i];
 
 		VOP_WIN_SET(vop, win, enable, 0);
+		vop->win_enabled &= ~BIT(i);
 	}
 
 	vop_cfg_done(vop);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 34/41] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

Since we take the ownership of drvdata, the master driver does not have
any means of accessing its own data from unbind callback and all it can
do is calling the analogix unbind callback. However it might be
necessary to do some clean up in the master driver before we really
unbind the analogix part (such as PSR unregister in Rockchip case), so
this patch provides a plat_data->cleanup() callback which is called at
the beginning of analogix_dp_unbind().

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Cc: Brian Norris <briannorris@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +++
 include/drm/bridge/analogix_dp.h                   | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 65af5ef8ec12..6391f5da7643 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1651,6 +1651,9 @@ void analogix_dp_unbind(struct device *dev, struct device *master,
 {
 	struct analogix_dp_device *dp = dev_get_drvdata(dev);
 
+	if (dp->plat_data->cleanup)
+		dp->plat_data->cleanup(dp->plat_data);
+
 	analogix_dp_bridge_disable(dp->bridge);
 
 	if (dp->plat_data->panel) {
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 4fc0165ed3f5..414e9a7f362e 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -36,6 +36,7 @@ struct analogix_dp_plat_data {
 		      struct drm_connector *);
 	int (*get_modes)(struct analogix_dp_plat_data *,
 			 struct drm_connector *);
+	void (*cleanup)(struct analogix_dp_plat_data *);
 };
 
 int analogix_dp_psr_enabled(struct device *dev);
-- 
2.12.0.246.ga2ecc84866-goog

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 35/41] drm/rockchip: analogix_dp: Fix invalid implementation of unbind

[Sean Paul]

From: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Current implementation of unbind dereferences the drvdata pointer
assuming that it's its own data, however the ownership belongs to the
analogix code, which means that the pointer is dereferenced with wrong
type. Fix this by using the recently added platform data .cleanup()
callback to do Rockchip-specific things at unbind.

Cc: Kristian H. Kristensen <hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index de23cc6fd05d..0a92d9e3ffac 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -179,6 +179,13 @@ static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
 	return 0;
 }
 
+static void rockchip_dp_cleanup(struct analogix_dp_plat_data *plat_data)
+{
+	struct rockchip_dp_device *dp = to_dp(plat_data);
+
+	rockchip_drm_psr_unregister(&dp->encoder);
+}
+
 static bool
 rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
 				   const struct drm_display_mode *mode,
@@ -395,25 +402,16 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_on = rockchip_dp_poweron;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
+	dp->plat_data.cleanup = rockchip_dp_cleanup;
 
 	rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
 
 	return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
 }
 
-static void rockchip_dp_unbind(struct device *dev, struct device *master,
-			       void *data)
-{
-	struct rockchip_dp_device *dp = dev_get_drvdata(dev);
-
-	rockchip_drm_psr_unregister(&dp->encoder);
-
-	return analogix_dp_unbind(dev, master, data);
-}
-
 static const struct component_ops rockchip_dp_component_ops = {
 	.bind = rockchip_dp_bind,
-	.unbind = rockchip_dp_unbind,
+	.unbind = analogix_dp_unbind,
 };
 
 static int rockchip_dp_probe(struct platform_device *pdev)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 35/41] drm/rockchip: analogix_dp: Fix invalid implementation of unbind

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

Current implementation of unbind dereferences the drvdata pointer
assuming that it's its own data, however the ownership belongs to the
analogix code, which means that the pointer is dereferenced with wrong
type. Fix this by using the recently added platform data .cleanup()
callback to do Rockchip-specific things at unbind.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Cc: Brian Norris <briannorris@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index de23cc6fd05d..0a92d9e3ffac 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -179,6 +179,13 @@ static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
 	return 0;
 }
 
+static void rockchip_dp_cleanup(struct analogix_dp_plat_data *plat_data)
+{
+	struct rockchip_dp_device *dp = to_dp(plat_data);
+
+	rockchip_drm_psr_unregister(&dp->encoder);
+}
+
 static bool
 rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
 				   const struct drm_display_mode *mode,
@@ -395,25 +402,16 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_on = rockchip_dp_poweron;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
+	dp->plat_data.cleanup = rockchip_dp_cleanup;
 
 	rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
 
 	return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
 }
 
-static void rockchip_dp_unbind(struct device *dev, struct device *master,
-			       void *data)
-{
-	struct rockchip_dp_device *dp = dev_get_drvdata(dev);
-
-	rockchip_drm_psr_unregister(&dp->encoder);
-
-	return analogix_dp_unbind(dev, master, data);
-}
-
 static const struct component_ops rockchip_dp_component_ops = {
 	.bind = rockchip_dp_bind,
-	.unbind = rockchip_dp_unbind,
+	.unbind = analogix_dp_unbind,
 };
 
 static int rockchip_dp_probe(struct platform_device *pdev)
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 36/41] drm/bridge: analogix_dp: Add analogix_dp_shutdown

[Sean Paul]

From: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

This patch adds a function that master driver can call at shutdown time
in case there is some cleanup work to do. The function will then call
back to platform_data .cleanup() callback to let the master driver do
the platform-specific work.

Cc: Kristian H. Kristensen <hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +++++++++
 include/drm/bridge/analogix_dp.h                   | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 6391f5da7643..1454075bce9a 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1665,6 +1665,15 @@ void analogix_dp_unbind(struct device *dev, struct device *master,
 }
 EXPORT_SYMBOL_GPL(analogix_dp_unbind);
 
+void analogix_dp_shutdown(struct device *dev)
+{
+	struct analogix_dp_device *dp = dev_get_drvdata(dev);
+
+	if (dp->plat_data->cleanup)
+		dp->plat_data->cleanup(dp->plat_data);
+}
+EXPORT_SYMBOL_GPL(analogix_dp_shutdown);
+
 #ifdef CONFIG_PM
 int analogix_dp_suspend(struct device *dev)
 {
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 414e9a7f362e..c079ca1ffc76 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -49,6 +49,7 @@ int analogix_dp_suspend(struct device *dev);
 int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
 		     struct analogix_dp_plat_data *plat_data);
 void analogix_dp_unbind(struct device *dev, struct device *master, void *data);
+void analogix_dp_shutdown(struct device *dev);
 
 int analogix_dp_start_crc(struct drm_connector *connector);
 int analogix_dp_stop_crc(struct drm_connector *connector);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 37/41] drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR

[Sean Paul]

From: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

We have to disable PSR before shutdown to avoid any asynchronous PSR
code to interfere with Rockchip DRM device shutdown. We use the recently
added analogix_dp_shutdown() function and rockchip_dp_cleanup() we
already use for unregistering PSR at unbind time.

Cc: Kristian H. Kristensen <hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Tomasz Figa <tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a92d9e3ffac..14f68e792e6f 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -468,6 +468,11 @@ static int rockchip_dp_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static void rockchip_dp_shutdown(struct platform_device *pdev)
+{
+	analogix_dp_shutdown(&pdev->dev);
+}
+
 static const struct dev_pm_ops rockchip_dp_pm_ops = {
 #ifdef CONFIG_PM_SLEEP
 	.suspend = analogix_dp_suspend,
@@ -499,6 +504,7 @@ MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
 static struct platform_driver rockchip_dp_driver = {
 	.probe = rockchip_dp_probe,
 	.remove = rockchip_dp_remove,
+	.shutdown = rockchip_dp_shutdown,
 	.driver = {
 		   .name = "rockchip-dp",
 		   .pm = &rockchip_dp_pm_ops,
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 37/41] drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR

[Sean Paul]

From: Tomasz Figa <tfiga@chromium.org>

We have to disable PSR before shutdown to avoid any asynchronous PSR
code to interfere with Rockchip DRM device shutdown. We use the recently
added analogix_dp_shutdown() function and rockchip_dp_cleanup() we
already use for unregistering PSR at unbind time.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Cc: Brian Norris <briannorris@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a92d9e3ffac..14f68e792e6f 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -468,6 +468,11 @@ static int rockchip_dp_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static void rockchip_dp_shutdown(struct platform_device *pdev)
+{
+	analogix_dp_shutdown(&pdev->dev);
+}
+
 static const struct dev_pm_ops rockchip_dp_pm_ops = {
 #ifdef CONFIG_PM_SLEEP
 	.suspend = analogix_dp_suspend,
@@ -499,6 +504,7 @@ MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
 static struct platform_driver rockchip_dp_driver = {
 	.probe = rockchip_dp_probe,
 	.remove = rockchip_dp_remove,
+	.shutdown = rockchip_dp_shutdown,
 	.driver = {
 		   .name = "rockchip-dp",
 		   .pm = &rockchip_dp_pm_ops,
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 38/41] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner

[Sean Paul]

From: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

The current user of the analogix power_off is "analogix_dp-rockchip".
That driver does this:
- deactivate PSR
- turn off a clock

Both of these things (especially deactive PSR) should be done before
we turn the PHY power off and turn off analog power.  Let's move the
callback up.

Note that without this patch (and with https://patchwork.kernel.org/patch/9553349/
[seanpaul: this patch was not applied, but it seems like the race
can still occur]), I experienced an error in reboot testing where one
thread was at:

  rockchip_drm_psr_deactivate
  rockchip_dp_powerdown
  analogix_dp_bridge_disable
  drm_bridge_disable

...and the other thread was at:

  analogix_dp_send_psr_spd
  analogix_dp_enable_psr
  analogix_dp_psr_set
  psr_flush_handler

The flush handler thread was finding AUX channel errors and eventually
reported "Failed to apply PSR", where I had a kgdb breakpoint. Presumably
the device would have eventually given up and shut down anyway, but it
seems better to fix the order to be more correct.

Cc: Kristian H. Kristensen <hoegsberg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 1454075bce9a..a05bc0271188 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1329,12 +1329,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 	}
 
 	disable_irq(dp->irq);
-	phy_power_off(dp->phy);
-	analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
 
 	if (dp->plat_data->power_off)
 		dp->plat_data->power_off(dp->plat_data);
 
+	phy_power_off(dp->phy);
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
+
 	clk_disable_unprepare(dp->clock);
 
 	pm_runtime_put_sync(dp->dev);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts

[Sean Paul]

From: Douglas Anderson <dianders@chromium.org>

Some of the platform-specific stuff in rockchip_dp_poweron() needs to
happen before the generic code.  Some needs to happen after.  Let's
split the callback in two.

Specifically we can't start doing PSR work until _after_ the whole
controller is up, so don't set the enable until the end.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
[seanpaul added exynos change]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  7 +++++--
 drivers/gpu/drm/exynos/exynos_dp.c                 |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++++++--
 include/drm/bridge/analogix_dp.h                   |  3 ++-
 4 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a05bc0271188..bc9a0a28ab1d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1254,8 +1254,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 		goto out_dp_clk_pre;
 	}
 
-	if (dp->plat_data->power_on)
-		dp->plat_data->power_on(dp->plat_data);
+	if (dp->plat_data->power_on_start)
+		dp->plat_data->power_on_start(dp->plat_data);
 
 	phy_power_on(dp->phy);
 
@@ -1278,6 +1278,9 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 		goto out_dp_init;
 	}
 
+	if (dp->plat_data->power_on_end)
+		dp->plat_data->power_on_end(dp->plat_data);
+
 	enable_irq(dp->irq);
 	return 0;
 
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 1ef0be338b85..6b79c3b3802f 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -168,7 +168,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->drm_dev = drm_dev;
 
 	dp->plat_data.dev_type = EXYNOS_DP;
-	dp->plat_data.power_on = exynos_dp_poweron;
+	dp->plat_data.power_on_start = exynos_dp_poweron;
 	dp->plat_data.power_off = exynos_dp_poweroff;
 	dp->plat_data.attach = exynos_dp_bridge_attach;
 	dp->plat_data.get_modes = exynos_dp_get_modes;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 14f68e792e6f..07dd09e1e32f 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -127,7 +127,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
 	return 0;
 }
 
-static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
+static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
 {
 	struct rockchip_dp_device *dp = to_dp(plat_data);
 	int ret;
@@ -145,6 +145,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 		return ret;
 	}
 
+	return ret;
+}
+
+static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
+{
+	struct rockchip_dp_device *dp = to_dp(plat_data);
+
 	return rockchip_drm_psr_activate(&dp->encoder);
 }
 
@@ -399,7 +406,8 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.encoder = &dp->encoder;
 
 	dp->plat_data.dev_type = dp->data->chip_type;
-	dp->plat_data.power_on = rockchip_dp_poweron;
+	dp->plat_data.power_on_start = rockchip_dp_poweron_start;
+	dp->plat_data.power_on_end = rockchip_dp_poweron_end;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 	dp->plat_data.cleanup = rockchip_dp_cleanup;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index c079ca1ffc76..1049ee56ae76 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -30,7 +30,8 @@ struct analogix_dp_plat_data {
 	struct drm_encoder *encoder;
 	struct drm_connector *connector;
 
-	int (*power_on)(struct analogix_dp_plat_data *);
+	int (*power_on_start)(struct analogix_dp_plat_data *);
+	int (*power_on_end)(struct analogix_dp_plat_data *);
 	int (*power_off)(struct analogix_dp_plat_data *);
 	int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
 		      struct drm_connector *);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts

[Sean Paul]

From: Douglas Anderson <dianders@chromium.org>

Some of the platform-specific stuff in rockchip_dp_poweron() needs to
happen before the generic code.  Some needs to happen after.  Let's
split the callback in two.

Specifically we can't start doing PSR work until _after_ the whole
controller is up, so don't set the enable until the end.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
[seanpaul added exynos change]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  7 +++++--
 drivers/gpu/drm/exynos/exynos_dp.c                 |  2 +-
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++++++--
 include/drm/bridge/analogix_dp.h                   |  3 ++-
 4 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a05bc0271188..bc9a0a28ab1d 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1254,8 +1254,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 		goto out_dp_clk_pre;
 	}
 
-	if (dp->plat_data->power_on)
-		dp->plat_data->power_on(dp->plat_data);
+	if (dp->plat_data->power_on_start)
+		dp->plat_data->power_on_start(dp->plat_data);
 
 	phy_power_on(dp->phy);
 
@@ -1278,6 +1278,9 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
 		goto out_dp_init;
 	}
 
+	if (dp->plat_data->power_on_end)
+		dp->plat_data->power_on_end(dp->plat_data);
+
 	enable_irq(dp->irq);
 	return 0;
 
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 1ef0be338b85..6b79c3b3802f 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -168,7 +168,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
 	dp->drm_dev = drm_dev;
 
 	dp->plat_data.dev_type = EXYNOS_DP;
-	dp->plat_data.power_on = exynos_dp_poweron;
+	dp->plat_data.power_on_start = exynos_dp_poweron;
 	dp->plat_data.power_off = exynos_dp_poweroff;
 	dp->plat_data.attach = exynos_dp_bridge_attach;
 	dp->plat_data.get_modes = exynos_dp_get_modes;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 14f68e792e6f..07dd09e1e32f 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -127,7 +127,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
 	return 0;
 }
 
-static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
+static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
 {
 	struct rockchip_dp_device *dp = to_dp(plat_data);
 	int ret;
@@ -145,6 +145,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 		return ret;
 	}
 
+	return ret;
+}
+
+static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
+{
+	struct rockchip_dp_device *dp = to_dp(plat_data);
+
 	return rockchip_drm_psr_activate(&dp->encoder);
 }
 
@@ -399,7 +406,8 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.encoder = &dp->encoder;
 
 	dp->plat_data.dev_type = dp->data->chip_type;
-	dp->plat_data.power_on = rockchip_dp_poweron;
+	dp->plat_data.power_on_start = rockchip_dp_poweron_start;
+	dp->plat_data.power_on_end = rockchip_dp_poweron_end;
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 	dp->plat_data.cleanup = rockchip_dp_cleanup;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index c079ca1ffc76..1049ee56ae76 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -30,7 +30,8 @@ struct analogix_dp_plat_data {
 	struct drm_encoder *encoder;
 	struct drm_connector *connector;
 
-	int (*power_on)(struct analogix_dp_plat_data *);
+	int (*power_on_start)(struct analogix_dp_plat_data *);
+	int (*power_on_end)(struct analogix_dp_plat_data *);
 	int (*power_off)(struct analogix_dp_plat_data *);
 	int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
 		      struct drm_connector *);
-- 
2.12.0.246.ga2ecc84866-goog

[PATCH 40/41] drm/bridge: analogix_dp: Properly log AUX CH errors

[Sean Paul]

From: Douglas Anderson <dianders@chromium.org>

The code in analogix_dp_transfer() that was supposed to print out:
  AUX CH error happened

Was actually dead code. That's because the previous check (whether
the interrupt status indicated any errors) would have hit for all
errors anyway.

Let's combine the two error checks so we can actually see AUX CH
errors.  We'll also downgrade the message to a warning since some of
these types of errors might be expected for some displays.  If this
gets too noisy we can downgrade again to debug.

Cc: 征增 王 <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index ddc8165947c1..29d130222636 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -1104,6 +1104,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 			     struct drm_dp_aux_msg *msg)
 {
 	u32 reg;
+	u32 status_reg;
 	u8 *buffer = msg->buffer;
 	unsigned int i;
 	int num_transferred = 0;
@@ -1192,16 +1193,12 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
 
 	/* Clear interrupt source for AUX CH access error */
 	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-	if (reg & AUX_ERR) {
+	status_reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
+	if ((reg & AUX_ERR) || (status_reg & AUX_STATUS_MASK)) {
 		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
-		goto aux_error;
-	}
 
-	/* Check AUX CH error access status */
-	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
-	if ((reg & AUX_STATUS_MASK)) {
-		dev_err(dp->dev, "AUX CH error happened: %d\n\n",
-			reg & AUX_STATUS_MASK);
+		dev_warn(dp->dev, "AUX CH error happened: %#x (%d)\n",
+			 status_reg & AUX_STATUS_MASK, !!(reg & AUX_ERR));
 		goto aux_error;
 	}
 
-- 
2.12.0.246.ga2ecc84866-goog

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[PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

[Sean Paul]

From: Douglas Anderson <dianders@chromium.org>

The comments in analogix_dp_init_aux() claim that we're disabling aux
channel retries, but then right below it for Rockchip it sets them to
3.  If we actually need 3 retries for Rockchip then we could adjust
the comment, but it seems more likely that we want the same retry
behavior across all platforms.

Cc: Stéphane Marchesin <marcheu@chromium.org>
Cc: 征增 王 <wzz@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 29d130222636..57dd1991d7de 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -480,15 +480,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 
 	analogix_dp_reset_aux(dp);
 
-	/* Disable AUX transaction H/W retry */
+	/* AUX_BIT_PERIOD_EXPECTED_DELAY doesn't apply to Rockchip IP */
 	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
-		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
-		      AUX_HW_RETRY_COUNT_SEL(3) |
-		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+		reg = 0;
 	else
-		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
-		      AUX_HW_RETRY_COUNT_SEL(0) |
-		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3);
+
+	/* Disable AUX transaction H/W retry */
+	reg |= AUX_HW_RETRY_COUNT_SEL(0) |
+	       AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+
 	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
 
 	/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
-- 
2.12.0.246.ga2ecc84866-goog


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Re: [PATCH 34/41] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind

[Tomasz Figa]

Hi Sean,

On Fri, Mar 10, 2017 at 1:32 PM, Sean Paul <seanpaul@chromium.org> wrote:
>
> From: Tomasz Figa <tfiga@chromium.org>
>
> Since we take the ownership of drvdata, the master driver does not have
> any means of accessing its own data from unbind callback and all it can
> do is calling the analogix unbind callback. However it might be
> necessary to do some clean up in the master driver before we really
> unbind the analogix part (such as PSR unregister in Rockchip case), so
> this patch provides a plat_data->cleanup() callback which is called at
> the beginning of analogix_dp_unbind().
>
> Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> Cc: Brian Norris <briannorris@chromium.org>
> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +++
>  include/drm/bridge/analogix_dp.h                   | 1 +
>  2 files changed, 4 insertions(+)

FYI, we ended up reverting this and subsequent patches from this
series up to 37, as we found a simpler and cleaner solution. Please
see following 2 CLs for reference:
https://chromium-review.googlesource.com/442390
https://chromium-review.googlesource.com/442392
https://chromium-review.googlesource.com/442391

Anyway, thanks for sending the patches upstream, it's really helpful
given my time constraints.

Best regards,
Tomasz
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Re: [PATCH 34/41] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind

[Sean Paul]

On Fri, Mar 10, 2017 at 04:09:57PM +0900, Tomasz Figa wrote:
> Hi Sean,
> 
> On Fri, Mar 10, 2017 at 1:32 PM, Sean Paul <seanpaul@chromium.org> wrote:
> >
> > From: Tomasz Figa <tfiga@chromium.org>
> >
> > Since we take the ownership of drvdata, the master driver does not have
> > any means of accessing its own data from unbind callback and all it can
> > do is calling the analogix unbind callback. However it might be
> > necessary to do some clean up in the master driver before we really
> > unbind the analogix part (such as PSR unregister in Rockchip case), so
> > this patch provides a plat_data->cleanup() callback which is called at
> > the beginning of analogix_dp_unbind().
> >
> > Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> > Cc: Brian Norris <briannorris@chromium.org>
> > Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> > Signed-off-by: Sean Paul <seanpaul@chromium.org>
> > ---
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +++
> >  include/drm/bridge/analogix_dp.h                   | 1 +
> >  2 files changed, 4 insertions(+)
> 
> FYI, we ended up reverting this and subsequent patches from this
> series up to 37, as we found a simpler and cleaner solution. Please
> see following 2 CLs for reference:

Thanks, Tomasz. I'll drop these from the series. 

> https://chromium-review.googlesource.com/442390
> https://chromium-review.googlesource.com/442392
> https://chromium-review.googlesource.com/442391
> 

Looks like these haven't landed yet, and that's why I missed them. I'll pick
them up in a subsequent set.

Sean

> Anyway, thanks for sending the patches upstream, it's really helpful
> given my time constraints.
> 
> Best regards,
> Tomasz
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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Re: [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches

[Sean Paul]

On Thu, Mar 09, 2017 at 11:32:15PM -0500, Sean Paul wrote:
> Despite our best intentions (and we did a decent job this time around) of submitting
> upstream first for the Chromebook Plus, we had a number of patches slip through the
> cracks. This series includes all but one of those patches. The outlier breaks my
> veyron board, so I dropped it.
> 
> The patches have been tested on the Chromebook Plus in our downstream kernel, and
> my veyron-jaq board with an upstream kernel. They have also been compile tested
> using the drm-misc configs.
> 
> Sean
> 
> 
> Douglas Anderson (4):
>   drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner
>   drm/bridge: analogix_dp: Split the platform-specific poweron in two
>     parts
>   drm/bridge: analogix_dp: Properly log AUX CH errors
>   drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip
> 
> Haixia Shi (1):
>   drm/rockchip: support prime import sg table
> 
> Lin Huang (6):
>   drm/bridge: analogix_dp: Move enable video into config_video()
>   drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer
>   drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the
>     panel
>   drm/bridge: analogix_dp: Extend hpd check time to 100ms
>   drm/bridge: analogix_dp: Check dpcd write/read status
>   drm/bridge: analogix_dp: Reset aux channel if an error occurred
> 
> Mark Yao (1):
>   drm/rockchip: pre dither down when output bpc is 8bit
> 
> Sean Paul (3):
>   drm/panel: simple: Change mode for Sharp lq123p1jx31
>   drm/rockchip: Don't use atomic constructs for psr
>   drm/rockchip: Remove analogix psr worker

Hi Mark,
Hopefully you've seen this series by now. I would really like to get your review
on my 2 patches above so I can get these into drm-misc.

If you have some time, I would really appreciate it.

Sean

> 
> Tomasz Figa (6):
>   drm/rockchip: Get rid of some unnecessary code
>   drm/rockchip: Flush PSR before committing modeset disables/enables
>   drm/bridge: analogix_dp: Allow master driver to cleanup in unbind
>   drm/rockchip: analogix_dp: Fix invalid implementation of unbind
>   drm/bridge: analogix_dp: Add analogix_dp_shutdown
>   drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR
> 
> Yakir Yang (1):
>   drm/bridge: analogix_dp: detect Sink PSR state after configuring the
>     PSR
> 
> zain wang (18):
>   drm/bridge: analogix_dp: set psr activate/deactivate when
>     enable/disable bridge
>   drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind
>   drm/bridge: analogix_dp: Don't change psr while bridge is disabled
>   drm/rockchip: add mutex vop lock
>   drm/bridge: analogix_dp: add fast link train for eDP
>   drm/rockchip: Only wait for panel ACK on PSR entry
>   drm/bridge: analogix_dp: Don't use fast link training when panel just
>     powered up
>   drm/bridge: analogix_dp: Retry bridge enable when it failed
>   drm/bridge: analogix_dp: Wait for HPD signal before configuring link
>   drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy
>   drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode
>   drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip
>   drm/rockchip: Restore psr->state when enable/disable psr failed
>   drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll
>   drm/bridge: analogix_dp: Fix timeout of video streamclk config
>   drm/bridge: analogix_dp: Fix incorrect operations with register
>     ANALOGIX_DP_FUNC_EN_1
>   drm/bridge: analogix_dp: Move fast link training detect to set_bridge
>   drm/rockchip: Disable VOP windows when PSR is active
> 
> Ørjan Eide (1):
>   drm/rockchip: Respect page offset for PRIME mmap calls
> 
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 471 +++++++++++++++------
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  14 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 273 +++++++-----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   7 +
>  drivers/gpu/drm/exynos/exynos_dp.c                 |   2 +-
>  drivers/gpu/drm/panel/panel-simple.c               |   7 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 129 +++---
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   3 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_fb.c         |  13 +
>  drivers/gpu/drm/rockchip/rockchip_drm_gem.c        | 125 +++++-
>  drivers/gpu/drm/rockchip/rockchip_drm_gem.h        |   5 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 112 ++---
>  drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |   6 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c        |  81 +++-
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h        |   1 +
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c        |   6 +-
>  include/drm/bridge/analogix_dp.h                   |   7 +-
>  18 files changed, 882 insertions(+), 384 deletions(-)
> 
> -- 
> 2.12.0.246.ga2ecc84866-goog
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Re: [PATCH 06/41] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> The bridge does not need to be powered in analogix_dp_bind(), so
> remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
> as well as their power-off counterparts.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> [the patch originally just removed the power_on portion, seanpaul removed
> the power off code as well as improved the commit message]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej
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Re: [PATCH 08/41] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Yakir Yang <ykk@rock-chips.com>
>
> Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
> function, or print the sink PSR error state if we failed to apply the
> requested PSR setting.
>
> Cc: 征增 王 <wzz@rock-chips.com>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> [seanpaul changed timeout loop to a readx poll]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  6 ++--
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  6 ++--
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 35 +++++++++++++++++++---
>  3 files changed, 37 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index f64592f52262..8a8f05fe9da3 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -124,8 +124,7 @@ int analogix_dp_enable_psr(struct device *dev)
>  	psr_vsc.DB0 = 0;
>  	psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
>  
> -	analogix_dp_send_psr_spd(dp, &psr_vsc);
> -	return 0;
> +	return analogix_dp_send_psr_spd(dp, &psr_vsc);
>  }
>  EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
>  
> @@ -152,8 +151,7 @@ int analogix_dp_disable_psr(struct device *dev)
>  	if (ret != 1)
>  		dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
>  
> -	analogix_dp_send_psr_spd(dp, &psr_vsc);
> -	return 0;
> +	return analogix_dp_send_psr_spd(dp, &psr_vsc);
>  }
>  EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index 5c6a28806129..b039b28d8fcc 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -20,6 +20,8 @@
>  #define MAX_CR_LOOP 5
>  #define MAX_EQ_LOOP 5
>  
> +#define DP_TIMEOUT_PSR_LOOP_MS			300
> +
>  /* DP_MAX_LANE_COUNT */
>  #define DPCD_ENHANCED_FRAME_CAP(x)		(((x) >> 7) & 0x1)
>  #define DPCD_MAX_LANE_COUNT(x)			((x) & 0x1f)
> @@ -247,8 +249,8 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
>  void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
>  void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
>  void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
> -void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
> -			      struct edp_vsc_psr *vsc);
> +int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
> +			     struct edp_vsc_psr *vsc);
>  ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  			     struct drm_dp_aux_msg *msg);
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 303083ad28e3..005a3f7005d2 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -10,10 +10,11 @@
>   * option) any later version.
>   */
>  
> -#include <linux/device.h>
> -#include <linux/io.h>
>  #include <linux/delay.h>
> +#include <linux/device.h>
>  #include <linux/gpio.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
>  
>  #include <drm/bridge/analogix_dp.h>
>  
> @@ -992,10 +993,25 @@ void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp)
>  	writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON);
>  }
>  
> -void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
> -			      struct edp_vsc_psr *vsc)
> +static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp)
> +{
> +	ssize_t val;
> +	u8 status;
> +
> +	val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, &status);
> +	if (val < 0) {
> +		dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val);

missing "\n"

> +		return val;
> +	}
> +	return status;
> +}
> +
> +int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
> +			     struct edp_vsc_psr *vsc)
>  {
>  	unsigned int val;
> +	int ret;
> +	ssize_t psr_status;
>  
>  	/* don't send info frame */
>  	val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
> @@ -1036,6 +1052,17 @@ void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
>  	val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
>  	val |= IF_EN;
>  	writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
> +
> +	ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
> +		psr_status >= 0 &&
> +		((vsc->DB1 && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
> +		(!vsc->DB1 && psr_status == DP_PSR_SINK_INACTIVE)), 1500,
> +		DP_TIMEOUT_PSR_LOOP_MS * 1000);

As I understand you want to repeat read even in case
analogix_dp_get_psr_status fails?

I guess vsc->DB1 is constant, in such case you can shorten this complex
condition, by evaluating expected value before:
    val = vsc->DB1 ? DP_PSR_SINK_ACTIVE_RFB : DP_PSR_SINK_INACTIVE;
    ret = readx_poll_timeout(..., psr_status == val, ...

> +	if (ret) {
> +		dev_warn(dp->dev, "Failed to apply PSR %d\n", ret);

Maybe comma after PSR.

Regards
Andrzej


> +		return ret;
> +	}
> +	return 0;
>  }
>  
>  ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,


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Re: [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> There is a race between AUX CH bring-up and enabling bridge which will
> cause link training to fail. To avoid hitting it, don't change psr state
> while enabling the bridge.
>
> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Cc: Sean Paul <seanpaul@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
see functional change, or am I blind?

Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>  include/drm/bridge/analogix_dp.h                   |  2 +-
>  4 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 8a8f05fe9da3..64d94a34874d 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>  	return 0;
>  }
>  
> -int analogix_dp_psr_supported(struct device *dev)
> +int analogix_dp_psr_enabled(struct device *dev)
>  {
>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>  
> -	return dp->psr_support;
> +	return dp->psr_enable;
>  }
> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>  
>  int analogix_dp_enable_psr(struct device *dev)
>  {
>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>  	struct edp_vsc_psr psr_vsc;
>  
> -	if (!dp->psr_support)
> +	if (!dp->psr_enable)
>  		return 0;
>  
>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>  	struct edp_vsc_psr psr_vsc;
>  	int ret;
>  
> -	if (!dp->psr_support)
> +	if (!dp->psr_enable)
>  		return 0;
>  
>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  	/* Enable video */
>  	analogix_dp_start_video(dp);
>  
> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> -	if (dp->psr_support)
> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> +	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);
>  }
>  
> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>  	if (ret)
>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>  
> +	dp->psr_enable = false;
>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>  }
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index b039b28d8fcc..e135a42cb19e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>  	int			dpms_mode;
>  	int			hpd_gpio;
>  	bool                    force_hpd;
> -	bool			psr_support;
> +	bool			psr_enable;
>  
>  	struct mutex		panel_lock;
>  	bool			panel_is_modeset;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 64e7e2c0bc58..f44756029478 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>  	int vact_end;
>  	int ret;
>  
> -	if (!analogix_dp_psr_supported(dp->dev))
> +	if (!analogix_dp_psr_enabled(dp->dev))
>  		return;
>  
>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index c99d6eaef1ac..4fc0165ed3f5 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>  			 struct drm_connector *);
>  };
>  
> -int analogix_dp_psr_supported(struct device *dev);
> +int analogix_dp_psr_enabled(struct device *dev);
>  int analogix_dp_enable_psr(struct device *dev);
>  int analogix_dp_disable_psr(struct device *dev);
>  


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[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> There is a race between AUX CH bring-up and enabling bridge which will
> cause link training to fail. To avoid hitting it, don't change psr state
> while enabling the bridge.
>
> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Cc: Sean Paul <seanpaul@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
see functional change, or am I blind?

Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>  include/drm/bridge/analogix_dp.h                   |  2 +-
>  4 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 8a8f05fe9da3..64d94a34874d 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>  	return 0;
>  }
>  
> -int analogix_dp_psr_supported(struct device *dev)
> +int analogix_dp_psr_enabled(struct device *dev)
>  {
>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>  
> -	return dp->psr_support;
> +	return dp->psr_enable;
>  }
> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>  
>  int analogix_dp_enable_psr(struct device *dev)
>  {
>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>  	struct edp_vsc_psr psr_vsc;
>  
> -	if (!dp->psr_support)
> +	if (!dp->psr_enable)
>  		return 0;
>  
>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>  	struct edp_vsc_psr psr_vsc;
>  	int ret;
>  
> -	if (!dp->psr_support)
> +	if (!dp->psr_enable)
>  		return 0;
>  
>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  	/* Enable video */
>  	analogix_dp_start_video(dp);
>  
> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> -	if (dp->psr_support)
> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> +	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);
>  }
>  
> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>  	if (ret)
>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>  
> +	dp->psr_enable = false;
>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>  }
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index b039b28d8fcc..e135a42cb19e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>  	int			dpms_mode;
>  	int			hpd_gpio;
>  	bool                    force_hpd;
> -	bool			psr_support;
> +	bool			psr_enable;
>  
>  	struct mutex		panel_lock;
>  	bool			panel_is_modeset;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 64e7e2c0bc58..f44756029478 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>  	int vact_end;
>  	int ret;
>  
> -	if (!analogix_dp_psr_supported(dp->dev))
> +	if (!analogix_dp_psr_enabled(dp->dev))
>  		return;
>  
>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index c99d6eaef1ac..4fc0165ed3f5 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>  			 struct drm_connector *);
>  };
>  
> -int analogix_dp_psr_supported(struct device *dev);
> +int analogix_dp_psr_enabled(struct device *dev);
>  int analogix_dp_enable_psr(struct device *dev);
>  int analogix_dp_disable_psr(struct device *dev);
>  

Re: [PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> We would meet a short black screen when exit PSR with the full link
> training, In this case, we should use fast link train instead of full
> link training.
>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 142 ++++++++++++++++-----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   3 +
>  2 files changed, 114 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 64d94a34874d..5bc151b0995b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -10,17 +10,18 @@
>  * option) any later version.
>  */
>  
> -#include <linux/module.h>
> -#include <linux/platform_device.h>
> -#include <linux/err.h>
>  #include <linux/clk.h>
> -#include <linux/io.h>
> +#include <linux/component.h>
> +#include <linux/err.h>
> +#include <linux/gpio.h>
>  #include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/of_gpio.h>
> -#include <linux/gpio.h>
> -#include <linux/component.h>
>  #include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
>  
>  #include <drm/drmP.h>
>  #include <drm/drm_atomic_helper.h>
> @@ -35,6 +36,8 @@
>  
>  #define to_dp(nm)	container_of(nm, struct analogix_dp_device, nm)
>  
> +static const bool verify_fast_training;
> +

Quite odd debug sentinel, I am not sure if it is good practice to use
such construct.

>  struct bridge_init {
>  	struct i2c_client *client;
>  	struct device_node *node;
> @@ -531,7 +534,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>  {
>  	int lane, lane_count, retval;
>  	u32 reg;
> -	u8 link_align, link_status[2], adjust_request[2];
> +	u8 link_align, link_status[2], adjust_request[2], spread;
>  
>  	usleep_range(400, 401);
>  
> @@ -574,6 +577,20 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>  		dev_dbg(dp->dev, "final lane count = %.2x\n",
>  			dp->link_train.lane_count);
>  
> +		retval = drm_dp_dpcd_readb(&dp->aux, DP_MAX_DOWNSPREAD,
> +					   &spread);
> +		if (retval != 1) {
> +			dev_err(dp->dev, "failed to read downspread %d\n",

comma before %d ?

> +				retval);
> +			dp->fast_train_support = false;
> +		} else {
> +			dp->fast_train_support =
> +				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
> +					true : false;

dp->fast_train_support = !!(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
or even
dp->fast_train_support = spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING;
if dp->fast_train_support is bool

> +		}
> +		dev_dbg(dp->dev, "fast link training %s\n",
> +			dp->fast_train_support ? "supported" : "unsupported");
> +
>  		/* set enhanced mode if available */
>  		analogix_dp_set_enhanced_mode(dp);
>  		dp->link_train.lt_state = FINISHED;
> @@ -630,10 +647,12 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
>  	*lane_count = DPCD_MAX_LANE_COUNT(data);
>  }
>  
> -static void analogix_dp_init_training(struct analogix_dp_device *dp,
> -				      enum link_lane_count_type max_lane,
> -				      int max_rate)
> +static int analogix_dp_full_link_train(struct analogix_dp_device *dp,
> +				       u32 max_lanes, u32 max_rate)
>  {
> +	int retval = 0;
> +	bool training_finished = false;
> +
>  	/*
>  	 * MACRO_RST must be applied after the PLL_LOCK to avoid
>  	 * the DP inter pair skew issue for at least 10 us
> @@ -659,18 +678,13 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
>  	}
>  
>  	/* Setup TX lane count & rate */
> -	if (dp->link_train.lane_count > max_lane)
> -		dp->link_train.lane_count = max_lane;
> +	if (dp->link_train.lane_count > max_lanes)
> +		dp->link_train.lane_count = max_lanes;
>  	if (dp->link_train.link_rate > max_rate)
>  		dp->link_train.link_rate = max_rate;
>  
>  	/* All DP analog module power up */
>  	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
> -}
> -
> -static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
> -{
> -	int retval = 0, training_finished = 0;
>  
>  	dp->link_train.lt_state = START;
>  
> @@ -705,22 +719,88 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
>  	return retval;
>  }
>  
> -static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
> -				      u32 count, u32 bwtype)
> +static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
>  {
> -	int i;
> -	int retval;
> +	int i, ret;
> +	u8 link_align, link_status[2];
> +	enum pll_status status;
>  
> -	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
> -		analogix_dp_init_training(dp, count, bwtype);
> -		retval = analogix_dp_sw_link_training(dp);
> -		if (retval == 0)
> -			break;
> +	analogix_dp_reset_macro(dp);
>  
> -		usleep_range(100, 110);
> +	analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
> +	analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
> +
> +	for (i = 0; i < dp->link_train.lane_count; i++) {
> +		analogix_dp_set_lane_link_training(dp,
> +			dp->link_train.training_lane[i], i);
>  	}
>  
> -	return retval;
> +	ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status,
> +				 status != PLL_UNLOCKED, 120,
> +				 120 * DP_TIMEOUT_LOOP_COUNT);
> +	if (ret) {
> +		DRM_DEV_ERROR(dp->dev, "Wait for pll lock failed %d\n", ret);
> +		return ret;
> +	}
> +
> +	/* source Set training pattern 1 */
> +	analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
> +	/* From DP spec, pattern must be on-screen for a minimum 500us */
> +	usleep_range(500, 600);
> +
> +	analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
> +	/* From DP spec, pattern must be on-screen for a minimum 500us */
> +	usleep_range(500, 600);
> +
> +	/* TODO: enhanced_mode?*/
> +	analogix_dp_set_training_pattern(dp, DP_NONE);
> +
> +	/*
> +	 * Useful for debugging issues with fast link training, disable for more
> +	 * speed
> +	 */
> +	if (verify_fast_training) {
 You can move definitions of link_status and other local variables here.
> +		ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED,
> +					&link_align);
> +		if (ret < 0) {
> +			DRM_DEV_ERROR(dp->dev, "Read align status failed %d\n",
> +				      ret);
> +			return ret;
> +		}
> +
> +		ret = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status,
> +				       2);
> +		if (ret < 0) {
> +			DRM_DEV_ERROR(dp->dev, "Read link status failed %d\n",
> +				      ret);
> +			return ret;
> +		}
> +
> +		if (analogix_dp_clock_recovery_ok(link_status,
> +						  dp->link_train.lane_count)) {
> +			DRM_DEV_ERROR(dp->dev, "Clock recovery failed\n");
> +			analogix_dp_reduce_link_rate(dp);
> +			return -EIO;
> +		}
> +
> +		if (analogix_dp_channel_eq_ok(link_status, link_align,
> +					      dp->link_train.lane_count)) {
> +			DRM_DEV_ERROR(dp->dev, "Channel EQ failed\n");
> +			analogix_dp_reduce_link_rate(dp);
> +			return -EIO;
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +static int analogix_dp_train_link(struct analogix_dp_device *dp)
> +{
> +	if (dp->fast_train_support)
> +		return analogix_dp_fast_link_train(dp);
> +
> +	return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
> +					   dp->video_info.max_link_rate);
>  }
>  
>  static int analogix_dp_config_video(struct analogix_dp_device *dp)
> @@ -853,10 +933,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  			DRM_ERROR("failed to disable the panel\n");
>  	}
>  
> -	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
> -					 dp->video_info.max_link_rate);
> +	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
> +				 DP_TIMEOUT_TRAINING_US * 5);
>  	if (ret) {
> -		dev_err(dp->dev, "unable to do link train\n");
> +		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);

And here we have ", ret=%d\n". Maybe it would be good to make it
consistent across whole driver.
Another issue with consistency in DRM_DEV_ERROR vs dev_err.

Regards
Andrzej

>  		return;
>  	}
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index e135a42cb19e..920607d7eb3e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -20,6 +20,8 @@
>  #define MAX_CR_LOOP 5
>  #define MAX_EQ_LOOP 5
>  
> +/* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
> +#define DP_TIMEOUT_TRAINING_US			22000
>  #define DP_TIMEOUT_PSR_LOOP_MS			300
>  
>  /* DP_MAX_LANE_COUNT */
> @@ -171,6 +173,7 @@ struct analogix_dp_device {
>  	int			hpd_gpio;
>  	bool                    force_hpd;
>  	bool			psr_enable;
> +	bool			fast_train_support;
>  
>  	struct mutex		panel_lock;
>  	bool			panel_is_modeset;


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Re: [PATCH 15/41] drm/bridge: analogix_dp: Move enable video into config_video()

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> We need to enable video before analogix_dp_is_video_stream_on(), so
> we can get the right video stream status.
>
> Cc: 征增 王 <wzz@rock-chips.com>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

Patch contains also changes not connected with subject, maybe in next
spin it would be good to comment it in description.
--
Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 9dfa1b507389..52218d743059 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -823,11 +823,10 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
>  			break;
>  		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
> -			dev_err(dp->dev, "Timeout of video streamclk ok\n");
> +			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
>  			return -ETIMEDOUT;
>  		}
> -
> -		usleep_range(1, 2);
> +		usleep_range(1000, 1001);
>  	}
>  
>  	/* Set to use the register calculated M/N video */
> @@ -842,6 +841,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  	/* Configure video slave mode */
>  	analogix_dp_enable_video_master(dp, 0);
>  
> +	/* Enable video */
> +	analogix_dp_start_video(dp);
> +
>  	timeout_loop = 0;
>  
>  	for (;;) {
> @@ -955,9 +957,6 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  			DRM_ERROR("failed to enable the panel\n");
>  	}
>  
> -	/* Enable video */
> -	analogix_dp_start_video(dp);
> -
>  	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>  	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);


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Re: [PATCH 16/41] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> We should check AUX_EN bit to confirm the AUX CH operation is completed.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 25 +++++++++++++----------
>  1 file changed, 14 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 9df2f3ef000c..e78c861b9e06 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -1073,9 +1073,9 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  {
>  	u32 reg;
>  	u8 *buffer = msg->buffer;
> -	int timeout_loop = 0;
>  	unsigned int i;
>  	int num_transferred = 0;
> +	int ret;
>  
>  	/* Buffer size of AUX CH is 16 bytes */
>  	if (WARN_ON(msg->size > 16))
> @@ -1139,17 +1139,20 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  
>  	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
>  
> -	/* Is AUX CH command reply received? */
> +	ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2,
> +				 reg, !(reg & AUX_EN), 25, 500 * 1000);

readl_poll_timeout ?

> +	if (ret) {
> +		dev_err(dp->dev, "AUX CH enable timeout!\n");
> +		return -ETIMEDOUT;
> +	}
> +
>  	/* TODO: Wait for an interrupt instead of looping? */
> -	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
> -	while (!(reg & RPLY_RECEIV)) {
> -		timeout_loop++;
> -		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
> -			dev_err(dp->dev, "AUX CH command reply failed!\n");
> -			return -ETIMEDOUT;
> -		}
> -		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
> -		usleep_range(10, 11);
> +	/* Is AUX CH command reply received? */
> +	ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA,
> +				 reg, reg & RPLY_RECEIV, 10, 20 * 1000);

ditto

--
Regards
Andrzej
> +	if (ret) {
> +		dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
> +		return -ETIMEDOUT;
>  	}
>  
>  	/* Clear interrupt source for AUX CH command reply */


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Re: [PATCH 17/41] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> Panel would reset it's setting when it power down. It would forget the last
> successed link training setting. So we can't use the last successful link
> training setting to do fast link training. Let's reset fast_train_enable in
> analogix_dp_bridge_disable();

Period at the end. Please add info about renaming. Now I understand
similar patch about psr_enable, it confused me due to wrong description.

Regards
Andrzej

>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +++++----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +-
>  2 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 52218d743059..919ae68e7670 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -582,14 +582,14 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>  		if (retval != 1) {
>  			dev_err(dp->dev, "failed to read downspread %d\n",
>  				retval);
> -			dp->fast_train_support = false;
> +			dp->fast_train_enable = false;
>  		} else {
> -			dp->fast_train_support =
> +			dp->fast_train_enable =
>  				(spread & DP_NO_AUX_HANDSHAKE_LINK_TRAINING) ?
>  					true : false;
>  		}
>  		dev_dbg(dp->dev, "fast link training %s\n",
> -			dp->fast_train_support ? "supported" : "unsupported");
> +			dp->fast_train_enable ? "supported" : "unsupported");
>  
>  		/* set enhanced mode if available */
>  		analogix_dp_set_enhanced_mode(dp);
> @@ -796,7 +796,7 @@ static int analogix_dp_fast_link_train(struct analogix_dp_device *dp)
>  
>  static int analogix_dp_train_link(struct analogix_dp_device *dp)
>  {
> -	if (dp->fast_train_support)
> +	if (dp->fast_train_enable)
>  		return analogix_dp_fast_link_train(dp);
>  
>  	return analogix_dp_full_link_train(dp, dp->video_info.max_lane_count,
> @@ -1200,6 +1200,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>  
>  	dp->psr_enable = false;
> +	dp->fast_train_enable = false;
>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>  }
>  
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index 6a96ef7e6934..403ff853464b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -173,7 +173,7 @@ struct analogix_dp_device {
>  	int			hpd_gpio;
>  	bool                    force_hpd;
>  	bool			psr_enable;
> -	bool			fast_train_support;
> +	bool			fast_train_enable;
>  
>  	struct mutex		panel_lock;
>  	bool			panel_is_modeset;


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Re: [PATCH 18/41] drm/bridge: analogix_dp: Retry bridge enable when it failed

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> When we enable bridge failed, we have to retry it, otherwise we would get
> the abnormal display.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 65 +++++++++++++++++-----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  3 +-
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  5 +-
>  3 files changed, 56 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 919ae68e7670..f3eea7636a2e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -43,8 +43,10 @@ struct bridge_init {
>  	struct device_node *node;
>  };
>  
> -static void analogix_dp_init_dp(struct analogix_dp_device *dp)
> +static int analogix_dp_init_dp(struct analogix_dp_device *dp)
>  {
> +	int ret;
> +
>  	analogix_dp_reset(dp);
>  
>  	analogix_dp_swreset(dp);
> @@ -56,10 +58,13 @@ static void analogix_dp_init_dp(struct analogix_dp_device *dp)
>  	analogix_dp_enable_sw_function(dp);
>  
>  	analogix_dp_config_interrupt(dp);
> -	analogix_dp_init_analog_func(dp);
> +	ret = analogix_dp_init_analog_func(dp);
> +	if (ret)
> +		return ret;
>  
>  	analogix_dp_init_hpd(dp);
>  	analogix_dp_init_aux(dp);
> +	return 0;
>  }
>  
>  static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
> @@ -925,7 +930,7 @@ static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
>  	return IRQ_HANDLED;
>  }
>  
> -static void analogix_dp_commit(struct analogix_dp_device *dp)
> +static int analogix_dp_commit(struct analogix_dp_device *dp)
>  {
>  	int ret;
>  
> @@ -935,11 +940,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  			DRM_ERROR("failed to disable the panel\n");
>  	}
>  
> -	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
> -				 DP_TIMEOUT_TRAINING_US * 5);
> +	ret = analogix_dp_train_link(dp);
>  	if (ret) {
>  		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
> -		return;
> +		return ret;
>  	}
>  
>  	analogix_dp_enable_scramble(dp, 1);
> @@ -960,6 +964,7 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>  	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>  	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);
> +	return 0;
>  }
>  
>  /*
> @@ -1152,12 +1157,9 @@ static void analogix_dp_bridge_pre_enable(struct drm_bridge *bridge)
>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>  }
>  
> -static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
> +static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  {
> -	struct analogix_dp_device *dp = bridge->driver_private;
> -
> -	if (dp->dpms_mode == DRM_MODE_DPMS_ON)
> -		return;
> +	int ret;
>  
>  	pm_runtime_get_sync(dp->dev);
>  
> @@ -1165,11 +1167,46 @@ static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
>  		dp->plat_data->power_on(dp->plat_data);
>  
>  	phy_power_on(dp->phy);
> -	analogix_dp_init_dp(dp);
> +
> +	ret = analogix_dp_init_dp(dp);
> +	if (ret)
> +		goto out_dp_init;
> +
> +	ret = analogix_dp_commit(dp);
> +	if (ret)
> +		goto out_dp_init;
> +
>  	enable_irq(dp->irq);
> -	analogix_dp_commit(dp);
> +	return 0;
>  
> -	dp->dpms_mode = DRM_MODE_DPMS_ON;
> +out_dp_init:
> +	phy_power_off(dp->phy);
> +	if (dp->plat_data->power_off)
> +		dp->plat_data->power_off(dp->plat_data);
> +	pm_runtime_put_sync(dp->dev);
> +
> +	return ret;
> +}
> +
> +static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
> +{
> +	struct analogix_dp_device *dp = bridge->driver_private;
> +	int timeout_loop = 0;
> +
> +	if (dp->dpms_mode == DRM_MODE_DPMS_ON)
> +		return;
> +
> +	while (timeout_loop < MAX_PLL_LOCK_LOOP) {

Strange name for max set bridge attempts.

Beside it:
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

> +		if (analogix_dp_set_bridge(dp) == 0) {
> +			dp->dpms_mode = DRM_MODE_DPMS_ON;
> +			return;
> +		}
> +		dev_err(dp->dev, "failed to set bridge, retry: %d\n",
> +			timeout_loop);
> +		timeout_loop++;
> +		usleep_range(10, 11);
> +	}
> +	dev_err(dp->dev, "too many times retry set bridge, give it up\n");
>  }
>  
>  static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index 403ff853464b..769255dc6e99 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -19,6 +19,7 @@
>  #define DP_TIMEOUT_LOOP_COUNT 100
>  #define MAX_CR_LOOP 5
>  #define MAX_EQ_LOOP 5
> +#define MAX_PLL_LOCK_LOOP 5
>  
>  /* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
>  #define DP_TIMEOUT_TRAINING_US			22000
> @@ -197,7 +198,7 @@ void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
>  void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  				       enum analog_power_block block,
>  				       bool enable);
> -void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
> +int analogix_dp_init_analog_func(struct analogix_dp_device *dp);
>  void analogix_dp_init_hpd(struct analogix_dp_device *dp);
>  void analogix_dp_force_hpd(struct analogix_dp_device *dp);
>  enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index e78c861b9e06..b47c5af43560 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -333,7 +333,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  	}
>  }
>  
> -void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
> +int analogix_dp_init_analog_func(struct analogix_dp_device *dp)
>  {
>  	u32 reg;
>  	int timeout_loop = 0;
> @@ -355,7 +355,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
>  			timeout_loop++;
>  			if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
>  				dev_err(dp->dev, "failed to get pll lock status\n");
> -				return;
> +				return -ETIMEDOUT;
>  			}
>  			usleep_range(10, 20);
>  		}
> @@ -366,6 +366,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
>  	reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
>  		| AUX_FUNC_EN_N);
>  	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
> +	return 0;
>  }
>  
>  void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)


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Re: [PATCH 19/41] drm/bridge: analogix_dp: Wait for HPD signal before configuring link

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
> must first detect that the HPD signal is asserted high by the Downstream
> Device before establishing a link with it.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index f3eea7636a2e..048b6f7c9b6e 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1172,6 +1172,15 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  	if (ret)
>  		goto out_dp_init;
>  
> +	/* According to DP spec v1.3 chap 3.5.1.2 Link Training,
> +	 * We should first make sure the HPD signal is asserted high by device
> +	 * when we want to establish a link with it. */
> +	ret = analogix_dp_detect_hpd(dp);
> +	if (ret) {
> +		DRM_ERROR("failed to get hpd single ret = %d\n", ret);
> +		goto out_dp_init;
> +	}
> +

With previous patch analogix_dp_set_bridge will be repeated even if hpd
is low, is it desired behavior?

Regards
Andrzej


>  	ret = analogix_dp_commit(dp);
>  	if (ret)
>  		goto out_dp_init;


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Re: [PATCH 20/41] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> Following the correct power up sequence:
> dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00

Please fix the message.

>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++++++--
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  3 +++
>  2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index b47c5af43560..bb72f8b0e603 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -321,10 +321,16 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case POWER_ALL:
>  		if (enable) {
> -			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
> -				CH1_PD | CH0_PD;
> +			reg = DP_ALL_PD;
>  			writel(reg, dp->reg_base + phy_pd_addr);
>  		} else {
> +			reg = DP_ALL_PD;
> +			writel(reg, dp->reg_base + phy_pd_addr);
Do we need it? register should be already at proper state, shouldn't be?
> +			usleep_range(10, 15);
> +			reg &= ~DP_INC_BG;
> +			writel(reg, dp->reg_base + phy_pd_addr);
> +			usleep_range(10, 15);
> +
>  			writel(0x00, dp->reg_base + phy_pd_addr);
>  		}
>  		break;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 40200c652533..9602668669f4 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -342,12 +342,15 @@
>  #define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
>  
>  /* ANALOGIX_DP_PHY_PD */
> +#define DP_INC_BG				(0x1 << 7)
> +#define DP_EXP_BG				(0x1 << 6)
>  #define DP_PHY_PD				(0x1 << 5)
>  #define AUX_PD					(0x1 << 4)
>  #define CH3_PD					(0x1 << 3)
>  #define CH2_PD					(0x1 << 2)
>  #define CH1_PD					(0x1 << 1)
>  #define CH0_PD					(0x1 << 0)
> +#define DP_ALL_PD				(0xff)
>  
>  /* ANALOGIX_DP_PHY_TEST */
>  #define MACRO_RST				(0x1 << 5)

Re: [PATCH 20/41] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> Following the correct power up sequence:
> dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00

Please fix the message.

>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++++++--
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  3 +++
>  2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index b47c5af43560..bb72f8b0e603 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -321,10 +321,16 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  		break;
>  	case POWER_ALL:
>  		if (enable) {
> -			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
> -				CH1_PD | CH0_PD;
> +			reg = DP_ALL_PD;
>  			writel(reg, dp->reg_base + phy_pd_addr);
>  		} else {
> +			reg = DP_ALL_PD;
> +			writel(reg, dp->reg_base + phy_pd_addr);
Do we need it? register should be already at proper state, shouldn't be?
> +			usleep_range(10, 15);
> +			reg &= ~DP_INC_BG;
> +			writel(reg, dp->reg_base + phy_pd_addr);
> +			usleep_range(10, 15);
> +
>  			writel(0x00, dp->reg_base + phy_pd_addr);
>  		}
>  		break;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 40200c652533..9602668669f4 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -342,12 +342,15 @@
>  #define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
>  
>  /* ANALOGIX_DP_PHY_PD */
> +#define DP_INC_BG				(0x1 << 7)
> +#define DP_EXP_BG				(0x1 << 6)
>  #define DP_PHY_PD				(0x1 << 5)
>  #define AUX_PD					(0x1 << 4)
>  #define CH3_PD					(0x1 << 3)
>  #define CH2_PD					(0x1 << 2)
>  #define CH1_PD					(0x1 << 1)
>  #define CH0_PD					(0x1 << 0)
> +#define DP_ALL_PD				(0xff)
>  
>  /* ANALOGIX_DP_PHY_TEST */
>  #define MACRO_RST				(0x1 << 5)


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Re: [PATCH 00/41] Chromebook Plus (aka kevin) kernel patches

[Enric Balletbo Serra]

2017-03-14 21:43 GMT+01:00 Sean Paul <seanpaul@chromium.org>:
> On Thu, Mar 09, 2017 at 11:32:15PM -0500, Sean Paul wrote:
>> Despite our best intentions (and we did a decent job this time around) of submitting
>> upstream first for the Chromebook Plus, we had a number of patches slip through the
>> cracks. This series includes all but one of those patches. The outlier breaks my
>> veyron board, so I dropped it.
>>
>> The patches have been tested on the Chromebook Plus in our downstream kernel, and
>> my veyron-jaq board with an upstream kernel. They have also been compile tested
>> using the drm-misc configs.
>>

Just to add more information. I did some quick tests, I successfully
picked the full series on top of linux-next, build and test on veyron
minnie device and gru device. For the gru device (which needs some
other from list patches to make it wok) there are issues but nothing
related to these patches as it fails whenever the patches are applied
or not. The issue I'm facing is LCD flickering but I repeat this is
NOT related to these patches so I think will be helpful have these
patches upstream to have better support for kevin and any other
gru-based device, so:

Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

Sean, if you plan send a second version with the comments received can
you also cc me?

Thanks,
  Enric

>> Sean
>>
>>
>> Douglas Anderson (4):
>>   drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner
>>   drm/bridge: analogix_dp: Split the platform-specific poweron in two
>>     parts
>>   drm/bridge: analogix_dp: Properly log AUX CH errors
>>   drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip
>>
>> Haixia Shi (1):
>>   drm/rockchip: support prime import sg table
>>
>> Lin Huang (6):
>>   drm/bridge: analogix_dp: Move enable video into config_video()
>>   drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer
>>   drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the
>>     panel
>>   drm/bridge: analogix_dp: Extend hpd check time to 100ms
>>   drm/bridge: analogix_dp: Check dpcd write/read status
>>   drm/bridge: analogix_dp: Reset aux channel if an error occurred
>>
>> Mark Yao (1):
>>   drm/rockchip: pre dither down when output bpc is 8bit
>>
>> Sean Paul (3):
>>   drm/panel: simple: Change mode for Sharp lq123p1jx31
>>   drm/rockchip: Don't use atomic constructs for psr
>>   drm/rockchip: Remove analogix psr worker
>
> Hi Mark,
> Hopefully you've seen this series by now. I would really like to get your review
> on my 2 patches above so I can get these into drm-misc.
>
> If you have some time, I would really appreciate it.
>
> Sean
>
>>
>> Tomasz Figa (6):
>>   drm/rockchip: Get rid of some unnecessary code
>>   drm/rockchip: Flush PSR before committing modeset disables/enables
>>   drm/bridge: analogix_dp: Allow master driver to cleanup in unbind
>>   drm/rockchip: analogix_dp: Fix invalid implementation of unbind
>>   drm/bridge: analogix_dp: Add analogix_dp_shutdown
>>   drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR
>>
>> Yakir Yang (1):
>>   drm/bridge: analogix_dp: detect Sink PSR state after configuring the
>>     PSR
>>
>> zain wang (18):
>>   drm/bridge: analogix_dp: set psr activate/deactivate when
>>     enable/disable bridge
>>   drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind
>>   drm/bridge: analogix_dp: Don't change psr while bridge is disabled
>>   drm/rockchip: add mutex vop lock
>>   drm/bridge: analogix_dp: add fast link train for eDP
>>   drm/rockchip: Only wait for panel ACK on PSR entry
>>   drm/bridge: analogix_dp: Don't use fast link training when panel just
>>     powered up
>>   drm/bridge: analogix_dp: Retry bridge enable when it failed
>>   drm/bridge: analogix_dp: Wait for HPD signal before configuring link
>>   drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy
>>   drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode
>>   drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip
>>   drm/rockchip: Restore psr->state when enable/disable psr failed
>>   drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll
>>   drm/bridge: analogix_dp: Fix timeout of video streamclk config
>>   drm/bridge: analogix_dp: Fix incorrect operations with register
>>     ANALOGIX_DP_FUNC_EN_1
>>   drm/bridge: analogix_dp: Move fast link training detect to set_bridge
>>   drm/rockchip: Disable VOP windows when PSR is active
>>
>> Ørjan Eide (1):
>>   drm/rockchip: Respect page offset for PRIME mmap calls
>>
>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 471 +++++++++++++++------
>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  14 +-
>>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 273 +++++++-----
>>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   7 +
>>  drivers/gpu/drm/exynos/exynos_dp.c                 |   2 +-
>>  drivers/gpu/drm/panel/panel-simple.c               |   7 +-
>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 129 +++---
>>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   3 +-
>>  drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   4 +-
>>  drivers/gpu/drm/rockchip/rockchip_drm_fb.c         |  13 +
>>  drivers/gpu/drm/rockchip/rockchip_drm_gem.c        | 125 +++++-
>>  drivers/gpu/drm/rockchip/rockchip_drm_gem.h        |   5 +-
>>  drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 112 ++---
>>  drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |   6 +-
>>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c        |  81 +++-
>>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h        |   1 +
>>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c        |   6 +-
>>  include/drm/bridge/analogix_dp.h                   |   7 +-
>>  18 files changed, 882 insertions(+), 384 deletions(-)
>>
>> --
>> 2.12.0.246.ga2ecc84866-goog
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Re: [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31

[Thierry Reding]

[-- Attachment #1.1: Type: text/plain, Size: 2045 bytes --]

On Thu, Mar 09, 2017 at 11:32:16PM -0500, Sean Paul wrote:
> Change the mode for Sharp lq123p1jx31 panel to something more
> rockchip-friendly such that we can use the fixed PLLs to
> generate the pixel clock
> 
> Cc: Chris Zhong <zyw@rock-chips.com>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

That's really not how you should be doing this. If you want to support
this panel on more than one type of hardware, especially if they have
different restrictions on what clocks and timings they can generate,
the driver should specify the timings using a struct display_timing and
drivers should use that data to generate a mode that matches their
requirements but is still within the valid ranges specified in the .min
and .max values.

That said, in this particular case nobody seems to be using the panel
in the upstream kernel.

One minor nit below...

> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 89eb0422821c..787b4d143220 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1598,17 +1598,18 @@ static const struct panel_desc sharp_lq101k1ly04 = {
>  };
>  
>  static const struct drm_display_mode sharp_lq123p1jx31_mode = {
> -	.clock = 252750,
> +	.clock = 266667,
>  	.hdisplay = 2400,
>  	.hsync_start = 2400 + 48,
>  	.hsync_end = 2400 + 48 + 32,
> -	.htotal = 2400 + 48 + 32 + 80,
> +	.htotal = 2400 + 48 + 32 + 139,
>  	.vdisplay = 1600,
>  	.vsync_start = 1600 + 3,
>  	.vsync_end = 1600 + 3 + 10,
> -	.vtotal = 1600 + 3 + 10 + 33,
> +	.vtotal = 1600 + 3 + 10 + 84,
>  	.vrefresh = 60,
>  	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
> +	.type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER,

The panel-simple driver will set these two flags itself, no need to
explicitly specify them.

Thierry

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Re: [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31

[Doug Anderson]

Hi,

On Mon, Mar 20, 2017 at 6:59 AM, Thierry Reding
<thierry.reding@gmail.com> wrote:
> On Thu, Mar 09, 2017 at 11:32:16PM -0500, Sean Paul wrote:
>> Change the mode for Sharp lq123p1jx31 panel to something more
>> rockchip-friendly such that we can use the fixed PLLs to
>> generate the pixel clock
>>
>> Cc: Chris Zhong <zyw@rock-chips.com>
>> Cc: Stéphane Marchesin <marcheu@chromium.org>
>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>> ---
>>  drivers/gpu/drm/panel/panel-simple.c | 7 ++++---
>>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> That's really not how you should be doing this. If you want to support
> this panel on more than one type of hardware, especially if they have
> different restrictions on what clocks and timings they can generate,
> the driver should specify the timings using a struct display_timing and
> drivers should use that data to generate a mode that matches their
> requirements but is still within the valid ranges specified in the .min
> and .max values.
>
> That said, in this particular case nobody seems to be using the panel
> in the upstream kernel.

Sean and I had a private conversation about this too.  Roughly summarizing:

1. We have validated with the panel manufacturer that 266.667 MHz is
valid and within spec.  The panel's datasheet itself says something
like "if you want to try other values you can, but they might not
work", so technically the only values "known" to work are those that
were in the original patch and the values here in Sean's patch.

2. In the particular case of rk3399-kevin (which uses this panel), we
actually went through several iterations before we found a mode that
not only worked with the limited PLLs but also that didn't generate
excessive noise on the digitizer (used for stylus input).  The
digitizer is (as I understand) a separate component from the panel
itself, so this restriction isn't really one on the panel but is a
reality of how this panel was used in real hardware.  I have no idea
how one expresses this board-centric view of the world.

NOTE: Point #2 actually made me check, and Sean's patch is the wrong
iteration of these changes.  Please see http://crosreview.com/381015

3. In an ideal world, even on rk3399-kevin we'd be able to choose the
252.75 MHz clock if the variable PLL on rk3399 happened to be
available (if there was no external display whose pixel clock needed
the variable PLL).  This would save a bit of power, and I believe the
252.75 MHz also avoids noise on the digitizer.  ...but trying to deal
with all this was very complicated.


That all being said: I'd personally be in favor for something like
Sean's patch to land since, as you said, there are no other current
users of the panel.  It's nice to start with something working and
hopefully we can figure out a more advanced / dynamic system sometime
in the future.


> One minor nit below...
>
>>
>> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
>> index 89eb0422821c..787b4d143220 100644
>> --- a/drivers/gpu/drm/panel/panel-simple.c
>> +++ b/drivers/gpu/drm/panel/panel-simple.c
>> @@ -1598,17 +1598,18 @@ static const struct panel_desc sharp_lq101k1ly04 = {
>>  };
>>
>>  static const struct drm_display_mode sharp_lq123p1jx31_mode = {
>> -     .clock = 252750,
>> +     .clock = 266667,
>>       .hdisplay = 2400,
>>       .hsync_start = 2400 + 48,
>>       .hsync_end = 2400 + 48 + 32,
>> -     .htotal = 2400 + 48 + 32 + 80,
>> +     .htotal = 2400 + 48 + 32 + 139,

Please fold in <https://chromium-review.googlesource.com/381015> to
get noise-free timings.


>>       .vdisplay = 1600,
>>       .vsync_start = 1600 + 3,
>>       .vsync_end = 1600 + 3 + 10,
>> -     .vtotal = 1600 + 3 + 10 + 33,
>> +     .vtotal = 1600 + 3 + 10 + 84,

Here too.

>>       .vrefresh = 60,
>>       .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
>> +     .type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER,

IIRC this was an attempt to deal with the fact that the EDID had a
different mode than we were specifying here, but I could be wrong.



-Doug
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Re: [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31

[Stéphane Marchesin]

[-- Attachment #1.1: Type: text/plain, Size: 4575 bytes --]

On Mon, Mar 20, 2017 at 9:37 AM, Doug Anderson <dianders@chromium.org>
wrote:

> Hi,
>
> On Mon, Mar 20, 2017 at 6:59 AM, Thierry Reding
> <thierry.reding@gmail.com> wrote:
> > On Thu, Mar 09, 2017 at 11:32:16PM -0500, Sean Paul wrote:
> >> Change the mode for Sharp lq123p1jx31 panel to something more
> >> rockchip-friendly such that we can use the fixed PLLs to
> >> generate the pixel clock
> >>
> >> Cc: Chris Zhong <zyw@rock-chips.com>
> >> Cc: Stéphane Marchesin <marcheu@chromium.org>
> >> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> >> ---
> >>  drivers/gpu/drm/panel/panel-simple.c | 7 ++++---
> >>  1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > That's really not how you should be doing this. If you want to support
> > this panel on more than one type of hardware, especially if they have
> > different restrictions on what clocks and timings they can generate,
> > the driver should specify the timings using a struct display_timing and
> > drivers should use that data to generate a mode that matches their
> > requirements but is still within the valid ranges specified in the .min
> > and .max values.
> >
> > That said, in this particular case nobody seems to be using the panel
> > in the upstream kernel.
>
> Sean and I had a private conversation about this too.  Roughly summarizing:
>
> 1. We have validated with the panel manufacturer that 266.667 MHz is
> valid and within spec.  The panel's datasheet itself says something
> like "if you want to try other values you can, but they might not
> work", so technically the only values "known" to work are those that
> were in the original patch and the values here in Sean's patch.
>

So why don't you add 2 modes, and let the drivers pick the clock they
prefer?

Stéphane


>
> 2. In the particular case of rk3399-kevin (which uses this panel), we
> actually went through several iterations before we found a mode that
> not only worked with the limited PLLs but also that didn't generate
> excessive noise on the digitizer (used for stylus input).  The
> digitizer is (as I understand) a separate component from the panel
> itself, so this restriction isn't really one on the panel but is a
> reality of how this panel was used in real hardware.  I have no idea
> how one expresses this board-centric view of the world.
>
> NOTE: Point #2 actually made me check, and Sean's patch is the wrong
> iteration of these changes.  Please see http://crosreview.com/381015
>
> 3. In an ideal world, even on rk3399-kevin we'd be able to choose the
> 252.75 MHz clock if the variable PLL on rk3399 happened to be
> available (if there was no external display whose pixel clock needed
> the variable PLL).  This would save a bit of power, and I believe the
> 252.75 MHz also avoids noise on the digitizer.  ...but trying to deal
> with all this was very complicated.
>
>
> That all being said: I'd personally be in favor for something like
> Sean's patch to land since, as you said, there are no other current
> users of the panel.  It's nice to start with something working and
> hopefully we can figure out a more advanced / dynamic system sometime
> in the future.
>
>
> > One minor nit below...
> >
> >>
> >> diff --git a/drivers/gpu/drm/panel/panel-simple.c
> b/drivers/gpu/drm/panel/panel-simple.c
> >> index 89eb0422821c..787b4d143220 100644
> >> --- a/drivers/gpu/drm/panel/panel-simple.c
> >> +++ b/drivers/gpu/drm/panel/panel-simple.c
> >> @@ -1598,17 +1598,18 @@ static const struct panel_desc
> sharp_lq101k1ly04 = {
> >>  };
> >>
> >>  static const struct drm_display_mode sharp_lq123p1jx31_mode = {
> >> -     .clock = 252750,
> >> +     .clock = 266667,
> >>       .hdisplay = 2400,
> >>       .hsync_start = 2400 + 48,
> >>       .hsync_end = 2400 + 48 + 32,
> >> -     .htotal = 2400 + 48 + 32 + 80,
> >> +     .htotal = 2400 + 48 + 32 + 139,
>
> Please fold in <https://chromium-review.googlesource.com/381015> to
> get noise-free timings.
>
>
> >>       .vdisplay = 1600,
> >>       .vsync_start = 1600 + 3,
> >>       .vsync_end = 1600 + 3 + 10,
> >> -     .vtotal = 1600 + 3 + 10 + 33,
> >> +     .vtotal = 1600 + 3 + 10 + 84,
>
> Here too.
>
> >>       .vrefresh = 60,
> >>       .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
> >> +     .type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER,
>
> IIRC this was an attempt to deal with the fact that the EDID had a
> different mode than we were specifying here, but I could be wrong.
>
>
>
> -Doug
>

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Re: [PATCH 01/41] drm/panel: simple: Change mode for Sharp lq123p1jx31

[Doug Anderson]

Hi,

On Mon, Mar 20, 2017 at 1:01 PM, Stéphane Marchesin
<marcheu@chromium.org> wrote:
>> 1. We have validated with the panel manufacturer that 266.667 MHz is
>> valid and within spec.  The panel's datasheet itself says something
>> like "if you want to try other values you can, but they might not
>> work", so technically the only values "known" to work are those that
>> were in the original patch and the values here in Sean's patch.
>
>
> So why don't you add 2 modes, and let the drivers pick the clock they
> prefer?

Yeah, that's what I did originally in my RFC patch at
<http://crosreview.com/354165> but I personally didn't have a good way
for the driver to figure out how to pick the right clock.  When the
patch actually landed I guess nobody else had a good way either and
thus only one clock mode was there.

-Doug
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Re: [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
> > From: zain wang <wzz@rock-chips.com>
> >
> > There is a race between AUX CH bring-up and enabling bridge which will
> > cause link training to fail. To avoid hitting it, don't change psr state
> > while enabling the bridge.
> >
> > Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> > Cc: Sean Paul <seanpaul@chromium.org>
> > Signed-off-by: zain wang <wzz@rock-chips.com>
> > Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> > [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> > Signed-off-by: Sean Paul <seanpaul@chromium.org>
> 
> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
> see functional change, or am I blind?

The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
trying to enable psr when the bridge is disabled (that's why psr_enable is
reset).

Sean

> 
> Regards
> Andrzej
> 
> > ---
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
> >  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
> >  include/drm/bridge/analogix_dp.h                   |  2 +-
> >  4 files changed, 11 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > index 8a8f05fe9da3..64d94a34874d 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
> >  	return 0;
> >  }
> >  
> > -int analogix_dp_psr_supported(struct device *dev)
> > +int analogix_dp_psr_enabled(struct device *dev)
> >  {
> >  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >  
> > -	return dp->psr_support;
> > +	return dp->psr_enable;
> >  }
> > -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> > +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
> >  
> >  int analogix_dp_enable_psr(struct device *dev)
> >  {
> >  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >  	struct edp_vsc_psr psr_vsc;
> >  
> > -	if (!dp->psr_support)
> > +	if (!dp->psr_enable)
> >  		return 0;
> >  
> >  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> > @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
> >  	struct edp_vsc_psr psr_vsc;
> >  	int ret;
> >  
> > -	if (!dp->psr_support)
> > +	if (!dp->psr_enable)
> >  		return 0;
> >  
> >  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> > @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> >  	/* Enable video */
> >  	analogix_dp_start_video(dp);
> >  
> > -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> > -	if (dp->psr_support)
> > +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> > +	if (dp->psr_enable)
> >  		analogix_dp_enable_sink_psr(dp);
> >  }
> >  
> > @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> >  	if (ret)
> >  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
> >  
> > +	dp->psr_enable = false;
> >  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
> >  }
> >  
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > index b039b28d8fcc..e135a42cb19e 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > @@ -170,7 +170,7 @@ struct analogix_dp_device {
> >  	int			dpms_mode;
> >  	int			hpd_gpio;
> >  	bool                    force_hpd;
> > -	bool			psr_support;
> > +	bool			psr_enable;
> >  
> >  	struct mutex		panel_lock;
> >  	bool			panel_is_modeset;
> > diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > index 64e7e2c0bc58..f44756029478 100644
> > --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
> >  	int vact_end;
> >  	int ret;
> >  
> > -	if (!analogix_dp_psr_supported(dp->dev))
> > +	if (!analogix_dp_psr_enabled(dp->dev))
> >  		return;
> >  
> >  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> > diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> > index c99d6eaef1ac..4fc0165ed3f5 100644
> > --- a/include/drm/bridge/analogix_dp.h
> > +++ b/include/drm/bridge/analogix_dp.h
> > @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
> >  			 struct drm_connector *);
> >  };
> >  
> > -int analogix_dp_psr_supported(struct device *dev);
> > +int analogix_dp_psr_enabled(struct device *dev);
> >  int analogix_dp_enable_psr(struct device *dev);
> >  int analogix_dp_disable_psr(struct device *dev);
> >  
> 

-- 
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[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
> > From: zain wang <wzz@rock-chips.com>
> >
> > There is a race between AUX CH bring-up and enabling bridge which will
> > cause link training to fail. To avoid hitting it, don't change psr state
> > while enabling the bridge.
> >
> > Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> > Cc: Sean Paul <seanpaul@chromium.org>
> > Signed-off-by: zain wang <wzz@rock-chips.com>
> > Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> > [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> > Signed-off-by: Sean Paul <seanpaul@chromium.org>
> 
> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
> see functional change, or am I blind?

The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
trying to enable psr when the bridge is disabled (that's why psr_enable is
reset).

Sean

> 
> Regards
> Andrzej
> 
> > ---
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
> >  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
> >  include/drm/bridge/analogix_dp.h                   |  2 +-
> >  4 files changed, 11 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > index 8a8f05fe9da3..64d94a34874d 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
> >  	return 0;
> >  }
> >  
> > -int analogix_dp_psr_supported(struct device *dev)
> > +int analogix_dp_psr_enabled(struct device *dev)
> >  {
> >  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >  
> > -	return dp->psr_support;
> > +	return dp->psr_enable;
> >  }
> > -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> > +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
> >  
> >  int analogix_dp_enable_psr(struct device *dev)
> >  {
> >  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >  	struct edp_vsc_psr psr_vsc;
> >  
> > -	if (!dp->psr_support)
> > +	if (!dp->psr_enable)
> >  		return 0;
> >  
> >  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> > @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
> >  	struct edp_vsc_psr psr_vsc;
> >  	int ret;
> >  
> > -	if (!dp->psr_support)
> > +	if (!dp->psr_enable)
> >  		return 0;
> >  
> >  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> > @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> >  	/* Enable video */
> >  	analogix_dp_start_video(dp);
> >  
> > -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> > -	if (dp->psr_support)
> > +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> > +	if (dp->psr_enable)
> >  		analogix_dp_enable_sink_psr(dp);
> >  }
> >  
> > @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> >  	if (ret)
> >  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
> >  
> > +	dp->psr_enable = false;
> >  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
> >  }
> >  
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > index b039b28d8fcc..e135a42cb19e 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > @@ -170,7 +170,7 @@ struct analogix_dp_device {
> >  	int			dpms_mode;
> >  	int			hpd_gpio;
> >  	bool                    force_hpd;
> > -	bool			psr_support;
> > +	bool			psr_enable;
> >  
> >  	struct mutex		panel_lock;
> >  	bool			panel_is_modeset;
> > diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > index 64e7e2c0bc58..f44756029478 100644
> > --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> > @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
> >  	int vact_end;
> >  	int ret;
> >  
> > -	if (!analogix_dp_psr_supported(dp->dev))
> > +	if (!analogix_dp_psr_enabled(dp->dev))
> >  		return;
> >  
> >  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> > diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> > index c99d6eaef1ac..4fc0165ed3f5 100644
> > --- a/include/drm/bridge/analogix_dp.h
> > +++ b/include/drm/bridge/analogix_dp.h
> > @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
> >  			 struct drm_connector *);
> >  };
> >  
> > -int analogix_dp_psr_supported(struct device *dev);
> > +int analogix_dp_psr_enabled(struct device *dev);
> >  int analogix_dp_enable_psr(struct device *dev);
> >  int analogix_dp_disable_psr(struct device *dev);
> >  
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS

Re: [PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP

[Sean Paul]

On Thu, Mar 16, 2017 at 03:14:28PM +0100, Andrzej Hajda wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
> > From: zain wang <wzz@rock-chips.com>
> >
> > We would meet a short black screen when exit PSR with the full link
> > training, In this case, we should use fast link train instead of full
> > link training.
> >
> > Signed-off-by: zain wang <wzz@rock-chips.com>
> > Signed-off-by: Sean Paul <seanpaul@chromium.org>
> > ---
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 142 ++++++++++++++++-----
> >  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   3 +
> >  2 files changed, 114 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > index 64d94a34874d..5bc151b0995b 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> > @@ -10,17 +10,18 @@
> >  * option) any later version.
> >  */
> >  
> > -#include <linux/module.h>
> > -#include <linux/platform_device.h>
> > -#include <linux/err.h>
> >  #include <linux/clk.h>
> > -#include <linux/io.h>
> > +#include <linux/component.h>
> > +#include <linux/err.h>
> > +#include <linux/gpio.h>
> >  #include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/iopoll.h>
> > +#include <linux/module.h>
> >  #include <linux/of.h>
> >  #include <linux/of_gpio.h>
> > -#include <linux/gpio.h>
> > -#include <linux/component.h>
> >  #include <linux/phy/phy.h>
> > +#include <linux/platform_device.h>
> >  
> >  #include <drm/drmP.h>
> >  #include <drm/drm_atomic_helper.h>
> > @@ -35,6 +36,8 @@
> >  
> >  #define to_dp(nm)	container_of(nm, struct analogix_dp_device, nm)
> >  
> > +static const bool verify_fast_training;
> > +
> 
> Quite odd debug sentinel, I am not sure if it is good practice to use
> such construct.

IIRC, they originally had a #define and then used #ifdef below to gate the
verification. My concern with that was the code would rot if it wasn't compiled.

<snip>

> > @@ -853,10 +933,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> >  			DRM_ERROR("failed to disable the panel\n");
> >  	}
> >  
> > -	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
> > -					 dp->video_info.max_link_rate);
> > +	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
> > +				 DP_TIMEOUT_TRAINING_US * 5);
> >  	if (ret) {
> > -		dev_err(dp->dev, "unable to do link train\n");
> > +		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
> 
> And here we have ", ret=%d\n". Maybe it would be good to make it
> consistent across whole driver.

Meh. I don't think it's worth bikeshedding over commas in error messages. I'm
just happy there are error checks/messages.


> Another issue with consistency in DRM_DEV_ERROR vs dev_err.

Yeah, that's annoying.

Sean

> 
> Regards
> Andrzej
> 
> >  		return;
> >  	}
> >  
> > diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > index e135a42cb19e..920607d7eb3e 100644
> > --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> > @@ -20,6 +20,8 @@
> >  #define MAX_CR_LOOP 5
> >  #define MAX_EQ_LOOP 5
> >  
> > +/* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
> > +#define DP_TIMEOUT_TRAINING_US			22000
> >  #define DP_TIMEOUT_PSR_LOOP_MS			300
> >  
> >  /* DP_MAX_LANE_COUNT */
> > @@ -171,6 +173,7 @@ struct analogix_dp_device {
> >  	int			hpd_gpio;
> >  	bool                    force_hpd;
> >  	bool			psr_enable;
> > +	bool			fast_train_support;
> >  
> >  	struct mutex		panel_lock;
> >  	bool			panel_is_modeset;
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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Re: [PATCH 12/41] drm/bridge: analogix_dp: add fast link train for eDP

[Andrzej Hajda]

On 21.03.2017 21:37, Sean Paul wrote:
> On Thu, Mar 16, 2017 at 03:14:28PM +0100, Andrzej Hajda wrote:
>> On 10.03.2017 05:32, Sean Paul wrote:
>>> From: zain wang <wzz@rock-chips.com>
>>>
>>> We would meet a short black screen when exit PSR with the full link
>>> training, In this case, we should use fast link train instead of full
>>> link training.
>>>
>>> Signed-off-by: zain wang <wzz@rock-chips.com>
>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 142 ++++++++++++++++-----
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   3 +
>>>  2 files changed, 114 insertions(+), 31 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> index 64d94a34874d..5bc151b0995b 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> @@ -10,17 +10,18 @@
>>>  * option) any later version.
>>>  */
>>>  
>>> -#include <linux/module.h>
>>> -#include <linux/platform_device.h>
>>> -#include <linux/err.h>
>>>  #include <linux/clk.h>
>>> -#include <linux/io.h>
>>> +#include <linux/component.h>
>>> +#include <linux/err.h>
>>> +#include <linux/gpio.h>
>>>  #include <linux/interrupt.h>
>>> +#include <linux/io.h>
>>> +#include <linux/iopoll.h>
>>> +#include <linux/module.h>
>>>  #include <linux/of.h>
>>>  #include <linux/of_gpio.h>
>>> -#include <linux/gpio.h>
>>> -#include <linux/component.h>
>>>  #include <linux/phy/phy.h>
>>> +#include <linux/platform_device.h>
>>>  
>>>  #include <drm/drmP.h>
>>>  #include <drm/drm_atomic_helper.h>
>>> @@ -35,6 +36,8 @@
>>>  
>>>  #define to_dp(nm)	container_of(nm, struct analogix_dp_device, nm)
>>>  
>>> +static const bool verify_fast_training;
>>> +
>> Quite odd debug sentinel, I am not sure if it is good practice to use
>> such construct.
> IIRC, they originally had a #define and then used #ifdef below to gate the
> verification. My concern with that was the code would rot if it wasn't compiled.

It just looks unusual, I am not strongly against current version.

>
> <snip>
>
>>> @@ -853,10 +933,10 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>>>  			DRM_ERROR("failed to disable the panel\n");
>>>  	}
>>>  
>>> -	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
>>> -					 dp->video_info.max_link_rate);
>>> +	ret = readx_poll_timeout(analogix_dp_train_link, dp, ret, !ret, 100,
>>> +				 DP_TIMEOUT_TRAINING_US * 5);
>>>  	if (ret) {
>>> -		dev_err(dp->dev, "unable to do link train\n");
>>> +		dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);
>> And here we have ", ret=%d\n". Maybe it would be good to make it
>> consistent across whole driver.
> Meh. I don't think it's worth bikeshedding over commas in error messages. I'm
> just happy there are error checks/messages.

But if there will be next iteration it is not big deal to fix it then :)

Regards
Andrzej

>
>
>> Another issue with consistency in DRM_DEV_ERROR vs dev_err.
> Yeah, that's annoying.
>
> Sean
>
>> Regards
>> Andrzej
>>
>>>  		return;
>>>  	}
>>>  
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> index e135a42cb19e..920607d7eb3e 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> @@ -20,6 +20,8 @@
>>>  #define MAX_CR_LOOP 5
>>>  #define MAX_EQ_LOOP 5
>>>  
>>> +/* Training takes 22ms if AUX channel comm fails. Use this as retry interval */
>>> +#define DP_TIMEOUT_TRAINING_US			22000
>>>  #define DP_TIMEOUT_PSR_LOOP_MS			300
>>>  
>>>  /* DP_MAX_LANE_COUNT */
>>> @@ -171,6 +173,7 @@ struct analogix_dp_device {
>>>  	int			hpd_gpio;
>>>  	bool                    force_hpd;
>>>  	bool			psr_enable;
>>> +	bool			fast_train_support;
>>>  
>>>  	struct mutex		panel_lock;
>>>  	bool			panel_is_modeset;


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Re: [PATCH 21/41] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> When panel is shut down, we should make sure edp can be disabled to avoid
> undefined behavior.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Beside nitpicks:
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 048b6f7c9b6e..3b2d53935ae9 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1163,6 +1163,12 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  
>  	pm_runtime_get_sync(dp->dev);
>  
> +	ret = clk_prepare_enable(dp->clock);
> +	if (ret < 0) {
> +		DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);

Again inconsistent loggging method and ret reporting :)

> +		goto out_dp_clk_pre;
> +	}
> +
>  	if (dp->plat_data->power_on)
>  		dp->plat_data->power_on(dp->plat_data);
>  
> @@ -1192,6 +1198,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  	phy_power_off(dp->phy);
>  	if (dp->plat_data->power_off)
>  		dp->plat_data->power_off(dp->plat_data);
> +	clk_disable_unprepare(dp->clock);
> +out_dp_clk_pre:
>  	pm_runtime_put_sync(dp->dev);
>  
>  	return ret;
> @@ -1235,10 +1243,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>  
>  	disable_irq(dp->irq);
>  	phy_power_off(dp->phy);
> +	analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);

The last argument is of bool type, so preferably it should be true, but
no big deal.
BTW what is the meaning of the last argument of
analogix_dp_set_analog_power_down?

Regards
Andrzej

>  
>  	if (dp->plat_data->power_off)
>  		dp->plat_data->power_off(dp->plat_data);
>  
> +	clk_disable_unprepare(dp->clock);
> +
>  	pm_runtime_put_sync(dp->dev);
>  
>  	ret = analogix_dp_prepare_panel(dp, false, true);


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Re: [PATCH 22/41] drm/bridge: analogix_dp: Extend hpd check time to 100ms

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> We only allocated 1ms to detect the hpd signal before, it too short to detect
> a short pulse (hpd signal), extend it to 100ms.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Cc: 征增 王 <wzz@rock-chips.com>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

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Re: [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 21.03.2017 20:58, Sean Paul wrote:
> On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
>> On 10.03.2017 05:32, Sean Paul wrote:
>>> From: zain wang <wzz@rock-chips.com>
>>>
>>> There is a race between AUX CH bring-up and enabling bridge which will
>>> cause link training to fail. To avoid hitting it, don't change psr state
>>> while enabling the bridge.
>>>
>>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>> Cc: Sean Paul <seanpaul@chromium.org>
>>> Signed-off-by: zain wang <wzz@rock-chips.com>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
>> see functional change, or am I blind?
> The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
> trying to enable psr when the bridge is disabled (that's why psr_enable is
> reset).

Copy/paste from analogix_dp_commit chunk below:

-	dp->psr_support = analogix_dp_detect_sink_psr(dp);
-	if (dp->psr_support)
+	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);


What is added here?

Regards
Andrzej

>
> Sean
>
>> Regards
>> Andrzej
>>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>>>  include/drm/bridge/analogix_dp.h                   |  2 +-
>>>  4 files changed, 11 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> index 8a8f05fe9da3..64d94a34874d 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>>>  	return 0;
>>>  }
>>>  
>>> -int analogix_dp_psr_supported(struct device *dev)
>>> +int analogix_dp_psr_enabled(struct device *dev)
>>>  {
>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>  
>>> -	return dp->psr_support;
>>> +	return dp->psr_enable;
>>>  }
>>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
>>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>>>  
>>>  int analogix_dp_enable_psr(struct device *dev)
>>>  {
>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>  	struct edp_vsc_psr psr_vsc;
>>>  
>>> -	if (!dp->psr_support)
>>> +	if (!dp->psr_enable)
>>>  		return 0;
>>>  
>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>>>  	struct edp_vsc_psr psr_vsc;
>>>  	int ret;
>>>  
>>> -	if (!dp->psr_support)
>>> +	if (!dp->psr_enable)
>>>  		return 0;
>>>  
>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>>>  	/* Enable video */
>>>  	analogix_dp_start_video(dp);
>>>  
>>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>>> -	if (dp->psr_support)
>>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>>> +	if (dp->psr_enable)
>>>  		analogix_dp_enable_sink_psr(dp);
>>>  }
>>>  
>>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>>>  	if (ret)
>>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>>>  
>>> +	dp->psr_enable = false;
>>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>>>  }
>>>  
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> index b039b28d8fcc..e135a42cb19e 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>>>  	int			dpms_mode;
>>>  	int			hpd_gpio;
>>>  	bool                    force_hpd;
>>> -	bool			psr_support;
>>> +	bool			psr_enable;
>>>  
>>>  	struct mutex		panel_lock;
>>>  	bool			panel_is_modeset;
>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> index 64e7e2c0bc58..f44756029478 100644
>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>>>  	int vact_end;
>>>  	int ret;
>>>  
>>> -	if (!analogix_dp_psr_supported(dp->dev))
>>> +	if (!analogix_dp_psr_enabled(dp->dev))
>>>  		return;
>>>  
>>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
>>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>>> index c99d6eaef1ac..4fc0165ed3f5 100644
>>> --- a/include/drm/bridge/analogix_dp.h
>>> +++ b/include/drm/bridge/analogix_dp.h
>>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>>>  			 struct drm_connector *);
>>>  };
>>>  
>>> -int analogix_dp_psr_supported(struct device *dev);
>>> +int analogix_dp_psr_enabled(struct device *dev);
>>>  int analogix_dp_enable_psr(struct device *dev);
>>>  int analogix_dp_disable_psr(struct device *dev);
>>>  

[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 21.03.2017 20:58, Sean Paul wrote:
> On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
>> On 10.03.2017 05:32, Sean Paul wrote:
>>> From: zain wang <wzz@rock-chips.com>
>>>
>>> There is a race between AUX CH bring-up and enabling bridge which will
>>> cause link training to fail. To avoid hitting it, don't change psr state
>>> while enabling the bridge.
>>>
>>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>> Cc: Sean Paul <seanpaul@chromium.org>
>>> Signed-off-by: zain wang <wzz@rock-chips.com>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
>> see functional change, or am I blind?
> The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
> trying to enable psr when the bridge is disabled (that's why psr_enable is
> reset).

Copy/paste from analogix_dp_commit chunk below:

-	dp->psr_support = analogix_dp_detect_sink_psr(dp);
-	if (dp->psr_support)
+	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
+	if (dp->psr_enable)
 		analogix_dp_enable_sink_psr(dp);


What is added here?

Regards
Andrzej

>
> Sean
>
>> Regards
>> Andrzej
>>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>>>  include/drm/bridge/analogix_dp.h                   |  2 +-
>>>  4 files changed, 11 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> index 8a8f05fe9da3..64d94a34874d 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>>>  	return 0;
>>>  }
>>>  
>>> -int analogix_dp_psr_supported(struct device *dev)
>>> +int analogix_dp_psr_enabled(struct device *dev)
>>>  {
>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>  
>>> -	return dp->psr_support;
>>> +	return dp->psr_enable;
>>>  }
>>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
>>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>>>  
>>>  int analogix_dp_enable_psr(struct device *dev)
>>>  {
>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>  	struct edp_vsc_psr psr_vsc;
>>>  
>>> -	if (!dp->psr_support)
>>> +	if (!dp->psr_enable)
>>>  		return 0;
>>>  
>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>>>  	struct edp_vsc_psr psr_vsc;
>>>  	int ret;
>>>  
>>> -	if (!dp->psr_support)
>>> +	if (!dp->psr_enable)
>>>  		return 0;
>>>  
>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>>>  	/* Enable video */
>>>  	analogix_dp_start_video(dp);
>>>  
>>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>>> -	if (dp->psr_support)
>>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>>> +	if (dp->psr_enable)
>>>  		analogix_dp_enable_sink_psr(dp);
>>>  }
>>>  
>>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>>>  	if (ret)
>>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>>>  
>>> +	dp->psr_enable = false;
>>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>>>  }
>>>  
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> index b039b28d8fcc..e135a42cb19e 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>>>  	int			dpms_mode;
>>>  	int			hpd_gpio;
>>>  	bool                    force_hpd;
>>> -	bool			psr_support;
>>> +	bool			psr_enable;
>>>  
>>>  	struct mutex		panel_lock;
>>>  	bool			panel_is_modeset;
>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> index 64e7e2c0bc58..f44756029478 100644
>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>>>  	int vact_end;
>>>  	int ret;
>>>  
>>> -	if (!analogix_dp_psr_supported(dp->dev))
>>> +	if (!analogix_dp_psr_enabled(dp->dev))
>>>  		return;
>>>  
>>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
>>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>>> index c99d6eaef1ac..4fc0165ed3f5 100644
>>> --- a/include/drm/bridge/analogix_dp.h
>>> +++ b/include/drm/bridge/analogix_dp.h
>>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>>>  			 struct drm_connector *);
>>>  };
>>>  
>>> -int analogix_dp_psr_supported(struct device *dev);
>>> +int analogix_dp_psr_enabled(struct device *dev);
>>>  int analogix_dp_enable_psr(struct device *dev);
>>>  int analogix_dp_disable_psr(struct device *dev);
>>>  

Re: [PATCH 23/41] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> Enhanced mode is required by the eDP 1.2 specification, and not doing it early
> could result in a period of time where we have a link transmitting idle packets
> without it. Since there is no reason to disable it, we just enable it at the
> beginning of link training and then keep it on all the time
>
> Cc: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

--
Regards
Andrzej
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Re: [PATCH 24/41] drm/bridge: analogix_dp: Check dpcd write/read status

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> We need to check the dpcd write/read return value to see whether the
> write/read was successful
>
> Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 173 +++++++++++++++------
>  1 file changed, 125 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 8d69d4327871..dcf39ea0d14b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -163,80 +163,132 @@ int analogix_dp_disable_psr(struct device *dev)
>  }
>  EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
>  
> -static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
> +static int analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
>  {
>  	unsigned char psr_version;
> +	int ret;
> +
> +	ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to get PSR version, disable it\n");
> +		return ret;
> +	}
>  
> -	drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
>  	dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version);
>  
> -	return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
> +	dp->psr_enable = (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
> +	return 0;
>  }
>  
> -static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
> +static int analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
>  {
>  	unsigned char psr_en;
> +	int ret;
>  
>  	/* Disable psr function */
> -	drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
> +	ret = drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to get psr config\n");
> +		goto end;
> +	}
> +
>  	psr_en &= ~DP_PSR_ENABLE;
> -	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to disable panel psr\n");
> +		goto end;
> +	}
>  
>  	/* Main-Link transmitter remains active during PSR active states */
>  	psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION;
> -	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to set panel psr\n");
> +		goto end;
> +	}
>  
>  	/* Enable psr function */
>  	psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
>  		 DP_PSR_CRC_VERIFICATION;
> -	drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
> +	if (ret != 1) {
> +		dev_err(dp->dev, "failed to set panel psr\n");
> +		goto end;
> +	}
>  
>  	analogix_dp_enable_psr_crc(dp);
> +	return 0;
> +end:
> +	dev_err(dp->dev, "enable psr fail, force to disable psr\n");
> +	dp->psr_enable = false;
> +	return ret;
>  }
>  
> -static void
> +static int
>  analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
>  				       bool enable)
>  {
>  	u8 data;
> +	int ret;
>  
> -	drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
> +	ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
> +	if (ret < 0)
> +		return ret;
>  
>  	if (enable)
> -		drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
> -				   DP_LANE_COUNT_ENHANCED_FRAME_EN |
> -					DPCD_LANE_COUNT_SET(data));
> +		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
> +					 DP_LANE_COUNT_ENHANCED_FRAME_EN |
> +					 DPCD_LANE_COUNT_SET(data));
>  	else
> -		drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
> -				   DPCD_LANE_COUNT_SET(data));
> +		ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
> +					 DPCD_LANE_COUNT_SET(data));
> +
> +	return ret < 0 ? ret : 0;
>  }
>  
> -static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
> +static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp,
> +						  u8 *enhanced_mode_support)
>  {
>  	u8 data;
> -	int retval;
> +	int ret;
>  
> -	drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
> -	retval = DPCD_ENHANCED_FRAME_CAP(data);
> +	ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
> +	if (ret < 0)
> +		return ret;
>  
> -	return retval;
> +	*enhanced_mode_support = DPCD_ENHANCED_FRAME_CAP(data);
> +
> +	return 0;
>  }
>  
> -static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
> +static int analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
>  {
>  	u8 data;
> +	int ret;
> +
> +	ret = analogix_dp_is_enhanced_mode_available(dp, &data);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = analogix_dp_enable_rx_to_enhanced_mode(dp, data);
> +	if (ret < 0)
> +		return ret;
>  
> -	data = analogix_dp_is_enhanced_mode_available(dp);
> -	analogix_dp_enable_rx_to_enhanced_mode(dp, data);
>  	analogix_dp_enable_enhanced_mode(dp, data);
> +
> +	return 0;
>  }
>  
> -static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
> +static int analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
>  {
> +	int retval;
> +
>  	analogix_dp_set_training_pattern(dp, DP_NONE);
>  
> -	drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
> -			   DP_TRAINING_PATTERN_DISABLE);
> +	retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
> +				    DP_TRAINING_PATTERN_DISABLE);
> +
> +	return retval < 0 ? retval : 0;
>  }
>  
>  static void
> @@ -285,7 +337,11 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
>  	if (retval < 0)
>  		return retval;
>  	/* set enhanced mode if available */
> -	analogix_dp_set_enhanced_mode(dp);
> +	retval = analogix_dp_set_enhanced_mode(dp);
> +	if (retval < 0) {
> +		dev_err(dp->dev, "failed to set enhance mode\n");
> +		return retval;
> +	}
>  
>  	/* Set TX pre-emphasis to minimum */
>  	for (lane = 0; lane < lane_count; lane++)
> @@ -570,10 +626,11 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
>  
>  	if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
>  		/* traing pattern Set to Normal */
> -		analogix_dp_training_pattern_dis(dp);
> +		retval = analogix_dp_training_pattern_dis(dp);
> +		if (retval < 0)
> +			return retval;
>  
>  		dev_info(dp->dev, "Link Training success!\n");
> -
>  		analogix_dp_get_link_bandwidth(dp, &reg);
>  		dp->link_train.link_rate = reg;
>  		dev_dbg(dp->dev, "final bandwidth = %.2x\n",
> @@ -810,7 +867,6 @@ static int analogix_dp_train_link(struct analogix_dp_device *dp)
>  
>  static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  {
> -	int retval = 0;
>  	int timeout_loop = 0;
>  	int done_count = 0;
>  
> @@ -828,8 +884,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
>  			break;
>  		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
> -			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
> -			return -ETIMEDOUT;
> +			dev_warn(dp->dev,
> +				 "Ignoring timeout of slave video streamclk ok\n");
> +			break;
>  		}
>  		usleep_range(1000, 1001);
>  	}
> @@ -868,30 +925,35 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  		usleep_range(1000, 1001);
>  	}
>  
> -	if (retval != 0)
> -		dev_err(dp->dev, "Video stream is not detected!\n");
> -
> -	return retval;
> +	return 0;
>  }
>  
> -static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
> +static int analogix_dp_enable_scramble(struct analogix_dp_device *dp,
>  					bool enable)
>  {
>  	u8 data;
> +	int ret;
>  
>  	if (enable) {
>  		analogix_dp_enable_scrambling(dp);
>  
> -		drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
> -		drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
> +		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
> +					&data);
> +		if (ret != 1)
> +			return ret;
> +		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
>  				   (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
>  	} else {
>  		analogix_dp_disable_scrambling(dp);
>  
> -		drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
> -		drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
> +		ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,
> +					&data);
> +		if (ret != 1)
> +			return ret;
> +		ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
>  				   (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
>  	}
> +	return ret < 0 ? ret : 0;
>  }
>  
>  static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
> @@ -946,23 +1008,36 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
>  		return ret;
>  	}
>  
> -	analogix_dp_enable_scramble(dp, 1);
> +	ret = analogix_dp_enable_scramble(dp, 1);
> +	if (ret < 0) {
> +		dev_err(dp->dev, "can not enable scramble\n");
> +		return ret;
> +	}
>  
>  	analogix_dp_init_video(dp);
>  	ret = analogix_dp_config_video(dp);
> -	if (ret)
> +	if (ret) {
>  		dev_err(dp->dev, "unable to config video\n");
> +		return ret;
> +	}
>  
>  	/* Safe to enable the panel now */
>  	if (dp->plat_data->panel) {
> -		if (drm_panel_enable(dp->plat_data->panel))
> +		ret = drm_panel_enable(dp->plat_data->panel);
> +		if (ret) {
>  			DRM_ERROR("failed to enable the panel\n");
> +			return ret;
> +		}
>  	}
>  
> -	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> +	ret = analogix_dp_detect_sink_psr(dp);
> +	if (ret)
> +		return ret;
> +
>  	if (dp->psr_enable)
> -		analogix_dp_enable_sink_psr(dp);
> -	return 0;
> +		ret = analogix_dp_enable_sink_psr(dp);
> +
> +	return ret;
>  }
>  
>  /*
> @@ -1186,8 +1261,10 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  	}
>  
>  	ret = analogix_dp_commit(dp);
> -	if (ret)
> +	if (ret) {
> +		DRM_ERROR("dp commit error, ret = %d\n", ret);
>  		goto out_dp_init;
> +	}
>  
>  	enable_irq(dp->irq);
>  	return 0;


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Re: [PATCH 25/41] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> There some different bit between Rockchip and Exynos in register "AUX_PD",
> So let's fix the incorrect operations about it.

There are more differences.

>
> Cc: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Beside description and subject.

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 116 ++++++++++++----------
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |   2 +
>  2 files changed, 64 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index bb72f8b0e603..377bee4e20fd 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -248,76 +248,84 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>  {
>  	u32 reg;
>  	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
> +	u32 mask;
>  
>  	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
>  		phy_pd_addr = ANALOGIX_DP_PD;
>  
>  	switch (block) {
>  	case AUX_BLOCK:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= AUX_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~AUX_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> +			mask = RK_AUX_PD;
> +		else
> +			mask = AUX_PD;
> +
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +		if (enable)
> +				reg |= mask;
> +		else
> +				reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
>  		break;
>  	case CH0_BLOCK:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= CH0_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~CH0_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		mask = CH0_PD;
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +
> +		if (enable)
> +			reg |= mask;
> +		else
> +			reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
>  		break;
>  	case CH1_BLOCK:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= CH1_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~CH1_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		mask = CH1_PD;
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +
> +		if (enable)
> +			reg |= mask;
> +		else
> +			reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
>  		break;
>  	case CH2_BLOCK:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= CH2_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~CH2_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		mask = CH2_PD;
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +
> +		if (enable)
> +			reg |= mask;
> +		else
> +			reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
>  		break;
>  	case CH3_BLOCK:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= CH3_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~CH3_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		mask = CH3_PD;
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +
> +		if (enable)
> +			reg |= mask;
> +		else
> +			reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
>  		break;
>  	case ANALOG_TOTAL:
> -		if (enable) {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg |= DP_PHY_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		} else {
> -			reg = readl(dp->reg_base + phy_pd_addr);
> -			reg &= ~DP_PHY_PD;
> -			writel(reg, dp->reg_base + phy_pd_addr);
> -		}
> +		/*
> +		 * There is no bit named DP_PHY_PD, so We used DP_INC_BG
> +		 * to power off everything instead of DP_PHY_PD in
> +		 * Rockchip
> +		 */
> +		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> +			mask = DP_INC_BG;
> +		else
> +			mask = DP_PHY_PD;
> +
> +		reg = readl(dp->reg_base + phy_pd_addr);
> +		if (enable)
> +				reg |= mask;
> +		else
> +				reg &= ~mask;
> +		writel(reg, dp->reg_base + phy_pd_addr);
> +		if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> +			usleep_range(10, 15);
>  		break;
>  	case POWER_ALL:
>  		if (enable) {
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 9602668669f4..b633a4a5082a 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -345,7 +345,9 @@
>  #define DP_INC_BG				(0x1 << 7)
>  #define DP_EXP_BG				(0x1 << 6)
>  #define DP_PHY_PD				(0x1 << 5)
> +#define RK_AUX_PD				(0x1 << 5)
>  #define AUX_PD					(0x1 << 4)
> +#define RK_PLL_PD				(0x1 << 4)
>  #define CH3_PD					(0x1 << 3)
>  #define CH2_PD					(0x1 << 2)
>  #define CH1_PD					(0x1 << 1)


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Re: [PATCH 26/41] drm/bridge: analogix_dp: Reset aux channel if an error occurred

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Lin Huang <hl@rock-chips.com>
>
> AUX errors are caused by many different reasons. We may not know what
> happened in aux channel on failure, so let's reset aux channel if some
> errors occurred.
>
> Cc: 征增 王 <wzz@rock-chips.com>
> Cc: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Lin Huang <hl@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

Few questions below:

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 377bee4e20fd..1cb57e528ec8 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -465,6 +465,10 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
>  	reg = RPLY_RECEIV | AUX_ERR;
>  	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
>  
> +	analogix_dp_set_analog_power_down(dp, AUX_BLOCK, true);
> +	usleep_range(10, 11);
> +	analogix_dp_set_analog_power_down(dp, AUX_BLOCK, false);
> +
>  	analogix_dp_reset_aux(dp);
>  
>  	/* Disable AUX transaction H/W retry */
> @@ -1158,7 +1162,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  				 reg, !(reg & AUX_EN), 25, 500 * 1000);
>  	if (ret) {
>  		dev_err(dp->dev, "AUX CH enable timeout!\n");
> -		return -ETIMEDOUT;
> +		goto aux_error;
>  	}
>  
>  	/* TODO: Wait for an interrupt instead of looping? */
> @@ -1167,7 +1171,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  				 reg, reg & RPLY_RECEIV, 10, 20 * 1000);
>  	if (ret) {
>  		dev_err(dp->dev, "AUX CH cmd reply timeout!\n");
> -		return -ETIMEDOUT;
> +		goto aux_error;
>  	}
>  
>  	/* Clear interrupt source for AUX CH command reply */
> @@ -1177,7 +1181,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
>  	if (reg & AUX_ERR) {
>  		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
> -		return -EREMOTEIO;
> +		goto aux_error;
>  	}
>  
>  	/* Check AUX CH error access status */
> @@ -1185,7 +1189,7 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  	if ((reg & AUX_STATUS_MASK)) {
>  		dev_err(dp->dev, "AUX CH error happened: %d\n\n",
>  			reg & AUX_STATUS_MASK);
> -		return -EREMOTEIO;
> +		goto aux_error;
>  	}
>  
>  	if (msg->request & DP_AUX_I2C_READ) {
> @@ -1211,4 +1215,10 @@ ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
>  		msg->reply = DP_AUX_NATIVE_REPLY_ACK;
>  
>  	return num_transferred > 0 ? num_transferred : -EBUSY;
> +
> +aux_error:
> +	/* if aux err happen, reset aux */
> +	analogix_dp_init_aux(dp);
> +
> +	return -EREMOTEIO;

You are masking original error values here, is it intended?

>  }


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Re: [PATCH 28/41] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
> list.  We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
> instead of ANALOGIX_DP_PLL_CTL.
>
> Cc: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

Small comment below.

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 ++++++++++++--------
>  1 file changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 1cb57e528ec8..2cacd1e84b4d 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -230,16 +230,20 @@ enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp)
>  void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
>  {
>  	u32 reg;
> +	u32 mask = DP_PLL_PD;
> +	u32 pd_addr = ANALOGIX_DP_PLL_CTL;
>  
> -	if (enable) {
> -		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
> -		reg |= DP_PLL_PD;
> -		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
> -	} else {
> -		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
> -		reg &= ~DP_PLL_PD;
> -		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
> +	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
> +		pd_addr = ANALOGIX_DP_PD;
> +		mask = RK_PLL_PD;
>  	}
> +
> +	reg = readl(dp->reg_base + pd_addr);
> +	if (enable)
> +		reg |= mask;
> +	else
> +		reg &= ~mask;
> +	writel(reg, dp->reg_base + pd_addr);

This pattern (readl,set bits,writel) is repeated so many times, maybe it
would be good to add some helper.

Regards
Andrzej

>  }
>  
>  void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,


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Re: [PATCH 29/41] drm/bridge: analogix_dp: Fix timeout of video streamclk config

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> The STRM_VALID bit in register ANALOGIX_DP_SYS_CTL_3 may be unstable,
> so we may hit the error log "Timeout of video streamclk ok" since
> checked this unstable bit.
> In fact, we can go continue and the streamclk is ok if we wait enough time,
> it does no effect on display.
> Let's change this error to warn.

Description does not describe the change from warn to err in case of
slave video clk.
Beside this:
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

>
> Cc: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 35ea04ff4078..4ebbf3053639 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -886,9 +886,8 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
>  			break;
>  		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
> -			dev_warn(dp->dev,
> -				 "Ignoring timeout of slave video streamclk ok\n");
> -			break;
> +			dev_err(dp->dev, "Timeout of slave video streamclk ok\n");
> +			return -ETIMEDOUT;
>  		}
>  		usleep_range(1000, 1001);
>  	}
> @@ -920,8 +919,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
>  			done_count = 0;
>  		}
>  		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
> -			dev_err(dp->dev, "Timeout of video streamclk ok\n");
> -			return -ETIMEDOUT;
> +			dev_warn(dp->dev,
> +				 "Ignoring timeout of video streamclk ok\n");
> +			break;
>  		}
>  
>  		usleep_range(1000, 1001);


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Re: [PATCH 30/41] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to Exynos:
> on Exynos edp phy,
> BIT 7		MASTER_VID_FUNC_EN_N
> BIT 6		reserved
> BIT 5		SLAVE_VID_FUNC_EN_N
> on Rockchip edp phy,
> BIT 7		reserved
> BIT 6		RK_VID_CAP_FUNC_EN_N
> BIT 5		RK_VID_FIFO_FUNC_EN_N
> So, we should do some private operations to Rockchip.
> Cc: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

BTW, the number of registry differences becomes significant, maybe it is
time to replace this ugly conditional:
    if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
with something more readable.

--
Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 19 ++++++++++++++-----
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  2 ++
>  2 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 2cacd1e84b4d..ddc8165947c1 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -126,9 +126,14 @@ void analogix_dp_reset(struct analogix_dp_device *dp)
>  	analogix_dp_stop_video(dp);
>  	analogix_dp_enable_video_mute(dp, 0);
>  
> -	reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
> -		AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
> -		HDCP_FUNC_EN_N | SW_FUNC_EN_N;
> +	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> +		reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N |
> +			SW_FUNC_EN_N;
> +	else
> +		reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
> +			AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
> +			HDCP_FUNC_EN_N | SW_FUNC_EN_N;
> +
>  	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
>  
>  	reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
> @@ -970,8 +975,12 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
>  	u32 reg;
>  
>  	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
> -	reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
> -	reg |= MASTER_VID_FUNC_EN_N;
> +	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
> +		reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N);
> +	} else {
> +		reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
> +		reg |= MASTER_VID_FUNC_EN_N;
> +	}
>  	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
>  
>  	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index b633a4a5082a..0cf27c731727 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -127,7 +127,9 @@
>  
>  /* ANALOGIX_DP_FUNC_EN_1 */
>  #define MASTER_VID_FUNC_EN_N			(0x1 << 7)
> +#define RK_VID_CAP_FUNC_EN_N			(0x1 << 6)
>  #define SLAVE_VID_FUNC_EN_N			(0x1 << 5)
> +#define RK_VID_FIFO_FUNC_EN_N			(0x1 << 5)
>  #define AUD_FIFO_FUNC_EN_N			(0x1 << 4)
>  #define AUD_FUNC_EN_N				(0x1 << 3)
>  #define HDCP_FUNC_EN_N				(0x1 << 2)


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Re: [PATCH 31/41] drm/bridge: analogix_dp: Move fast link training detect to set_bridge

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: zain wang <wzz@rock-chips.com>
>
> It's too early to detect fast link training, if other step after it failed,
> we will set fast_link flag to 1, and retry set_bridge again. In this case
> we will power down and power up panel power supply, and we will do fast link
> training since we have set fast_link flag to 1. In fact, we should do full
> link training now, not the fast link training. So we should move the fast
> link detection at the end of set_bridge.
>
> Cc: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: zain wang <wzz@rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

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Re: [PATCH 38/41] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Douglas Anderson <dianders@chromium.org>
>
> The current user of the analogix power_off is "analogix_dp-rockchip".
> That driver does this:
> - deactivate PSR
> - turn off a clock
>
> Both of these things (especially deactive PSR) should be done before
> we turn the PHY power off and turn off analog power.  Let's move the
> callback up.
>
> Note that without this patch (and with https://patchwork.kernel.org/patch/9553349/
> [seanpaul: this patch was not applied, but it seems like the race
> can still occur]), I experienced an error in reboot testing where one
> thread was at:
>
>   rockchip_drm_psr_deactivate
>   rockchip_dp_powerdown
>   analogix_dp_bridge_disable
>   drm_bridge_disable
>
> ...and the other thread was at:
>
>   analogix_dp_send_psr_spd
>   analogix_dp_enable_psr
>   analogix_dp_psr_set
>   psr_flush_handler
>
> The flush handler thread was finding AUX channel errors and eventually
> reported "Failed to apply PSR", where I had a kgdb breakpoint. Presumably
> the device would have eventually given up and shut down anyway, but it
> seems better to fix the order to be more correct.
>
> Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej


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Re: [PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Douglas Anderson <dianders@chromium.org>
>
> Some of the platform-specific stuff in rockchip_dp_poweron() needs to
> happen before the generic code.  Some needs to happen after.  Let's
> split the callback in two.
>
> Specifically we can't start doing PSR work until _after_ the whole
> controller is up, so don't set the enable until the end.
>
> Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> [seanpaul added exynos change]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Sounds like mid-layer issue. I do not know bridge details so I can only
guess but probably passing full control to drivers and call generic code
via helpers could be better solution.
Anyway it can be done later.

For now:
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>


Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  7 +++++--
>  drivers/gpu/drm/exynos/exynos_dp.c                 |  2 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++++++--
>  include/drm/bridge/analogix_dp.h                   |  3 ++-
>  4 files changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index a05bc0271188..bc9a0a28ab1d 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1254,8 +1254,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  		goto out_dp_clk_pre;
>  	}
>  
> -	if (dp->plat_data->power_on)
> -		dp->plat_data->power_on(dp->plat_data);
> +	if (dp->plat_data->power_on_start)
> +		dp->plat_data->power_on_start(dp->plat_data);
>  
>  	phy_power_on(dp->phy);
>  
> @@ -1278,6 +1278,9 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  		goto out_dp_init;
>  	}
>  
> +	if (dp->plat_data->power_on_end)
> +		dp->plat_data->power_on_end(dp->plat_data);
> +
>  	enable_irq(dp->irq);
>  	return 0;
>  
> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
> index 1ef0be338b85..6b79c3b3802f 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
> @@ -168,7 +168,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
>  	dp->drm_dev = drm_dev;
>  
>  	dp->plat_data.dev_type = EXYNOS_DP;
> -	dp->plat_data.power_on = exynos_dp_poweron;
> +	dp->plat_data.power_on_start = exynos_dp_poweron;
>  	dp->plat_data.power_off = exynos_dp_poweroff;
>  	dp->plat_data.attach = exynos_dp_bridge_attach;
>  	dp->plat_data.get_modes = exynos_dp_get_modes;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 14f68e792e6f..07dd09e1e32f 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -127,7 +127,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
>  	return 0;
>  }
>  
> -static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
> +static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
>  {
>  	struct rockchip_dp_device *dp = to_dp(plat_data);
>  	int ret;
> @@ -145,6 +145,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
>  		return ret;
>  	}
>  
> +	return ret;
> +}
> +
> +static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
> +{
> +	struct rockchip_dp_device *dp = to_dp(plat_data);
> +
>  	return rockchip_drm_psr_activate(&dp->encoder);
>  }
>  
> @@ -399,7 +406,8 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
>  	dp->plat_data.encoder = &dp->encoder;
>  
>  	dp->plat_data.dev_type = dp->data->chip_type;
> -	dp->plat_data.power_on = rockchip_dp_poweron;
> +	dp->plat_data.power_on_start = rockchip_dp_poweron_start;
> +	dp->plat_data.power_on_end = rockchip_dp_poweron_end;
>  	dp->plat_data.power_off = rockchip_dp_powerdown;
>  	dp->plat_data.get_modes = rockchip_dp_get_modes;
>  	dp->plat_data.cleanup = rockchip_dp_cleanup;
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index c079ca1ffc76..1049ee56ae76 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -30,7 +30,8 @@ struct analogix_dp_plat_data {
>  	struct drm_encoder *encoder;
>  	struct drm_connector *connector;
>  
> -	int (*power_on)(struct analogix_dp_plat_data *);
> +	int (*power_on_start)(struct analogix_dp_plat_data *);
> +	int (*power_on_end)(struct analogix_dp_plat_data *);
>  	int (*power_off)(struct analogix_dp_plat_data *);
>  	int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
>  		      struct drm_connector *);

[PATCH 39/41] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Douglas Anderson <dianders@chromium.org>
>
> Some of the platform-specific stuff in rockchip_dp_poweron() needs to
> happen before the generic code.  Some needs to happen after.  Let's
> split the callback in two.
>
> Specifically we can't start doing PSR work until _after_ the whole
> controller is up, so don't set the enable until the end.
>
> Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> [seanpaul added exynos change]
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

Sounds like mid-layer issue. I do not know bridge details so I can only
guess but probably passing full control to drivers and call generic code
via helpers could be better solution.
Anyway it can be done later.

For now:
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>


Regards
Andrzej

> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |  7 +++++--
>  drivers/gpu/drm/exynos/exynos_dp.c                 |  2 +-
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 12 ++++++++++--
>  include/drm/bridge/analogix_dp.h                   |  3 ++-
>  4 files changed, 18 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index a05bc0271188..bc9a0a28ab1d 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1254,8 +1254,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  		goto out_dp_clk_pre;
>  	}
>  
> -	if (dp->plat_data->power_on)
> -		dp->plat_data->power_on(dp->plat_data);
> +	if (dp->plat_data->power_on_start)
> +		dp->plat_data->power_on_start(dp->plat_data);
>  
>  	phy_power_on(dp->phy);
>  
> @@ -1278,6 +1278,9 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>  		goto out_dp_init;
>  	}
>  
> +	if (dp->plat_data->power_on_end)
> +		dp->plat_data->power_on_end(dp->plat_data);
> +
>  	enable_irq(dp->irq);
>  	return 0;
>  
> diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
> index 1ef0be338b85..6b79c3b3802f 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp.c
> @@ -168,7 +168,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data)
>  	dp->drm_dev = drm_dev;
>  
>  	dp->plat_data.dev_type = EXYNOS_DP;
> -	dp->plat_data.power_on = exynos_dp_poweron;
> +	dp->plat_data.power_on_start = exynos_dp_poweron;
>  	dp->plat_data.power_off = exynos_dp_poweroff;
>  	dp->plat_data.attach = exynos_dp_bridge_attach;
>  	dp->plat_data.get_modes = exynos_dp_get_modes;
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 14f68e792e6f..07dd09e1e32f 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -127,7 +127,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
>  	return 0;
>  }
>  
> -static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
> +static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
>  {
>  	struct rockchip_dp_device *dp = to_dp(plat_data);
>  	int ret;
> @@ -145,6 +145,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
>  		return ret;
>  	}
>  
> +	return ret;
> +}
> +
> +static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
> +{
> +	struct rockchip_dp_device *dp = to_dp(plat_data);
> +
>  	return rockchip_drm_psr_activate(&dp->encoder);
>  }
>  
> @@ -399,7 +406,8 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
>  	dp->plat_data.encoder = &dp->encoder;
>  
>  	dp->plat_data.dev_type = dp->data->chip_type;
> -	dp->plat_data.power_on = rockchip_dp_poweron;
> +	dp->plat_data.power_on_start = rockchip_dp_poweron_start;
> +	dp->plat_data.power_on_end = rockchip_dp_poweron_end;
>  	dp->plat_data.power_off = rockchip_dp_powerdown;
>  	dp->plat_data.get_modes = rockchip_dp_get_modes;
>  	dp->plat_data.cleanup = rockchip_dp_cleanup;
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index c079ca1ffc76..1049ee56ae76 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -30,7 +30,8 @@ struct analogix_dp_plat_data {
>  	struct drm_encoder *encoder;
>  	struct drm_connector *connector;
>  
> -	int (*power_on)(struct analogix_dp_plat_data *);
> +	int (*power_on_start)(struct analogix_dp_plat_data *);
> +	int (*power_on_end)(struct analogix_dp_plat_data *);
>  	int (*power_off)(struct analogix_dp_plat_data *);
>  	int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
>  		      struct drm_connector *);

Re: [PATCH 40/41] drm/bridge: analogix_dp: Properly log AUX CH errors

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Douglas Anderson <dianders@chromium.org>
>
> The code in analogix_dp_transfer() that was supposed to print out:
>   AUX CH error happened
>
> Was actually dead code. That's because the previous check (whether
> the interrupt status indicated any errors) would have hit for all
> errors anyway.
>
> Let's combine the two error checks so we can actually see AUX CH
> errors.  We'll also downgrade the message to a warning since some of
> these types of errors might be expected for some displays.  If this
> gets too noisy we can downgrade again to debug.
>
> Cc: 征增 王 <wzz@rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej

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Re: [PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

[Andrzej Hajda]

On 10.03.2017 05:32, Sean Paul wrote:
> From: Douglas Anderson <dianders@chromium.org>
>
> The comments in analogix_dp_init_aux() claim that we're disabling aux
> channel retries, but then right below it for Rockchip it sets them to
> 3.  If we actually need 3 retries for Rockchip then we could adjust
> the comment, but it seems more likely that we want the same retry
> behavior across all platforms.
>
> Cc: Stéphane Marchesin <marcheu@chromium.org>
> Cc: 征增 王 <wzz@rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 29d130222636..57dd1991d7de 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -480,15 +480,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
>  
>  	analogix_dp_reset_aux(dp);
>  
> -	/* Disable AUX transaction H/W retry */
> +	/* AUX_BIT_PERIOD_EXPECTED_DELAY doesn't apply to Rockchip IP */
>  	if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> -		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
> -		      AUX_HW_RETRY_COUNT_SEL(3) |
> -		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> +		reg = 0;
>  	else
> -		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
> -		      AUX_HW_RETRY_COUNT_SEL(0) |
> -		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> +		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3);
> +
> +	/* Disable AUX transaction H/W retry */
> +	reg |= AUX_HW_RETRY_COUNT_SEL(0) |
> +	       AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> +

As I understand you want to disable H/W retry for all. What is the point
in setting retry interval then?
Was it tested on other analogix users (exynos), I mean this patch and
whole patchset?

Regards
Andrzej

>  	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
>  
>  	/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */


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Re: [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

On Wed, Mar 22, 2017 at 09:36:34AM +0100, Andrzej Hajda wrote:
> On 21.03.2017 20:58, Sean Paul wrote:
> > On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
> >> On 10.03.2017 05:32, Sean Paul wrote:
> >>> From: zain wang <wzz@rock-chips.com>
> >>>
> >>> There is a race between AUX CH bring-up and enabling bridge which will
> >>> cause link training to fail. To avoid hitting it, don't change psr state
> >>> while enabling the bridge.
> >>>
> >>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> >>> Cc: Sean Paul <seanpaul@chromium.org>
> >>> Signed-off-by: zain wang <wzz@rock-chips.com>
> >>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> >>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> >>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> >> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
> >> see functional change, or am I blind?
> > The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
> > trying to enable psr when the bridge is disabled (that's why psr_enable is
> > reset).
> 
> Copy/paste from analogix_dp_commit chunk below:
> 
> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> -	if (dp->psr_support)
> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> +	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);
> 
> 
> What is added here?

I guess this is what I get for skimming, apologies. I'll hopefully do a better
job explaining below.


> 
> Regards
> Andrzej
> 
> >
> > Sean
> >
> >> Regards
> >> Andrzej
> >>
> >>> ---
> >>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
> >>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
> >>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
> >>>  include/drm/bridge/analogix_dp.h                   |  2 +-
> >>>  4 files changed, 11 insertions(+), 10 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> index 8a8f05fe9da3..64d94a34874d 100644
> >>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
> >>>  	return 0;
> >>>  }
> >>>  
> >>> -int analogix_dp_psr_supported(struct device *dev)
> >>> +int analogix_dp_psr_enabled(struct device *dev)
> >>>  {
> >>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >>>  
> >>> -	return dp->psr_support;
> >>> +	return dp->psr_enable;
> >>>  }
> >>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> >>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
> >>>  
> >>>  int analogix_dp_enable_psr(struct device *dev)
> >>>  {
> >>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >>>  	struct edp_vsc_psr psr_vsc;
> >>>  
> >>> -	if (!dp->psr_support)
> >>> +	if (!dp->psr_enable)

This gates enabling psr on the panel. Previously it was put in place to avoid
trying to enable psr on devices which did not support it.

> >>>  		return 0;
> >>>  
> >>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> >>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
> >>>  	struct edp_vsc_psr psr_vsc;
> >>>  	int ret;
> >>>  
> >>> -	if (!dp->psr_support)
> >>> +	if (!dp->psr_enable)
> >>>  		return 0;
> >>>  
> >>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> >>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> >>>  	/* Enable video */
> >>>  	analogix_dp_start_video(dp);
> >>>  
> >>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> >>> -	if (dp->psr_support)
> >>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> >>> +	if (dp->psr_enable)

This probes the hardware to see if psr is supported. If it is, psr_enable will
transition to true. Before this patch, psr_support/psr_enable would be flipped
true on the first modeset and stay that way forever, even when the panel was
turned off.

> >>>  		analogix_dp_enable_sink_psr(dp);
> >>>  }
> >>>  
> >>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> >>>  	if (ret)
> >>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
> >>>  
> >>> +	dp->psr_enable = false;

By setting psr_enable to false here, the driver ensures that any subsequent calls
to analogix_dp_enable_psr() will return early and will not attempt to change
hardware (that would fail). Once the panel is re-enabled, psr_enable will return
to true if the hardware supports it.

This is why the variable was renamed from psr_support to psr_enable. It no
longer just tracks whether psr is supported, but rather that it is supported and
eligible to be enabled.

Sean


> >>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
> >>>  }
> >>>  
> >>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> index b039b28d8fcc..e135a42cb19e 100644
> >>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
> >>>  	int			dpms_mode;
> >>>  	int			hpd_gpio;
> >>>  	bool                    force_hpd;
> >>> -	bool			psr_support;
> >>> +	bool			psr_enable;
> >>>  
> >>>  	struct mutex		panel_lock;
> >>>  	bool			panel_is_modeset;
> >>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> index 64e7e2c0bc58..f44756029478 100644
> >>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
> >>>  	int vact_end;
> >>>  	int ret;
> >>>  
> >>> -	if (!analogix_dp_psr_supported(dp->dev))
> >>> +	if (!analogix_dp_psr_enabled(dp->dev))
> >>>  		return;
> >>>  
> >>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> >>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> >>> index c99d6eaef1ac..4fc0165ed3f5 100644
> >>> --- a/include/drm/bridge/analogix_dp.h
> >>> +++ b/include/drm/bridge/analogix_dp.h
> >>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
> >>>  			 struct drm_connector *);
> >>>  };
> >>>  
> >>> -int analogix_dp_psr_supported(struct device *dev);
> >>> +int analogix_dp_psr_enabled(struct device *dev);
> >>>  int analogix_dp_enable_psr(struct device *dev);
> >>>  int analogix_dp_disable_psr(struct device *dev);
> >>>  
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Sean Paul]

On Wed, Mar 22, 2017 at 09:36:34AM +0100, Andrzej Hajda wrote:
> On 21.03.2017 20:58, Sean Paul wrote:
> > On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
> >> On 10.03.2017 05:32, Sean Paul wrote:
> >>> From: zain wang <wzz@rock-chips.com>
> >>>
> >>> There is a race between AUX CH bring-up and enabling bridge which will
> >>> cause link training to fail. To avoid hitting it, don't change psr state
> >>> while enabling the bridge.
> >>>
> >>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> >>> Cc: Sean Paul <seanpaul@chromium.org>
> >>> Signed-off-by: zain wang <wzz@rock-chips.com>
> >>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> >>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
> >>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> >> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
> >> see functional change, or am I blind?
> > The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
> > trying to enable psr when the bridge is disabled (that's why psr_enable is
> > reset).
> 
> Copy/paste from analogix_dp_commit chunk below:
> 
> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> -	if (dp->psr_support)
> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> +	if (dp->psr_enable)
>  		analogix_dp_enable_sink_psr(dp);
> 
> 
> What is added here?

I guess this is what I get for skimming, apologies. I'll hopefully do a better
job explaining below.


> 
> Regards
> Andrzej
> 
> >
> > Sean
> >
> >> Regards
> >> Andrzej
> >>
> >>> ---
> >>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
> >>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
> >>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
> >>>  include/drm/bridge/analogix_dp.h                   |  2 +-
> >>>  4 files changed, 11 insertions(+), 10 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> index 8a8f05fe9da3..64d94a34874d 100644
> >>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> >>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
> >>>  	return 0;
> >>>  }
> >>>  
> >>> -int analogix_dp_psr_supported(struct device *dev)
> >>> +int analogix_dp_psr_enabled(struct device *dev)
> >>>  {
> >>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >>>  
> >>> -	return dp->psr_support;
> >>> +	return dp->psr_enable;
> >>>  }
> >>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
> >>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
> >>>  
> >>>  int analogix_dp_enable_psr(struct device *dev)
> >>>  {
> >>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
> >>>  	struct edp_vsc_psr psr_vsc;
> >>>  
> >>> -	if (!dp->psr_support)
> >>> +	if (!dp->psr_enable)

This gates enabling psr on the panel. Previously it was put in place to avoid
trying to enable psr on devices which did not support it.

> >>>  		return 0;
> >>>  
> >>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> >>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
> >>>  	struct edp_vsc_psr psr_vsc;
> >>>  	int ret;
> >>>  
> >>> -	if (!dp->psr_support)
> >>> +	if (!dp->psr_enable)
> >>>  		return 0;
> >>>  
> >>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
> >>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
> >>>  	/* Enable video */
> >>>  	analogix_dp_start_video(dp);
> >>>  
> >>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
> >>> -	if (dp->psr_support)
> >>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
> >>> +	if (dp->psr_enable)

This probes the hardware to see if psr is supported. If it is, psr_enable will
transition to true. Before this patch, psr_support/psr_enable would be flipped
true on the first modeset and stay that way forever, even when the panel was
turned off.

> >>>  		analogix_dp_enable_sink_psr(dp);
> >>>  }
> >>>  
> >>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
> >>>  	if (ret)
> >>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
> >>>  
> >>> +	dp->psr_enable = false;

By setting psr_enable to false here, the driver ensures that any subsequent calls
to analogix_dp_enable_psr() will return early and will not attempt to change
hardware (that would fail). Once the panel is re-enabled, psr_enable will return
to true if the hardware supports it.

This is why the variable was renamed from psr_support to psr_enable. It no
longer just tracks whether psr is supported, but rather that it is supported and
eligible to be enabled.

Sean


> >>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
> >>>  }
> >>>  
> >>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> index b039b28d8fcc..e135a42cb19e 100644
> >>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> >>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
> >>>  	int			dpms_mode;
> >>>  	int			hpd_gpio;
> >>>  	bool                    force_hpd;
> >>> -	bool			psr_support;
> >>> +	bool			psr_enable;
> >>>  
> >>>  	struct mutex		panel_lock;
> >>>  	bool			panel_is_modeset;
> >>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> index 64e7e2c0bc58..f44756029478 100644
> >>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> >>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
> >>>  	int vact_end;
> >>>  	int ret;
> >>>  
> >>> -	if (!analogix_dp_psr_supported(dp->dev))
> >>> +	if (!analogix_dp_psr_enabled(dp->dev))
> >>>  		return;
> >>>  
> >>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
> >>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> >>> index c99d6eaef1ac..4fc0165ed3f5 100644
> >>> --- a/include/drm/bridge/analogix_dp.h
> >>> +++ b/include/drm/bridge/analogix_dp.h
> >>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
> >>>  			 struct drm_connector *);
> >>>  };
> >>>  
> >>> -int analogix_dp_psr_supported(struct device *dev);
> >>> +int analogix_dp_psr_enabled(struct device *dev);
> >>>  int analogix_dp_enable_psr(struct device *dev);
> >>>  int analogix_dp_disable_psr(struct device *dev);
> >>>  
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS

Re: [PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

[Doug Anderson]

Hi,

On Wed, Mar 22, 2017 at 3:57 AM, Andrzej Hajda <a.hajda@samsung.com> wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
>> From: Douglas Anderson <dianders@chromium.org>
>>
>> The comments in analogix_dp_init_aux() claim that we're disabling aux
>> channel retries, but then right below it for Rockchip it sets them to
>> 3.  If we actually need 3 retries for Rockchip then we could adjust
>> the comment, but it seems more likely that we want the same retry
>> behavior across all platforms.
>>
>> Cc: Stéphane Marchesin <marcheu@chromium.org>
>> Cc: 征增 王 <wzz@rock-chips.com>
>> Signed-off-by: Douglas Anderson <dianders@chromium.org>
>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>> ---
>>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 ++++++++-------
>>  1 file changed, 8 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> index 29d130222636..57dd1991d7de 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> @@ -480,15 +480,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
>>
>>       analogix_dp_reset_aux(dp);
>>
>> -     /* Disable AUX transaction H/W retry */
>> +     /* AUX_BIT_PERIOD_EXPECTED_DELAY doesn't apply to Rockchip IP */
>>       if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
>> -             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
>> -                   AUX_HW_RETRY_COUNT_SEL(3) |
>> -                   AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>> +             reg = 0;
>>       else
>> -             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
>> -                   AUX_HW_RETRY_COUNT_SEL(0) |
>> -                   AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>> +             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3);
>> +
>> +     /* Disable AUX transaction H/W retry */
>> +     reg |= AUX_HW_RETRY_COUNT_SEL(0) |
>> +            AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>> +
>
> As I understand you want to disable H/W retry for all.

Basically I'm trying to make the code match the comments, which it
didn't before.

On the exynos side, it's very clear that we should disable retries.
The docs say "it is advisable to set this bit field to 0 because
hardware retry will be valid only when DP Rx does not send any reply."

On Rockchip, I don't see that in the docs.  However:

* Since the root IP block is the same/similar, presumably it suffers
the same issues.  It is plausible that the Rockchip IP block is newer
and can somehow be made to use the HW retries, but I don't actually
know that.

* Presumably elsewhere in the driver we are already assuming that the
HW retries aren't there and we're doing the work to retry things in
software.  I don't see any special cases for Rockchip there saying
something like "on Rockchip, we enable HW retries, so bypass SW
retries".

> What is the point
> in setting retry interval then?

Probably nothing, but the old exynos code it used to do this.  Note
that 600 us is actually 0, so we could certainly skip it.

> Was it tested on other analogix users (exynos), I mean this patch and
> whole patchset?

Unless I messed up, this particular patch isn't supposed to change
anything for exynos.

For the whole patch series, it's probably worthwhile to add Javier to
the series (CCed here).  In the past he has been helpful in getting
things tested on exynos-based boards.

-Doug
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Re: [PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 22.03.2017 16:19, Sean Paul wrote:
> On Wed, Mar 22, 2017 at 09:36:34AM +0100, Andrzej Hajda wrote:
>> On 21.03.2017 20:58, Sean Paul wrote:
>>> On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
>>>> On 10.03.2017 05:32, Sean Paul wrote:
>>>>> From: zain wang <wzz@rock-chips.com>
>>>>>
>>>>> There is a race between AUX CH bring-up and enabling bridge which will
>>>>> cause link training to fail. To avoid hitting it, don't change psr state
>>>>> while enabling the bridge.
>>>>>
>>>>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>>> Cc: Sean Paul <seanpaul@chromium.org>
>>>>> Signed-off-by: zain wang <wzz@rock-chips.com>
>>>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>>>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
>>>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>>>> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
>>>> see functional change, or am I blind?
>>> The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
>>> trying to enable psr when the bridge is disabled (that's why psr_enable is
>>> reset).
>> Copy/paste from analogix_dp_commit chunk below:
>>
>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>> -	if (dp->psr_support)
>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>> +	if (dp->psr_enable)
>>  		analogix_dp_enable_sink_psr(dp);
>>
>>
>> What is added here?
> I guess this is what I get for skimming, apologies. I'll hopefully do a better
> job explaining below.
>
>
>> Regards
>> Andrzej
>>
>>> Sean
>>>
>>>> Regards
>>>> Andrzej
>>>>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>>>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>>>>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>>>>>  include/drm/bridge/analogix_dp.h                   |  2 +-
>>>>>  4 files changed, 11 insertions(+), 10 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> index 8a8f05fe9da3..64d94a34874d 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>>>>>  	return 0;
>>>>>  }
>>>>>  
>>>>> -int analogix_dp_psr_supported(struct device *dev)
>>>>> +int analogix_dp_psr_enabled(struct device *dev)
>>>>>  {
>>>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>>>  
>>>>> -	return dp->psr_support;
>>>>> +	return dp->psr_enable;
>>>>>  }
>>>>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
>>>>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>>>>>  
>>>>>  int analogix_dp_enable_psr(struct device *dev)
>>>>>  {
>>>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>>>  	struct edp_vsc_psr psr_vsc;
>>>>>  
>>>>> -	if (!dp->psr_support)
>>>>> +	if (!dp->psr_enable)
> This gates enabling psr on the panel. Previously it was put in place to avoid
> trying to enable psr on devices which did not support it.
>
>>>>>  		return 0;
>>>>>  
>>>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>>>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>>>>>  	struct edp_vsc_psr psr_vsc;
>>>>>  	int ret;
>>>>>  
>>>>> -	if (!dp->psr_support)
>>>>> +	if (!dp->psr_enable)
>>>>>  		return 0;
>>>>>  
>>>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>>>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>>>>>  	/* Enable video */
>>>>>  	analogix_dp_start_video(dp);
>>>>>  
>>>>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>>>>> -	if (dp->psr_support)
>>>>> +	dp->psr_enable = analogix_dp_detect_si1]nk_psr(dp);
>>>>> +	if (dp->psr_enable)
> This probes the hardware to see if psr is supported. If it is, psr_enable will
> transition to true. Before this patch, psr_support/psr_enable would be flipped
> true on the first modeset and stay that way forever, even when the panel was
> turned off.

But here and above we have still only renaming, no functional change.


>
>>>>>  		analogix_dp_enable_sink_psr(dp);
>>>>>  }
>>>>>  
>>>>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>>>>>  	if (ret)
>>>>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>>>>>  
>>>>> +	dp->psr_enable = false;
> By setting psr_enable to false here, the driver ensures that any subsequent calls
> to analogix_dp_enable_psr() will return early and will not attempt to change
> hardware (that would fail). Once the panel is re-enabled, psr_enable will return
> to true if the hardware supports it.
>
> This is why the variable was renamed from psr_support to psr_enable. It no
> longer just tracks whether psr is supported, but rather that it is supported and
> eligible to be enabled.

OK so the patch does actually two things:
- renaming psr_support* -> psr_enable*
- reset psr_enable on bridge disable.

Renaming obscures the patch and hides functional change, so please say
about real change in description.
And regarding description, it does not seem adequate to the patch, do we
really have race here? Or as subject says we prevent touching psr on
disabled bridge.

Regards
Andrzej



>
> Sean
>
>
>>>>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>>>>>  }
>>>>>  
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> index b039b28d8fcc..e135a42cb19e 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>>>>>  	int			dpms_mode;
>>>>>  	int			hpd_gpio;
>>>>>  	bool                    force_hpd;
>>>>> -	bool			psr_support;
>>>>> +	bool			psr_enable;
>>>>>  
>>>>>  	struct mutex		panel_lock;
>>>>>  	bool			panel_is_modeset;
>>>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> index 64e7e2c0bc58..f44756029478 100644
>>>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>>>>>  	int vact_end;
>>>>>  	int ret;
>>>>>  
>>>>> -	if (!analogix_dp_psr_supported(dp->dev))
>>>>> +	if (!analogix_dp_psr_enabled(dp->dev))
>>>>>  		return;
>>>>>  
>>>>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
>>>>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>>>>> index c99d6eaef1ac..4fc0165ed3f5 100644
>>>>> --- a/include/drm/bridge/analogix_dp.h
>>>>> +++ b/include/drm/bridge/analogix_dp.h
>>>>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>>>>>  			 struct drm_connector *);
>>>>>  };
>>>>>  
>>>>> -int analogix_dp_psr_supported(struct device *dev);
>>>>> +int analogix_dp_psr_enabled(struct device *dev);
>>>>>  int analogix_dp_enable_psr(struct device *dev);
>>>>>  int analogix_dp_disable_psr(struct device *dev);
>>>>>  


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[PATCH 10/41] drm/bridge: analogix_dp: Don't change psr while bridge is disabled

[Andrzej Hajda]

On 22.03.2017 16:19, Sean Paul wrote:
> On Wed, Mar 22, 2017 at 09:36:34AM +0100, Andrzej Hajda wrote:
>> On 21.03.2017 20:58, Sean Paul wrote:
>>> On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
>>>> On 10.03.2017 05:32, Sean Paul wrote:
>>>>> From: zain wang <wzz@rock-chips.com>
>>>>>
>>>>> There is a race between AUX CH bring-up and enabling bridge which will
>>>>> cause link training to fail. To avoid hitting it, don't change psr state
>>>>> while enabling the bridge.
>>>>>
>>>>> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>>>>> Cc: Sean Paul <seanpaul@chromium.org>
>>>>> Signed-off-by: zain wang <wzz@rock-chips.com>
>>>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>>>> [seanpaul fixed up the commit message a bit and renamed *_supported to *_enabled]
>>>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>>>> Hmm, beside resetting psr_enable in analogix_dp_bridge_disable I do not
>>>> see functional change, or am I blind?
>>> The patch also adds a check of psr_enable in analogix_dp_commit. This will avoid
>>> trying to enable psr when the bridge is disabled (that's why psr_enable is
>>> reset).
>> Copy/paste from analogix_dp_commit chunk below:
>>
>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>> -	if (dp->psr_support)
>> +	dp->psr_enable = analogix_dp_detect_sink_psr(dp);
>> +	if (dp->psr_enable)
>>  		analogix_dp_enable_sink_psr(dp);
>>
>>
>> What is added here?
> I guess this is what I get for skimming, apologies. I'll hopefully do a better
> job explaining below.
>
>
>> Regards
>> Andrzej
>>
>>> Sean
>>>
>>>> Regards
>>>> Andrzej
>>>>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 ++++++++-------
>>>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 +-
>>>>>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  2 +-
>>>>>  include/drm/bridge/analogix_dp.h                   |  2 +-
>>>>>  4 files changed, 11 insertions(+), 10 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> index 8a8f05fe9da3..64d94a34874d 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>>>>> @@ -98,20 +98,20 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
>>>>>  	return 0;
>>>>>  }
>>>>>  
>>>>> -int analogix_dp_psr_supported(struct device *dev)
>>>>> +int analogix_dp_psr_enabled(struct device *dev)
>>>>>  {
>>>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>>>  
>>>>> -	return dp->psr_support;
>>>>> +	return dp->psr_enable;
>>>>>  }
>>>>> -EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
>>>>> +EXPORT_SYMBOL_GPL(analogix_dp_psr_enabled);
>>>>>  
>>>>>  int analogix_dp_enable_psr(struct device *dev)
>>>>>  {
>>>>>  	struct analogix_dp_device *dp = dev_get_drvdata(dev);
>>>>>  	struct edp_vsc_psr psr_vsc;
>>>>>  
>>>>> -	if (!dp->psr_support)
>>>>> +	if (!dp->psr_enable)
> This gates enabling psr on the panel. Previously it was put in place to avoid
> trying to enable psr on devices which did not support it.
>
>>>>>  		return 0;
>>>>>  
>>>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>>>> @@ -134,7 +134,7 @@ int analogix_dp_disable_psr(struct device *dev)
>>>>>  	struct edp_vsc_psr psr_vsc;
>>>>>  	int ret;
>>>>>  
>>>>> -	if (!dp->psr_support)
>>>>> +	if (!dp->psr_enable)
>>>>>  		return 0;
>>>>>  
>>>>>  	/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
>>>>> @@ -878,8 +878,8 @@ static void analogix_dp_commit(struct analogix_dp_device *dp)
>>>>>  	/* Enable video */
>>>>>  	analogix_dp_start_video(dp);
>>>>>  
>>>>> -	dp->psr_support = analogix_dp_detect_sink_psr(dp);
>>>>> -	if (dp->psr_support)
>>>>> +	dp->psr_enable = analogix_dp_detect_si1]nk_psr(dp);
>>>>> +	if (dp->psr_enable)
> This probes the hardware to see if psr is supported. If it is, psr_enable will
> transition to true. Before this patch, psr_support/psr_enable would be flipped
> true on the first modeset and stay that way forever, even when the panel was
> turned off.

But here and above we have still only renaming, no functional change.


>
>>>>>  		analogix_dp_enable_sink_psr(dp);
>>>>>  }
>>>>>  
>>>>> @@ -1120,6 +1120,7 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>>>>>  	if (ret)
>>>>>  		DRM_ERROR("failed to setup the panel ret = %d\n", ret);
>>>>>  
>>>>> +	dp->psr_enable = false;
> By setting psr_enable to false here, the driver ensures that any subsequent calls
> to analogix_dp_enable_psr() will return early and will not attempt to change
> hardware (that would fail). Once the panel is re-enabled, psr_enable will return
> to true if the hardware supports it.
>
> This is why the variable was renamed from psr_support to psr_enable. It no
> longer just tracks whether psr is supported, but rather that it is supported and
> eligible to be enabled.

OK so the patch does actually two things:
- renaming psr_support* -> psr_enable*
- reset psr_enable on bridge disable.

Renaming obscures the patch and hides functional change, so please say
about real change in description.
And regarding description, it does not seem adequate to the patch, do we
really have race here? Or as subject says we prevent touching psr on
disabled bridge.

Regards
Andrzej



>
> Sean
>
>
>>>>>  	dp->dpms_mode = DRM_MODE_DPMS_OFF;
>>>>>  }
>>>>>  
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> index b039b28d8fcc..e135a42cb19e 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>>>>> @@ -170,7 +170,7 @@ struct analogix_dp_device {
>>>>>  	int			dpms_mode;
>>>>>  	int			hpd_gpio;
>>>>>  	bool                    force_hpd;
>>>>> -	bool			psr_support;
>>>>> +	bool			psr_enable;
>>>>>  
>>>>>  	struct mutex		panel_lock;
>>>>>  	bool			panel_is_modeset;
>>>>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> index 64e7e2c0bc58..f44756029478 100644
>>>>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>>>>> @@ -83,7 +83,7 @@ static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
>>>>>  	int vact_end;
>>>>>  	int ret;
>>>>>  
>>>>> -	if (!analogix_dp_psr_supported(dp->dev))
>>>>> +	if (!analogix_dp_psr_enabled(dp->dev))
>>>>>  		return;
>>>>>  
>>>>>  	dev_dbg(dp->dev, "%s PSR...\n", enabled ? "enable" : "disable");
>>>>> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
>>>>> index c99d6eaef1ac..4fc0165ed3f5 100644
>>>>> --- a/include/drm/bridge/analogix_dp.h
>>>>> +++ b/include/drm/bridge/analogix_dp.h
>>>>> @@ -38,7 +38,7 @@ struct analogix_dp_plat_data {
>>>>>  			 struct drm_connector *);
>>>>>  };
>>>>>  
>>>>> -int analogix_dp_psr_supported(struct device *dev);
>>>>> +int analogix_dp_psr_enabled(struct device *dev);
>>>>>  int analogix_dp_enable_psr(struct device *dev);
>>>>>  int analogix_dp_disable_psr(struct device *dev);
>>>>>  

Re: [PATCH 41/41] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip

[Javier Martinez Canillas]

Hello Doug,

On 03/22/2017 12:59 PM, Doug Anderson wrote:
> Hi,
> 
> On Wed, Mar 22, 2017 at 3:57 AM, Andrzej Hajda <a.hajda@samsung.com> wrote:
>> On 10.03.2017 05:32, Sean Paul wrote:
>>> From: Douglas Anderson <dianders@chromium.org>
>>>
>>> The comments in analogix_dp_init_aux() claim that we're disabling aux
>>> channel retries, but then right below it for Rockchip it sets them to
>>> 3.  If we actually need 3 retries for Rockchip then we could adjust
>>> the comment, but it seems more likely that we want the same retry
>>> behavior across all platforms.
>>>
>>> Cc: Stéphane Marchesin <marcheu@chromium.org>
>>> Cc: 征增 王 <wzz@rock-chips.com>
>>> Signed-off-by: Douglas Anderson <dianders@chromium.org>
>>> Signed-off-by: Sean Paul <seanpaul@chromium.org>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 ++++++++-------
>>>  1 file changed, 8 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> index 29d130222636..57dd1991d7de 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> @@ -480,15 +480,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
>>>
>>>       analogix_dp_reset_aux(dp);
>>>
>>> -     /* Disable AUX transaction H/W retry */
>>> +     /* AUX_BIT_PERIOD_EXPECTED_DELAY doesn't apply to Rockchip IP */
>>>       if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
>>> -             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
>>> -                   AUX_HW_RETRY_COUNT_SEL(3) |
>>> -                   AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>>> +             reg = 0;
>>>       else
>>> -             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
>>> -                   AUX_HW_RETRY_COUNT_SEL(0) |
>>> -                   AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>>> +             reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3);
>>> +
>>> +     /* Disable AUX transaction H/W retry */
>>> +     reg |= AUX_HW_RETRY_COUNT_SEL(0) |
>>> +            AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
>>> +
>>
>> As I understand you want to disable H/W retry for all.
> 
> Basically I'm trying to make the code match the comments, which it
> didn't before.
> 
> On the exynos side, it's very clear that we should disable retries.
> The docs say "it is advisable to set this bit field to 0 because
> hardware retry will be valid only when DP Rx does not send any reply."
> 
> On Rockchip, I don't see that in the docs.  However:
> 
> * Since the root IP block is the same/similar, presumably it suffers
> the same issues.  It is plausible that the Rockchip IP block is newer
> and can somehow be made to use the HW retries, but I don't actually
> know that.
> 
> * Presumably elsewhere in the driver we are already assuming that the
> HW retries aren't there and we're doing the work to retry things in
> software.  I don't see any special cases for Rockchip there saying
> something like "on Rockchip, we enable HW retries, so bypass SW
> retries".
> 
>> What is the point
>> in setting retry interval then?
> 
> Probably nothing, but the old exynos code it used to do this.  Note
> that 600 us is actually 0, so we could certainly skip it.
> 
>> Was it tested on other analogix users (exynos), I mean this patch and
>> whole patchset?
> 
> Unless I messed up, this particular patch isn't supposed to change
> anything for exynos.
> 
> For the whole patch series, it's probably worthwhile to add Javier to
> the series (CCed here).  In the past he has been helpful in getting
> things tested on exynos-based boards.
>

I finally had time to test the patch series this morning (sorry for the delay)
on an Exynos5800 Peach Pi Chromebook.

The display works but the series breaks DPMS. The machine hangs if I do this:

$ echo 1 > /sys/devices/platform/exynos-drm/graphics/fb0/blank

I don't have a serial console attached to the machine so I can't see what's
happening but doing git bisect I found that the regression is introduced by:

[PATCH 21/41] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel

The problem is that this patch calls analogix_dp_set_analog_power_down() but
it does so after the PHY was disabled with phy_power_off().

So the following diff on top of the patch series makes things to work again:

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index bc9a0a28ab1d..b480946b647c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1336,8 +1336,8 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
 	if (dp->plat_data->power_off)
 		dp->plat_data->power_off(dp->plat_data);
 
-	phy_power_off(dp->phy);
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
+	phy_power_off(dp->phy);
 
 	clk_disable_unprepare(dp->clock);

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 02/41] drm/rockchip: Get rid of some unnecessary code

[Heiko Stuebner]

Am Donnerstag, 9. März 2017, 23:32:17 CET schrieb Sean Paul:
> From: Tomasz Figa <tfiga@chromium.org>
> 
> Current code implements prepare_fb and cleanup_fb callbacks only to
> grab/release fb references, which is already done by atomic framework
> when creating/destryoing plane state. Also there are some unused fields
> vop and vop_win structs. Let's remove these unused bits.
> 
> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

There seems to be a slight discrepancy between patch message and code.
The commit message talks about *_fb-callbacks, while the patch removes
a seemingly unsused mutex, which I guess falls under the "some unused fields"
part.

In any case, I didn't see any ill effects when testing this patch, so
Tested-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> index 2151e1cee4b4..0539afb6b7c8 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -108,9 +108,6 @@ struct vop {
>  	struct drm_device *drm_dev;
>  	bool is_enabled;
>  
> -	/* mutex vsync_ work */
> -	struct mutex vsync_mutex;
> -	bool vsync_work_pending;
>  	struct completion dsp_hold_completion;
>  
>  	/* protected by dev->event_lock */
> @@ -1592,8 +1589,6 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
>  	spin_lock_init(&vop->reg_lock);
>  	spin_lock_init(&vop->irq_lock);
>  
> -	mutex_init(&vop->vsync_mutex);
> -
>  	ret = devm_request_irq(dev, vop->irq, vop_isr,
>  			       IRQF_SHARED, dev_name(dev), vop);
>  	if (ret)
> 


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[PATCH 02/41] drm/rockchip: Get rid of some unnecessary code

[Heiko Stuebner]

Am Donnerstag, 9. M?rz 2017, 23:32:17 CET schrieb Sean Paul:
> From: Tomasz Figa <tfiga@chromium.org>
> 
> Current code implements prepare_fb and cleanup_fb callbacks only to
> grab/release fb references, which is already done by atomic framework
> when creating/destryoing plane state. Also there are some unused fields
> vop and vop_win structs. Let's remove these unused bits.
> 
> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

There seems to be a slight discrepancy between patch message and code.
The commit message talks about *_fb-callbacks, while the patch removes
a seemingly unsused mutex, which I guess falls under the "some unused fields"
part.

In any case, I didn't see any ill effects when testing this patch, so
Tested-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> index 2151e1cee4b4..0539afb6b7c8 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -108,9 +108,6 @@ struct vop {
>  	struct drm_device *drm_dev;
>  	bool is_enabled;
>  
> -	/* mutex vsync_ work */
> -	struct mutex vsync_mutex;
> -	bool vsync_work_pending;
>  	struct completion dsp_hold_completion;
>  
>  	/* protected by dev->event_lock */
> @@ -1592,8 +1589,6 @@ static int vop_bind(struct device *dev, struct device *master, void *data)
>  	spin_lock_init(&vop->reg_lock);
>  	spin_lock_init(&vop->irq_lock);
>  
> -	mutex_init(&vop->vsync_mutex);
> -
>  	ret = devm_request_irq(dev, vop->irq, vop_isr,
>  			       IRQF_SHARED, dev_name(dev), vop);
>  	if (ret)
> 

Re: [PATCH 03/41] drm/rockchip: support prime import sg table

[Heiko Stuebner]

Am Donnerstag, 9. März 2017, 23:32:18 CET schrieb Sean Paul:
> From: Haixia Shi <hshi@chromium.org>
> 
> The prime fd to handle ioctl was not used with rockchip before. Support
> was added in order to pass graphics_Gbm and to support potential uses
> within Chrome OS (e.g. zero-copy video decode, camera).
> 
> Signed-off-by: Haixia Shi <hshi@chromium.org>

missing a further Signed-off from Sean Paul as the sender.

I've tested this on the rk3328 together with the wip Lima driver and my wip
Mesa Rockchip Pipe and the kmscube improved from a failure about importing
the buffer to producing actual output, so

Tested-by: Heiko Stuebner <heiko@sntech.de>

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[PATCH 03/41] drm/rockchip: support prime import sg table

[Heiko Stuebner]

Am Donnerstag, 9. M?rz 2017, 23:32:18 CET schrieb Sean Paul:
> From: Haixia Shi <hshi@chromium.org>
> 
> The prime fd to handle ioctl was not used with rockchip before. Support
> was added in order to pass graphics_Gbm and to support potential uses
> within Chrome OS (e.g. zero-copy video decode, camera).
> 
> Signed-off-by: Haixia Shi <hshi@chromium.org>

missing a further Signed-off from Sean Paul as the sender.

I've tested this on the rk3328 together with the wip Lima driver and my wip
Mesa Rockchip Pipe and the kmscube improved from a failure about importing
the buffer to producing actual output, so

Tested-by: Heiko Stuebner <heiko@sntech.de>

Re: [PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls

[Heiko Stuebner]

Hi,

Am Donnerstag, 9. März 2017, 23:32:19 CET schrieb Sean Paul:
> From: Ørjan Eide <orjan.eide@arm.com>
> 
> When mapping external DMA-bufs through the PRIME mmap call, we might be
> given an offset which has to be respected. However for the internal DRM
> GEM mmap path, we have to ignore the fake mmap offset used to identify
> the buffer only. Currently the code always zeroes out vma->vm_pgoff,
> which breaks the former.
> 
> This patch fixes the problem by moving the vm_pgoff assignment to a
> function that is used only for GEM mmap path, so that the PRIME path
> retains the original offset.
> 
> BUG=chrome-os-partner:56615
> TEST=graphics_GLBench

Unneeded chromeos-cruft.

> Cc: Daniel Kurtz <djkurtz@chromium.org>
> Signed-off-by: Ørjan Eide <orjan.eide@arm.com>
> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

With the same testas patch 3  (rk3328 + lima)
Tested-by: Heiko Stuebner <heiko@sntech.de>
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[PATCH 04/41] drm/rockchip: Respect page offset for PRIME mmap calls

[Heiko Stuebner]

Hi,

Am Donnerstag, 9. M?rz 2017, 23:32:19 CET schrieb Sean Paul:
> From: ?rjan Eide <orjan.eide@arm.com>
> 
> When mapping external DMA-bufs through the PRIME mmap call, we might be
> given an offset which has to be respected. However for the internal DRM
> GEM mmap path, we have to ignore the fake mmap offset used to identify
> the buffer only. Currently the code always zeroes out vma->vm_pgoff,
> which breaks the former.
> 
> This patch fixes the problem by moving the vm_pgoff assignment to a
> function that is used only for GEM mmap path, so that the PRIME path
> retains the original offset.
> 
> BUG=chrome-os-partner:56615
> TEST=graphics_GLBench

Unneeded chromeos-cruft.

> Cc: Daniel Kurtz <djkurtz@chromium.org>
> Signed-off-by: ?rjan Eide <orjan.eide@arm.com>
> Signed-off-by: Tomasz Figa <tfiga@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>

With the same testas patch 3  (rk3328 + lima)
Tested-by: Heiko Stuebner <heiko@sntech.de>