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Mon, 25 Jul 2022 20:32:05 -0700 (PDT) Received: from [10.72.12.201] ([209.132.188.80]) by smtp.gmail.com with ESMTPSA id e5-20020a17090a7c4500b001f001acc0e2sm11954101pjl.41.2022.07.25.20.32.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 25 Jul 2022 20:32:04 -0700 (PDT) Message-ID: <9ee782bb-494a-367e-6b06-261a8ae920db@redhat.com> Date: Tue, 26 Jul 2022 11:31:59 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 06/16] virtio-pci: support queue reset Content-Language: en-US To: Kangjie Xu , qemu-devel@nongnu.org Cc: mst@redhat.com, hengqi@linux.alibaba.com, xuanzhuo@linux.alibaba.com References: From: Jason Wang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=jasowang@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" 在 2022/7/18 19:17, Kangjie Xu 写道: > From: Xuan Zhuo > > PCI devices support vq reset. > > Based on this function, the driver can adjust the size of the ring, and > quickly recycle the buffer in the ring. > > Signed-off-by: Xuan Zhuo > --- > hw/virtio/virtio-pci.c | 16 ++++++++++++++++ > include/hw/virtio/virtio-pci.h | 1 + > 2 files changed, 17 insertions(+) > > diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c > index 45327f0b31..35e8a5101a 100644 > --- a/hw/virtio/virtio-pci.c > +++ b/hw/virtio/virtio-pci.c > @@ -1246,6 +1246,9 @@ static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, > case VIRTIO_PCI_COMMON_Q_USEDHI: > val = proxy->vqs[vdev->queue_sel].used[1]; > break; > + case VIRTIO_PCI_COMMON_Q_RESET: > + val = proxy->vqs[vdev->queue_sel].reset; > + break; > default: > val = 0; > } > @@ -1333,6 +1336,7 @@ static void virtio_pci_common_write(void *opaque, hwaddr addr, > ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | > proxy->vqs[vdev->queue_sel].used[0]); > proxy->vqs[vdev->queue_sel].enabled = 1; > + proxy->vqs[vdev->queue_sel].reset = 0; > } else { > virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val); > } > @@ -1355,6 +1359,17 @@ static void virtio_pci_common_write(void *opaque, hwaddr addr, > case VIRTIO_PCI_COMMON_Q_USEDHI: > proxy->vqs[vdev->queue_sel].used[1] = val; > break; > + case VIRTIO_PCI_COMMON_Q_RESET: > + if (val == 1) { > + proxy->vqs[vdev->queue_sel].reset = 1; > + > + virtio_queue_reset(vdev, vdev->queue_sel); > + > + /* mark reset complete */ The code explain itself, so the comment could be removed. > + proxy->vqs[vdev->queue_sel].reset = 0; > + proxy->vqs[vdev->queue_sel].enabled = 0; > + } > + break; > default: > break; > } > @@ -1950,6 +1965,7 @@ static void virtio_pci_reset(DeviceState *qdev) > > for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { > proxy->vqs[i].enabled = 0; > + proxy->vqs[i].reset = 0; > proxy->vqs[i].num = 0; > proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0; > proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; > diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h > index 2446dcd9ae..e9290e2b94 100644 > --- a/include/hw/virtio/virtio-pci.h > +++ b/include/hw/virtio/virtio-pci.h > @@ -117,6 +117,7 @@ typedef struct VirtIOPCIRegion { > typedef struct VirtIOPCIQueue { > uint16_t num; > bool enabled; > + bool reset; How is this migrated? Thanks > uint32_t desc[2]; > uint32_t avail[2]; > uint32_t used[2];