From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40906C4332F for ; Thu, 9 Sep 2021 01:52:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 25ED4610E8 for ; Thu, 9 Sep 2021 01:52:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349402AbhIIByE (ORCPT ); Wed, 8 Sep 2021 21:54:04 -0400 Received: from pi.codeconstruct.com.au ([203.29.241.158]:55456 "EHLO codeconstruct.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242103AbhIIByD (ORCPT ); Wed, 8 Sep 2021 21:54:03 -0400 Received: from [172.16.66.38] (unknown [49.255.141.98]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 03D262012C; Thu, 9 Sep 2021 09:52:44 +0800 (AWST) Message-ID: <9fa4ae962c185e0e4f07f0299356969c17ae5ea5.camel@codeconstruct.com.au> Subject: Re: [PATCH v4 3/4] soc: aspeed: Add eSPI driver From: Jeremy Kerr To: ChiaWei Wang , "robh+dt@kernel.org" , "joel@jms.id.au" , "andrew@aj.id.au" , "linux-aspeed@lists.ozlabs.org" , "openbmc@lists.ozlabs.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Cc: Morris Mao , Ryan Chen Date: Thu, 09 Sep 2021 09:52:43 +0800 In-Reply-To: References: <20210901033015.910-1-chiawei_wang@aspeedtech.com> <20210901033015.910-4-chiawei_wang@aspeedtech.com> <20c13b9bb023091758cac3a07fb4037b7d796578.camel@codeconstruct.com.au> <513cb05f8d83d08a5c1e491dc0a9b6784195e7dd.camel@codeconstruct.com.au> <6593206c0bc90186f255c6ea86339576576f70dc.camel@codeconstruct.com.au> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Chiawei, > Yes, there is security concern using HW mode. > Our designer is considering to remove the HW mode support in the next > generation of Aspeed SoCs. > So far we haven't encountered a scenario demanding HW mode. Great to hear :) can we unconditionally set ESPI000[9] in the driver then? > > With than in mind, if we're disabling hardware mode - what does the > > direction control setting effect when we're in software mode > > (ESPICTRL[9] == 1)? Does it even matter? > > Yes, the direction matters even in SW mode. > When the direction is 'master-to-slave' and the GPIO value is updated > by the Host through PUT_VW, a VW interrupt is trigger to notify BMC. > For the 'slave-to-master' GPIO, a alert is generated to notify the > Host to issue GET_VW for the GPIO value updated by the BMC by > ESPI09C. OK, but the datasheet mentions that ESPICFG804 is only applicable when ESPI000[9] = 0, or is that not the case? But based on what you've said: yes, it sounds like the generic gpiodev parts won't be useful for this. > > Separate from this: I'm also proposing that we represent the system > > event VWs > > as gpiodevs as well. > > > > > A raw packet, primitive interface should have better flexibility > > > to > > > manage MCTP packets over the OOB channel. > > > > OK, let me phrase this differently: can the OOB channel be used for > > anything other than SMBus messaging? Is it useful to provide an > > interface that isn't a standard SMBus/i2c device? > > Yes, the PCH spec. also defines two additional packet format for an > eSPI slave to retrieve PCH Temperature Data and RTC time. > It should be trivial to prepare a byte buffer in that format and send > it through the raw packet interface. OK, understood. > > If you need custom uapi definitions for this driver, that might be > > okay, but it's going to be more work for you (to define an interface > > that can be supported long-term), rather than using standard > > infrastructure that already exists. > > Thus I suggested that we can refer to the IPMI KCS BMC driver, which > supports the selection of different user interfaces, RAW or IPMI. Yep, but the KCS "raw" register set is standardised as part of the IPMI spec too, which helps to define a stable user API. We don't have that in this case. Overall though, if you want to start with the "low-level" API, then introduce "enhanced" functionality - like an actual SMBus driver - alongside that, then that sounds like an OK approach. > If IOCTL is considered to be not user friendly or magic code > polluting, file-based read/write on the miscdevice node is also an > option. It's not really my decision to make, but a read/write event interface would seem to be more consistent to me. Is there an obvious event format that would be common across all channels, perhaps? We'd probably also need a poll too - to make use of incoming events, like master-to-slave VW changes, perhaps? Cheers, Jeremy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CC25C433EF for ; Thu, 9 Sep 2021 01:53:16 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5811A61166 for ; Thu, 9 Sep 2021 01:53:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5811A61166 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeconstruct.com.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4H4hqF3TWSz2yNp for ; Thu, 9 Sep 2021 11:53:13 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=codeconstruct.com.au (client-ip=203.29.241.158; helo=codeconstruct.com.au; envelope-from=jk@codeconstruct.com.au; receiver=) Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4H4hpk3MSkz2xXm; Thu, 9 Sep 2021 11:52:46 +1000 (AEST) Received: from [172.16.66.38] (unknown [49.255.141.98]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 03D262012C; Thu, 9 Sep 2021 09:52:44 +0800 (AWST) Message-ID: <9fa4ae962c185e0e4f07f0299356969c17ae5ea5.camel@codeconstruct.com.au> Subject: Re: [PATCH v4 3/4] soc: aspeed: Add eSPI driver From: Jeremy Kerr To: ChiaWei Wang , "robh+dt@kernel.org" , "joel@jms.id.au" , "andrew@aj.id.au" , "linux-aspeed@lists.ozlabs.org" , "openbmc@lists.ozlabs.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Date: Thu, 09 Sep 2021 09:52:43 +0800 In-Reply-To: References: <20210901033015.910-1-chiawei_wang@aspeedtech.com> <20210901033015.910-4-chiawei_wang@aspeedtech.com> <20c13b9bb023091758cac3a07fb4037b7d796578.camel@codeconstruct.com.au> <513cb05f8d83d08a5c1e491dc0a9b6784195e7dd.camel@codeconstruct.com.au> <6593206c0bc90186f255c6ea86339576576f70dc.camel@codeconstruct.com.au> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Morris Mao , Ryan Chen Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" Hi Chiawei, > Yes, there is security concern using HW mode. > Our designer is considering to remove the HW mode support in the next > generation of Aspeed SoCs. > So far we haven't encountered a scenario demanding HW mode. Great to hear :) can we unconditionally set ESPI000[9] in the driver then? > > With than in mind, if we're disabling hardware mode - what does the > > direction control setting effect when we're in software mode > > (ESPICTRL[9] == 1)? Does it even matter? > > Yes, the direction matters even in SW mode. > When the direction is 'master-to-slave' and the GPIO value is updated > by the Host through PUT_VW, a VW interrupt is trigger to notify BMC. > For the 'slave-to-master' GPIO, a alert is generated to notify the > Host to issue GET_VW for the GPIO value updated by the BMC by > ESPI09C. OK, but the datasheet mentions that ESPICFG804 is only applicable when ESPI000[9] = 0, or is that not the case? But based on what you've said: yes, it sounds like the generic gpiodev parts won't be useful for this. > > Separate from this: I'm also proposing that we represent the system > > event VWs > > as gpiodevs as well. > > > > > A raw packet, primitive interface should have better flexibility > > > to > > > manage MCTP packets over the OOB channel. > > > > OK, let me phrase this differently: can the OOB channel be used for > > anything other than SMBus messaging? Is it useful to provide an > > interface that isn't a standard SMBus/i2c device? > > Yes, the PCH spec. also defines two additional packet format for an > eSPI slave to retrieve PCH Temperature Data and RTC time. > It should be trivial to prepare a byte buffer in that format and send > it through the raw packet interface. OK, understood. > > If you need custom uapi definitions for this driver, that might be > > okay, but it's going to be more work for you (to define an interface > > that can be supported long-term), rather than using standard > > infrastructure that already exists. > > Thus I suggested that we can refer to the IPMI KCS BMC driver, which > supports the selection of different user interfaces, RAW or IPMI. Yep, but the KCS "raw" register set is standardised as part of the IPMI spec too, which helps to define a stable user API. We don't have that in this case. Overall though, if you want to start with the "low-level" API, then introduce "enhanced" functionality - like an actual SMBus driver - alongside that, then that sounds like an OK approach. > If IOCTL is considered to be not user friendly or magic code > polluting, file-based read/write on the miscdevice node is also an > option. It's not really my decision to make, but a read/write event interface would seem to be more consistent to me. Is there an obvious event format that would be common across all channels, perhaps? We'd probably also need a poll too - to make use of incoming events, like master-to-slave VW changes, perhaps? Cheers, Jeremy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6B09C433F5 for ; Thu, 9 Sep 2021 01:55:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 866CA61167 for ; Thu, 9 Sep 2021 01:55:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 866CA61167 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeconstruct.com.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:Cc:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Mg1dG9AgBlWAb0Y48lG9rIXvo/RyUB653Hj/geaEsuA=; b=HR/BBhoT7ew5KB jq0lmW9DyLSslhoAk4hAVvLfyfwPtyliPifG3oXTWHwRExCgPpT6VVrMHphVyK3KXtn0f4lNW4Ctm scD0PkPjU/DkA9iJJudXsFaaYA8/m3ALdzQt+NwlfrZyGN79BUyTic5c48znUdDpsgZyMlOm2RDXy CkcwsNBF4igAVh8Kk8Hg0PSgm7Wi9XRLG2BubAsyV96+riciOnfjjYBxCHi974lU+TyXqUcju4b8T PxtiYUpP/0ddiamuo6FKOI3YmwY9GcexXGK9k56G6qwdhvQlMdFsu3Hsf12tLbNy7bR7Lpf7KxFAU hevPCCKYhJxK1z6q4YDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mO9FN-0080rL-VK; Thu, 09 Sep 2021 01:53:03 +0000 Received: from pi.codeconstruct.com.au ([203.29.241.158] helo=codeconstruct.com.au) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mO9F9-0080oM-3n for linux-arm-kernel@lists.infradead.org; Thu, 09 Sep 2021 01:52:48 +0000 Received: from [172.16.66.38] (unknown [49.255.141.98]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 03D262012C; Thu, 9 Sep 2021 09:52:44 +0800 (AWST) Message-ID: <9fa4ae962c185e0e4f07f0299356969c17ae5ea5.camel@codeconstruct.com.au> Subject: Re: [PATCH v4 3/4] soc: aspeed: Add eSPI driver From: Jeremy Kerr To: ChiaWei Wang , "robh+dt@kernel.org" , "joel@jms.id.au" , "andrew@aj.id.au" , "linux-aspeed@lists.ozlabs.org" , "openbmc@lists.ozlabs.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Cc: Morris Mao , Ryan Chen Date: Thu, 09 Sep 2021 09:52:43 +0800 In-Reply-To: References: <20210901033015.910-1-chiawei_wang@aspeedtech.com> <20210901033015.910-4-chiawei_wang@aspeedtech.com> <20c13b9bb023091758cac3a07fb4037b7d796578.camel@codeconstruct.com.au> <513cb05f8d83d08a5c1e491dc0a9b6784195e7dd.camel@codeconstruct.com.au> <6593206c0bc90186f255c6ea86339576576f70dc.camel@codeconstruct.com.au> User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210908_185247_457883_8F58FDD6 X-CRM114-Status: GOOD ( 28.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Chiawei, > Yes, there is security concern using HW mode. > Our designer is considering to remove the HW mode support in the next > generation of Aspeed SoCs. > So far we haven't encountered a scenario demanding HW mode. Great to hear :) can we unconditionally set ESPI000[9] in the driver then? > > With than in mind, if we're disabling hardware mode - what does the > > direction control setting effect when we're in software mode > > (ESPICTRL[9] == 1)? Does it even matter? > > Yes, the direction matters even in SW mode. > When the direction is 'master-to-slave' and the GPIO value is updated > by the Host through PUT_VW, a VW interrupt is trigger to notify BMC. > For the 'slave-to-master' GPIO, a alert is generated to notify the > Host to issue GET_VW for the GPIO value updated by the BMC by > ESPI09C. OK, but the datasheet mentions that ESPICFG804 is only applicable when ESPI000[9] = 0, or is that not the case? But based on what you've said: yes, it sounds like the generic gpiodev parts won't be useful for this. > > Separate from this: I'm also proposing that we represent the system > > event VWs > > as gpiodevs as well. > > > > > A raw packet, primitive interface should have better flexibility > > > to > > > manage MCTP packets over the OOB channel. > > > > OK, let me phrase this differently: can the OOB channel be used for > > anything other than SMBus messaging? Is it useful to provide an > > interface that isn't a standard SMBus/i2c device? > > Yes, the PCH spec. also defines two additional packet format for an > eSPI slave to retrieve PCH Temperature Data and RTC time. > It should be trivial to prepare a byte buffer in that format and send > it through the raw packet interface. OK, understood. > > If you need custom uapi definitions for this driver, that might be > > okay, but it's going to be more work for you (to define an interface > > that can be supported long-term), rather than using standard > > infrastructure that already exists. > > Thus I suggested that we can refer to the IPMI KCS BMC driver, which > supports the selection of different user interfaces, RAW or IPMI. Yep, but the KCS "raw" register set is standardised as part of the IPMI spec too, which helps to define a stable user API. We don't have that in this case. Overall though, if you want to start with the "low-level" API, then introduce "enhanced" functionality - like an actual SMBus driver - alongside that, then that sounds like an OK approach. > If IOCTL is considered to be not user friendly or magic code > polluting, file-based read/write on the miscdevice node is also an > option. It's not really my decision to make, but a read/write event interface would seem to be more consistent to me. Is there an obvious event format that would be common across all channels, perhaps? We'd probably also need a poll too - to make use of incoming events, like master-to-slave VW changes, perhaps? Cheers, Jeremy _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel