From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935456AbdCWXkw (ORCPT ); Thu, 23 Mar 2017 19:40:52 -0400 Received: from smtp2-g21.free.fr ([212.27.42.2]:53199 "EHLO smtp2-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935407AbdCWXkv (ORCPT ); Thu, 23 Mar 2017 19:40:51 -0400 Subject: Re: [RFC PATCH v0.2] PCI: Add support for tango PCIe host bridge From: Mason To: Marc Zyngier , Bjorn Helgaas , Thomas Gleixner Cc: Robin Murphy , Lorenzo Pieralisi , Liviu Dudau , David Laight , linux-pci , Linux ARM , Thibaud Cornic , Phuong Nguyen , LKML References: <91db1f47-3024-9712-309a-fb4b21e42028@free.fr> <310db9dd-7db6-2106-2e53-f0083b2d3758@free.fr> Message-ID: <9fffedd4-6292-b662-a588-a68fe7380af6@free.fr> Date: Fri, 24 Mar 2017 00:40:16 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Firefox/52.0 SeaMonkey/2.49 MIME-Version: 1.0 In-Reply-To: <310db9dd-7db6-2106-2e53-f0083b2d3758@free.fr> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/03/2017 18:03, Mason wrote: > The host bridge actually supports 256 MSIs. > > IIUC, what you suggested on IRC is that I support 256 in the driver, > and only read the status for *enabled* MSIs. > > Pseudo-code: > > for every 32-bit blob in the enabled bitmap > if the value is non-zero > lookup the corresponding status reg > > Problem is that a BITMAP is unsigned long (as you point out below). > So I'm not sure how to iterate 32-bits at a time over the BITMAP. Something along these lines: DECLARE_BITMAP(enabled, 256); unsigned int pos = 0; while ((pos = find_next_bit(enabled, 256, pos)) < 256) { int offset = (pos / 32) * 4; u32 status = readl_relaxed(status + offset); /* Handle each pos set in status */ pos = round_up(pos, 32); } You mentioned a bug in my code (due to the platform endianness) when passing the result of readl_relaxed to the bitops routine... How is one supposed to iterate over status? I'm not yet seeing this endianness issue, since (status & BIT(i)) provides the status of MSI_i, irrespective of endianness. Although I see that arch/arm/include/asm/bitops.h declares BE and LE variants... I'm confused. Regards. From mboxrd@z Thu Jan 1 00:00:00 1970 From: slash.tmp@free.fr (Mason) Date: Fri, 24 Mar 2017 00:40:16 +0100 Subject: [RFC PATCH v0.2] PCI: Add support for tango PCIe host bridge In-Reply-To: <310db9dd-7db6-2106-2e53-f0083b2d3758@free.fr> References: <91db1f47-3024-9712-309a-fb4b21e42028@free.fr> <310db9dd-7db6-2106-2e53-f0083b2d3758@free.fr> Message-ID: <9fffedd4-6292-b662-a588-a68fe7380af6@free.fr> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 23/03/2017 18:03, Mason wrote: > The host bridge actually supports 256 MSIs. > > IIUC, what you suggested on IRC is that I support 256 in the driver, > and only read the status for *enabled* MSIs. > > Pseudo-code: > > for every 32-bit blob in the enabled bitmap > if the value is non-zero > lookup the corresponding status reg > > Problem is that a BITMAP is unsigned long (as you point out below). > So I'm not sure how to iterate 32-bits at a time over the BITMAP. Something along these lines: DECLARE_BITMAP(enabled, 256); unsigned int pos = 0; while ((pos = find_next_bit(enabled, 256, pos)) < 256) { int offset = (pos / 32) * 4; u32 status = readl_relaxed(status + offset); /* Handle each pos set in status */ pos = round_up(pos, 32); } You mentioned a bug in my code (due to the platform endianness) when passing the result of readl_relaxed to the bitops routine... How is one supposed to iterate over status? I'm not yet seeing this endianness issue, since (status & BIT(i)) provides the status of MSI_i, irrespective of endianness. Although I see that arch/arm/include/asm/bitops.h declares BE and LE variants... I'm confused. Regards.