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From: Harini Katakam <harini.katakam@xilinx.com>
To: Daniel Walker <danielwa@cisco.com>, Andrew Lunn <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Andy Fleming <afleming@freescale.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	HEMANT RAMDASI <hramdasi@cisco.com>,
	"Julius Hemanth Pitti -X (jpitti - MONTA VISTA SOFTWARE INC at
	Cisco)" <jpitti@cisco.com>,
	"harinikatakamlinux@gmail.com" <harinikatakamlinux@gmail.com>
Subject: RE: Marvell phy errata origins?
Date: Tue, 18 Apr 2017 15:09:46 +0000	[thread overview]
Message-ID: <A00F2239C6748D4289A006FCD55C6D126F19023C@XAP-PVEXMBX01.xlnx.xilinx.com> (raw)
In-Reply-To: <1ab15dcd-196d-415a-c4ef-388a9b885b2f@cisco.com>

Hi Daniel,

> -----Original Message-----
> From: Daniel Walker [mailto:danielwa@cisco.com]
> Sent: Tuesday, April 18, 2017 8:26 PM
> To: Harini Katakam <harinik@xilinx.com>; Andrew Lunn <andrew@lunn.ch>
> Cc: Florian Fainelli <f.fainelli@gmail.com>; Andy Fleming
> <afleming@freescale.com>; netdev@vger.kernel.org; HEMANT RAMDASI
> <hramdasi@cisco.com>; Julius Hemanth Pitti -X (jpitti - MONTA VISTA
> SOFTWARE INC at Cisco) <jpitti@cisco.com>; harinikatakamlinux@gmail.com
> Subject: Re: Marvell phy errata origins?
> 
> On 04/18/2017 07:41 AM, Harini Katakam wrote:
> > Hi Daniel,
> >
> >> -----Original Message-----
> >> From: Daniel Walker [mailto:danielwa@cisco.com]
> >> Sent: Tuesday, April 18, 2017 8:05 PM
> >> To: Harini Katakam <harinik@xilinx.com>; Andrew Lunn <andrew@lunn.ch>
> >> Cc: Florian Fainelli <f.fainelli@gmail.com>; Andy Fleming
> >> <afleming@freescale.com>; netdev@vger.kernel.org; HEMANT RAMDASI
> >> <hramdasi@cisco.com>; Julius Hemanth Pitti -X (jpitti - MONTA VISTA
> >> SOFTWARE INC at Cisco) <jpitti@cisco.com>
> >> Subject: Re: Marvell phy errata origins?
> >>
> >> On 04/18/2017 07:31 AM, Harini Katakam wrote:
> >>> Hi Daniel,
> >>>
> >>>> -----Original Message-----
> >>>> From: Daniel Walker [mailto:danielwa@cisco.com]
> >>>> Sent: Tuesday, April 18, 2017 7:48 PM
> >>>> To: Andrew Lunn <andrew@lunn.ch>
> >>>> Cc: Florian Fainelli <f.fainelli@gmail.com>; Andy Fleming
> >>>> <afleming@freescale.com>; Harini Katakam <harinik@xilinx.com>;
> >>>> netdev@vger.kernel.org; HEMANT RAMDASI <hramdasi@cisco.com>;
> Julius
> >>>> Hemanth Pitti -X (jpitti - MONTA VISTA SOFTWARE INC at Cisco)
> >>>> <jpitti@cisco.com>
> >>>> Subject: Re: Marvell phy errata origins?
> >>>>
> >>>> On 04/18/2017 07:04 AM, Andrew Lunn wrote:
> >>>>> On Tue, Apr 18, 2017 at 06:16:33AM -0700, Daniel Walker wrote:
> >>> <snip>
> >>>>>> In Harini's commit
> >>>>>> message for ,
> >>>>>>
> >>>>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.gi
> >>>>>> t/ co mmit/drivers/net/phy/marvell.c?id=3ec0a0f10ceb
> >>>>>>
> >>>>>> "This function has a sequence accessing Page 5 and Register 31,
> >>>>>> both of which are not defined or reserved for this PHY"
> >>>>>>
> >>>>>> For the 88E1112 we see that these are "Factory Test Modes" which
> >>>>>> the contents of are not documented. They aren't really "not
> >>>>>> defied", and aren't really "reserved" .. Marvell support claims
> >>>>>> they don't support these drivers, and Freescale seems to be
> >>>>>> adding these drivers, and the line we are looking at.
> >>>>>>
> >>>>>> We had some issues with our PHY which were corrected with the
> >>>>>> same patch Harini used but modified for the M88E1112. We're
> >>>>>> trying to get to the bottom of where this code came from and what
> >>>>>> it was suppose to be doing.
> >>>>> I tried to find this errata fix in the Marvell reference code. And
> >>>>> failed to find it. But it is "Vendor Crap" code, hard to find
> >>>>> anything in it.
> >>>>>
> >>>>> My guess is, this errata just applies to one model of PHY, maybe
> >>>>> even one revision of one model of a PHY. The hard bit is figuring
> >>>>> out what actually needs it. Do you have access to Marvell datasheets?
> >>> I have access to the datasheets for 88E1111, 88E1112 and 88E1116
> >>> (and another family 151x) - None of them have these register details
> >>> or the errata
> >> documented.
> >>
> >> http://www.dexsilicium.com/Marvell_88E1112.pd
> >>
> >>
> >> Is this the same datasheet ? In this one on page 81 there is page 5
> >> register 31 is "Factory Test Modes" , do you not have that?
> > Yes, it is the same datasheet. That is what I meant - it just says
> > factory test modes But there is no register description.
> 
> I would call that undocumented. I suspect there are things inside the "Factory
> Test Modes" which could be helpful to fix errata. Things which Marvell might not
> want to document universally.

OK, agreed.

> 
> Can you describe what sort of issue you found which was the motivation for
> your patch ? Or did you remove the code because you did not know what it was
> used for?
> 

I added this patch for 88E1111 because that datasheet does not even have
Page 5 Reg 31 as "Factory Test mode" - it is reserved space.
Any access to that register failed. Since this register was clearly not part of
88E1111 PHY and irrelevant, I removed that code.

Regards,
Harini

  reply	other threads:[~2017-04-18 15:09 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-18 13:16 Marvell phy errata origins? Daniel Walker
2017-04-18 14:04 ` Andrew Lunn
2017-04-18 14:18   ` Daniel Walker
2017-04-18 14:31     ` Harini Katakam
2017-04-18 14:35       ` Daniel Walker
2017-04-18 14:41         ` Harini Katakam
2017-04-18 14:56           ` Daniel Walker
2017-04-18 15:09             ` Harini Katakam [this message]
2017-05-09 13:58   ` Daniel Walker
2017-05-09 14:24     ` Andrew Lunn
2018-09-25 15:16   ` Daniel Walker
2018-09-25 15:34     ` Andrew Lunn
2018-09-25 15:39     ` Andrew Lunn
2018-09-25 17:30       ` Harini Katakam
2018-09-26  5:42         ` Harini Katakam
2018-09-26 15:35           ` Daniel Walker
2018-10-01 10:26             ` GokulChand Casheekar (gcasheek)
2018-10-04  7:27               ` GokulChand Casheekar (gcasheek)

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