From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, HTML_MESSAGE,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C71BC433E0 for ; Thu, 9 Jul 2020 04:19:54 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 808F5206DF for ; Thu, 9 Jul 2020 04:19:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 808F5206DF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.vnet.ibm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4B2NHW4PtdzDrDp for ; Thu, 9 Jul 2020 14:19:51 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=atrajeev@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=fail (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4B2K7r37MVzDqQr for ; Thu, 9 Jul 2020 11:58:00 +1000 (AEST) Received: from pps.filterd (m0187473.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0691VkIV048682; Wed, 8 Jul 2020 21:57:55 -0400 Received: from ppma03fra.de.ibm.com (6b.4a.5195.ip4.static.sl-reverse.com [149.81.74.107]) by mx0a-001b2d01.pphosted.com with ESMTP id 325p3hd64p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 08 Jul 2020 21:57:54 -0400 Received: from pps.filterd (ppma03fra.de.ibm.com [127.0.0.1]) by ppma03fra.de.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 0691pSdQ032184; Thu, 9 Jul 2020 01:57:52 GMT Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by ppma03fra.de.ibm.com with ESMTP id 325k2c05hp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Jul 2020 01:57:52 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 0691voit34013324 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 9 Jul 2020 01:57:50 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5676D4C040; Thu, 9 Jul 2020 01:57:50 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C77EE4C050; Thu, 9 Jul 2020 01:57:48 +0000 (GMT) Received: from [9.79.221.246] (unknown [9.79.221.246]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Thu, 9 Jul 2020 01:57:48 +0000 (GMT) From: Athira Rajeev Message-Id: Content-Type: multipart/alternative; boundary="Apple-Mail=_1EA5615B-8587-46E7-BA9C-59BA83958178" Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.80.23.2.2\)) Subject: Re: [PATCH v2 03/10] powerpc/xmon: Add PowerISA v3.1 PMU SPRs Date: Thu, 9 Jul 2020 07:27:46 +0530 In-Reply-To: <871rlm469d.fsf@mpe.ellerman.id.au> To: Michael Ellerman References: <1593595262-1433-1-git-send-email-atrajeev@linux.vnet.ibm.com> <1593595262-1433-4-git-send-email-atrajeev@linux.vnet.ibm.com> <871rlm469d.fsf@mpe.ellerman.id.au> X-Mailer: Apple Mail (2.3608.80.23.2.2) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-08_19:2020-07-08, 2020-07-08 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=999 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2007090005 X-Mailman-Approved-At: Thu, 09 Jul 2020 14:05:25 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Neuling , maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" --Apple-Mail=_1EA5615B-8587-46E7-BA9C-59BA83958178 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii > On 08-Jul-2020, at 4:34 PM, Michael Ellerman = wrote: >=20 > Athira Rajeev > writes: >> From: Madhavan Srinivasan >>=20 >> PowerISA v3.1 added three new perfromance >> monitoring unit (PMU) speical purpose register (SPR). >> They are Monitor Mode Control Register 3 (MMCR3), >> Sampled Instruction Event Register 2 (SIER2), >> Sampled Instruction Event Register 3 (SIER3). >>=20 >> Patch here adds a new dump function dump_310_sprs >> to print these SPR values. >>=20 >> Signed-off-by: Madhavan Srinivasan >> --- >> arch/powerpc/xmon/xmon.c | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >>=20 >> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c >> index 7efe4bc..8917fe8 100644 >> --- a/arch/powerpc/xmon/xmon.c >> +++ b/arch/powerpc/xmon/xmon.c >> @@ -2022,6 +2022,20 @@ static void dump_300_sprs(void) >> #endif >> } >>=20 >> +static void dump_310_sprs(void) >> +{ >> +#ifdef CONFIG_PPC64 >> + if (!cpu_has_feature(CPU_FTR_ARCH_31)) >> + return; >> + >> + printf("mmcr3 =3D %.16lx\n", >> + mfspr(SPRN_MMCR3)); >> + >> + printf("sier2 =3D %.16lx sier3 =3D %.16lx\n", >> + mfspr(SPRN_SIER2), mfspr(SPRN_SIER3)); >=20 > Why not all on one line like many of the others? Sure, will change this to one line Thanks Athira >=20 > cheers --Apple-Mail=_1EA5615B-8587-46E7-BA9C-59BA83958178 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=us-ascii

On 08-Jul-2020, at 4:34 PM, Michael Ellerman <mpe@ellerman.id.au> = wrote:

Athira Rajeev <atrajeev@linux.vnet.ibm.com> writes:
From: Madhavan Srinivasan <maddy@linux.ibm.com>

PowerISA v3.1 added three new perfromance
monitoring unit (PMU) speical purpose register (SPR).
They are Monitor Mode Control Register 3 (MMCR3),
Sampled Instruction Event Register 2 (SIER2),
Sampled Instruction Event Register 3 (SIER3).
Patch here adds a new dump function dump_310_sprs
to print these SPR values.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
arch/powerpc/xmon/xmon.c | 15 +++++++++++++++
1 = file changed, 15 insertions(+)

diff --git = a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index = 7efe4bc..8917fe8 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2022,6 = +2022,20 @@ static void dump_300_sprs(void)
#endif
}

+static void = dump_310_sprs(void)
+{
+#ifdef = CONFIG_PPC64
+ if = (!cpu_has_feature(CPU_FTR_ARCH_31))
+ = return;
+
+ = printf("mmcr3  =3D %.16lx\n",
+ = mfspr(SPRN_MMCR3));
+
+ = printf("sier2  =3D %.16lx  sier3  =3D = %.16lx\n",
+ mfspr(SPRN_SIER2), = mfspr(SPRN_SIER3));

Why not all on one line like many of the others?

Sure, will = change this to one line

Thanks
Athira

cheers

= --Apple-Mail=_1EA5615B-8587-46E7-BA9C-59BA83958178--