From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Zhang, Yang Z" Subject: RE: [PATCH v11 2/3] x86, apicv: add virtual x2apic support Date: Wed, 23 Jan 2013 00:35:47 +0000 Message-ID: References: <1358331672-32384-1-git-send-email-yang.z.zhang@intel.com> <1358331672-32384-3-git-send-email-yang.z.zhang@intel.com> <20130121195907.GA3561@amt.cnet> <20130122155553.GG8427@redhat.com> <20130122231306.GA22288@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Cc: "kvm@vger.kernel.org" , "Shan, Haitao" , "Zhang, Xiantao" , "Tian, Kevin" To: Marcelo Tosatti , Gleb Natapov Return-path: Received: from mga09.intel.com ([134.134.136.24]:31075 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752091Ab3AWAfu convert rfc822-to-8bit (ORCPT ); Tue, 22 Jan 2013 19:35:50 -0500 In-Reply-To: <20130122231306.GA22288@amt.cnet> Content-Language: en-US Sender: kvm-owner@vger.kernel.org List-ID: Marcelo Tosatti wrote on 2013-01-23: > On Tue, Jan 22, 2013 at 05:55:53PM +0200, Gleb Natapov wrote: >> On Tue, Jan 22, 2013 at 12:21:47PM +0000, Zhang, Yang Z wrote: >>>>> +static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu) >>>>> +{ >>>>> + unsigned long *msr_bitmap; >>>>> + >>>>> + if (apic_x2apic_mode(vcpu->arch.apic)) >>>> >>>> vcpu->arch.apic can be NULL. >>> Actually, call apic_x2apic_mode to check whether use x2apic msr bitmap >>> is wrong. VCPU uses x2apic but it may not set virtual x2apic mode bit >>> due to TPR > shadow not enabled or irqchip not in kernel. Check the virtual x2apic mode bit in > vmcs directly should be a better choice. How about the follow code: >>> >> If TPR shadow it not enabled vmx_msr_bitmap_.*x2apic bitmap will have > x2apic MSRs intercepted. Right. So check virtual x2apic mode bit also covers the TPR shadow check. Or else, we need two check: one for apic mode and one for TPR shadow. > And what is the problem? APIC register virt depends on TPR shadow. No problem. The new implementation is more reasonable and needn't to do additional check of TPR shadow, and will not touch apic_base. Best regards, Yang