From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754119AbaGKUgk (ORCPT ); Fri, 11 Jul 2014 16:36:40 -0400 Received: from mga02.intel.com ([134.134.136.20]:62130 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751088AbaGKUgj convert rfc822-to-8bit (ORCPT ); Fri, 11 Jul 2014 16:36:39 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,645,1400050800"; d="scan'208";a="571903347" From: "Tian, Kevin" To: Konrad Rzeszutek Wilk , Paolo Bonzini , "xen-devel@lists.xensource.com" , "airlied@linux.ie" , "intel-gfx@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "qemu-devel@nongnu.org" , "dri-devel@lists.freedesktop.org" , "Chen, Tiejun" , "Kay, Allen M" Subject: RE: [Xen-devel] [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Thread-Topic: [Xen-devel] [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Thread-Index: AQHPmhLtddRUcHA0YU245zC1cQ8wppuZzrXAgAF9phOAAAppIA== Date: Fri, 11 Jul 2014 20:30:59 +0000 Message-ID: References: <53A42DAA.80406@redhat.com> <53A692F9.3060200@intel.com> <53AA70C0.2000806@redhat.com> <20140707144917.GZ5821@phenom.ffwll.local> <53BAB569.5000709@redhat.com> <20140707175402.GS5821@phenom.ffwll.local> <53BADFC6.9060101@redhat.com> <20140707184006.GU5821@phenom.ffwll.local> <20140711062956.GP17271@phenom.ffwll.local> <20140711194206.GI23257@laptop.dumpdata.com> In-Reply-To: <20140711194206.GI23257@laptop.dumpdata.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Konrad Rzeszutek Wilk [mailto:konrad.wilk@oracle.com] > Sent: Friday, July 11, 2014 12:42 PM > > On Fri, Jul 11, 2014 at 08:29:56AM +0200, Daniel Vetter wrote: > > On Thu, Jul 10, 2014 at 09:08:24PM +0000, Tian, Kevin wrote: > > > actually I'm curious whether it's still necessary to __detect__ PCH. Could > > > we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard > > > code the knowledge: > > > > > > } else if (IS_BROADWELL(dev)) { > > > dev_priv->pch_type = PCH_LPT; > > > dev_priv->pch_id = > > > > INTEL_PCH_LPT_LP_DEVICE_ID_TYPE; > > > DRM_DEBUG_KMS("This is Broadwell, > assuming " > > > "LynxPoint LP PCH\n"); > > > > > > Or if there is real usage on non-fixed mapping (not majority), could it be a > > > better option to have fixed mapping as a fallback instead of leaving as > > > PCH_NONE? Then even when Qemu doesn't provide a special tweaked > PCH, > > > the majority case just works. > > > > I guess we can do it, at least I haven't seen any strange combinations in > > the wild outside of Intel ... > > How big is the QA matrix for this? Would it make sense to just > include the latest hardware (say going two generations back) > and ignore the older one? suppose minimal or no QA effort on bare metal, if we only conservatively change the fallback path which is today not supposed to function with PCH_NONE. so it's only same amount of QA effort as whatever else is proposed in this passthru upstreaming task. I agree no need to cover older model, possibly just snb, ivb and hsw, but will leave Tiejun to answer the overall goal. Thanks Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53088) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5hYl-00078F-BV for qemu-devel@nongnu.org; Fri, 11 Jul 2014 16:36:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X5hYf-00063O-0q for qemu-devel@nongnu.org; Fri, 11 Jul 2014 16:36:47 -0400 Received: from mga02.intel.com ([134.134.136.20]:62133) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5hYe-00062N-Rv for qemu-devel@nongnu.org; Fri, 11 Jul 2014 16:36:40 -0400 From: "Tian, Kevin" Date: Fri, 11 Jul 2014 20:30:59 +0000 Message-ID: References: <53A42DAA.80406@redhat.com> <53A692F9.3060200@intel.com> <53AA70C0.2000806@redhat.com> <20140707144917.GZ5821@phenom.ffwll.local> <53BAB569.5000709@redhat.com> <20140707175402.GS5821@phenom.ffwll.local> <53BADFC6.9060101@redhat.com> <20140707184006.GU5821@phenom.ffwll.local> <20140711062956.GP17271@phenom.ffwll.local> <20140711194206.GI23257@laptop.dumpdata.com> In-Reply-To: <20140711194206.GI23257@laptop.dumpdata.com> Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [Qemu-devel] [Xen-devel] [Intel-gfx] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Konrad Rzeszutek Wilk , Paolo Bonzini , "xen-devel@lists.xensource.com" , "airlied@linux.ie" , "intel-gfx@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "qemu-devel@nongnu.org" , "dri-devel@lists.freedesktop.org" , "Chen, Tiejun" , "Kay, Allen M" > From: Konrad Rzeszutek Wilk [mailto:konrad.wilk@oracle.com] > Sent: Friday, July 11, 2014 12:42 PM >=20 > On Fri, Jul 11, 2014 at 08:29:56AM +0200, Daniel Vetter wrote: > > On Thu, Jul 10, 2014 at 09:08:24PM +0000, Tian, Kevin wrote: > > > actually I'm curious whether it's still necessary to __detect__ PCH. = Could > > > we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard > > > code the knowledge: > > > > > > } else if (IS_BROADWELL(dev)) { > > > dev_priv->pch_type =3D PCH_LPT; > > > dev_priv->pch_id =3D > > > > INTEL_PCH_LPT_LP_DEVICE_ID_TYPE; > > > DRM_DEBUG_KMS("This is Broadwell, > assuming " > > > "LynxPoint LP PCH\n"); > > > > > > Or if there is real usage on non-fixed mapping (not majority), could = it be a > > > better option to have fixed mapping as a fallback instead of leaving = as > > > PCH_NONE? Then even when Qemu doesn't provide a special tweaked > PCH, > > > the majority case just works. > > > > I guess we can do it, at least I haven't seen any strange combinations = in > > the wild outside of Intel ... >=20 > How big is the QA matrix for this? Would it make sense to just > include the latest hardware (say going two generations back) > and ignore the older one? suppose minimal or no QA effort on bare metal, if we only conservatively=20 change the fallback path which is today not supposed to function with=20 PCH_NONE. so it's only same amount of QA effort as whatever else is=20 proposed in this passthru upstreaming task. I agree no need to cover=20 older model, possibly just snb, ivb and hsw, but will leave Tiejun to answe= r=20 the overall goal. Thanks Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Tian, Kevin" Subject: Re: [Xen-devel] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Date: Fri, 11 Jul 2014 20:30:59 +0000 Message-ID: References: <53A42DAA.80406@redhat.com> <53A692F9.3060200@intel.com> <53AA70C0.2000806@redhat.com> <20140707144917.GZ5821@phenom.ffwll.local> <53BAB569.5000709@redhat.com> <20140707175402.GS5821@phenom.ffwll.local> <53BADFC6.9060101@redhat.com> <20140707184006.GU5821@phenom.ffwll.local> <20140711062956.GP17271@phenom.ffwll.local> <20140711194206.GI23257@laptop.dumpdata.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20140711194206.GI23257@laptop.dumpdata.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Konrad Rzeszutek Wilk , Paolo Bonzini , "xen-devel@lists.xensource.com" , "airlied@linux.ie" , "intel-gfx@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "qemu-devel@nongnu.org" , "dri-devel@lists.freedesktop.org" , "Chen, Tiejun" , "Kay, Allen M" List-Id: dri-devel@lists.freedesktop.org > From: Konrad Rzeszutek Wilk [mailto:konrad.wilk@oracle.com] > Sent: Friday, July 11, 2014 12:42 PM > > On Fri, Jul 11, 2014 at 08:29:56AM +0200, Daniel Vetter wrote: > > On Thu, Jul 10, 2014 at 09:08:24PM +0000, Tian, Kevin wrote: > > > actually I'm curious whether it's still necessary to __detect__ PCH. Could > > > we assume a 1:1 mapping between GPU and PCH, e.g. BDW already hard > > > code the knowledge: > > > > > > } else if (IS_BROADWELL(dev)) { > > > dev_priv->pch_type = PCH_LPT; > > > dev_priv->pch_id = > > > > INTEL_PCH_LPT_LP_DEVICE_ID_TYPE; > > > DRM_DEBUG_KMS("This is Broadwell, > assuming " > > > "LynxPoint LP PCH\n"); > > > > > > Or if there is real usage on non-fixed mapping (not majority), could it be a > > > better option to have fixed mapping as a fallback instead of leaving as > > > PCH_NONE? Then even when Qemu doesn't provide a special tweaked > PCH, > > > the majority case just works. > > > > I guess we can do it, at least I haven't seen any strange combinations in > > the wild outside of Intel ... > > How big is the QA matrix for this? Would it make sense to just > include the latest hardware (say going two generations back) > and ignore the older one? suppose minimal or no QA effort on bare metal, if we only conservatively change the fallback path which is today not supposed to function with PCH_NONE. so it's only same amount of QA effort as whatever else is proposed in this passthru upstreaming task. I agree no need to cover older model, possibly just snb, ivb and hsw, but will leave Tiejun to answer the overall goal. Thanks Kevin