From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Tian, Kevin" <kevin.tian@intel.com>
Subject: Re: [PATCH v3 0/2] VT-d flush issue
Date: Wed, 23 Dec 2015 06:21:38 +0000
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To: "Xu, Quan" <quan.xu@intel.com>, Jan Beulich <JBeulich@suse.com>
Cc: "'keir@xen.org'" <keir@xen.org>, "'george.dunlap@eu.citrix.com'" <george.dunlap@eu.citrix.com>, "'andrew.cooper3@citrix.com'" <andrew.cooper3@citrix.com>, "'tim@xen.org'" <tim@xen.org>, "'xen-devel@lists.xen.org'" <xen-devel@lists.xen.org>, "Nakajima,
	Jun" <jun.nakajima@intel.com>, "Wu, Feng" <feng.wu@intel.com>
List-Id: xen-devel@lists.xenproject.org

> From: Xu, Quan
> Sent: Tuesday, December 22, 2015 6:26 PM
> 
> > On 22.12.2015 at 5:09pm, <JBeulich@suse.com> wrote:
> > >>> On 22.12.15 at 09:43, <quan.xu@intel.com> wrote:
> > > Let's finish our discussion. I accept your idea. But I need to
> > > separate it into 3 patch set (It is complicated for me, sometime it makes me
> > crash.):
> > >    Patch set 1:  Device-TLB/iotlb flush error. (send out this week)
> > >    Patch set 2:  context flush error. (need 2 ~ 3 weeks)
> > >    Patch set 3:  iec flush error. (need 3 ~ 4 weeks)
> > >
> > > If it is acceptable, we can discuss in detail one by one..
> >
> > Splitting up is of course acceptable.
> 
> Jan,
>    Just update the combination,
> 
>    Patch set 1:  Device-TLB flush error. (send out this week)
>    Patch set 2:  context/iotlb flush error. (need 2 ~ 3 weeks)
>    Patch set 3:  iec flush error. (need 3 ~ 4 weeks)
> 
> -Quan

Sorry being late to this discussion. Thanks Jan/Andrew's comments
for overall gap in VT-d error handling. Intel is definitely committed 
to continue improve current code quality, but let's do things one-by-one.

Above is a good split. Let's start from there.

Thanks
Kevin