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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
	Jan Beulich <JBeulich@suse.com>
Cc: Julien Grall <julien.grall@arm.com>, Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH for-4.10 v2] passthrough/vtd: Don't DMA to the stack in queue_invalidate_wait()
Date: Mon, 23 Oct 2017 07:05:27 +0000	[thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D190E3100E@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <4e5a7d46-b6b6-7054-7e50-7238e08572f0@citrix.com>

> From: Andrew Cooper [mailto:andrew.cooper3@citrix.com]
> Sent: Saturday, October 21, 2017 1:55 AM
> 
> On 20/10/17 08:12, Jan Beulich wrote:
> >>>> On 19.10.17 at 18:22, <andrew.cooper3@citrix.com> wrote:
> >> DMA-ing to the stack is generally considered bad practice.  In this case, if
> a
> >> timeout occurs because of a sluggish device which is processing the
> request,
> >> the completion notification will corrupt the stack of a subsequent
> deeper call
> >> tree.
> >>
> >> Place the poll_slot in a percpu area and DMA to that instead.
> >>
> >> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> > Please could you extend the commit message to state the issue
> > remaining with using a single per-CPU slot? With that
> > Reviewed-by: Jan Beulich <jbeulich@suse.com>
> 
> How about this?
> 
> Note: This change does not address other issues with the current
> implementation, such as once a timeout has been suffered, subsequent
> completions can't be correlated with their requests.
> 

Can you increase the poll data +1 every time when a new wait
comes?

Thanks
Kevin
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  reply	other threads:[~2017-10-23  7:05 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-19 11:26 [PATCH for-4.10] passthrough/vtd: Don't DMA to the stack in queue_invalidate_wait() Andrew Cooper
2017-10-19 12:11 ` Jan Beulich
2017-10-19 12:54   ` Andrew Cooper
2017-10-19 13:25     ` Jan Beulich
2017-10-19 13:31       ` Andrew Cooper
2017-10-19 16:22 ` [PATCH for-4.10 v2] " Andrew Cooper
2017-10-20  7:12   ` Jan Beulich
2017-10-20 17:55     ` Andrew Cooper
2017-10-23  7:05       ` Tian, Kevin [this message]
     [not found]       ` <AADFC41AFE54684AB9EE6CBC0274A5D190E3101C@SHSMSX101.ccr.corp.intel.com>
2017-10-23  7:06         ` Tian, Kevin
2017-10-23  7:18       ` Jan Beulich
2017-10-23  8:06         ` Andrew Cooper

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