From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from [140.186.70.92] (port=40219 helo=eggs.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1Pp30e-0006At-UI
	for qemu-devel@nongnu.org; Mon, 14 Feb 2011 13:18:53 -0500
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1Pp30d-0000I8-Dl
	for qemu-devel@nongnu.org; Mon, 14 Feb 2011 13:18:52 -0500
Received: from mail-iy0-f173.google.com ([209.85.210.173]:60116)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1Pp30d-0000Hv-8n
	for qemu-devel@nongnu.org; Mon, 14 Feb 2011 13:18:51 -0500
Received: by iye19 with SMTP id 19so5542366iye.4
	for <qemu-devel@nongnu.org>; Mon, 14 Feb 2011 10:18:50 -0800 (PST)
MIME-Version: 1.0
In-Reply-To: <1297437062-6118-1-git-send-email-christophe.lyon@st.com>
References: <1297437062-6118-1-git-send-email-christophe.lyon@st.com>
Date: Mon, 14 Feb 2011 18:18:48 +0000
Message-ID: <AANLkTikrQurQcgrJ0s88jDkx1a9a1vK5MvAJspG25tyO@mail.gmail.com>
Subject: Re: [Qemu-devel] [PATCH v3 0/6] target-arm: Fix Neon shift
	instructions.
From: Peter Maydell <peter.maydell@linaro.org>
Content-Type: text/plain; charset=UTF-8
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: christophe.lyon@st.com
Cc: qemu-devel@nongnu.org

On 11 February 2011 15:10,  <christophe.lyon@st.com> wrote:
> From: Christophe Lyon <christophe.lyon@st.com>
>
> This patch series provides fixes such that ARM Neon instructions
> VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN, VQSHRN, VSHRN, VQSHRUN now
> pass all my tests.
>
> I have reworked all these patches and I hope they are now easier to
> review.

Thanks; this was indeed a lot easier to review. Mostly
this is OK, there are a few things:
 * minor style issues
 * handling of very large shift counts is not right
(both in code you wrote and existing routines)
 * the shift-and-narrow loop doesn't handle the case
where pass 1 reads registers pass 0 writes

I have patches which (sitting on top of your 6) fix all
these and give a clean pass on the random instruction
set testing for the shift instructions.

Unless you object, I think the simplest thing will be for
me to just fix the minor nits I identified in your patches
and then post a combined series of your patches and
mine.

-- PMM