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Date: Mon, 14 Feb 2011 17:49:07 +0000
Message-ID: <AANLkTinJqC+Ru-Prb2RFWYeDhN=_6K7XaQuHLZv7m0pt@mail.gmail.com>
Subject: Re: [Qemu-devel] [PATCH 4/6] target-arm: fix saturated values for
	Neon right shifts.
From: Peter Maydell <peter.maydell@linaro.org>
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To: christophe.lyon@st.com
Cc: qemu-devel@nongnu.org

On 14 February 2011 17:46, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 11 February 2011 15:11, =C2=A0<christophe.lyon@st.com> wrote:
>> =C2=A0NEON_VOP_ENV(qrshl_s8, neon_s8, 4)
>> @@ -924,7 +924,11 @@ uint32_t HELPER(neon_qrshl_s32)(CPUState *env, uint=
32_t valop, uint32_t shiftop)
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 dest =3D val << shift;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((dest >> shift) !=3D val) {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 SET_QC();
>> - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dest =3D (uint32_t)(1 << (siz=
eof(val) * 8 - 1)) - (val > 0 ? 1 : 0);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (val < 0) {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dest =3D INT32_=
MIN;
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0} else {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dest =3D INT32_=
MAX;
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
>
> Again, right answers but the way most of the rest of the code
> forces a 32 bit value to signed saturation is
> =C2=A0 dest =3D (val >> 31) ^ ~SIGNBIT;

...and also this is patching a function newly introduced in
patch 1/6 -- better to just have 1/6 have the correct code.

-- PMM