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Subject: RE: FSL DMA engine transfer to PCI memory
Date: Tue, 25 Jan 2011 16:34:49 -0000
Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6D8AC29@saturn3.aculab.com>
In-Reply-To: <20110125162946.GA13438@ovro.caltech.edu>
From: "David Laight" <David.Laight@ACULAB.COM>
To: "Ira W. Snyder" <iws@ovro.caltech.edu>,
	"Felix Radensky" <felix@embedded-sol.com>
Cc: Scott Wood <scottwood@freescale.com>, linuxppc-dev@ozlabs.org
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=20
> > >>>> custom board based on P2020 running linux-2.6.35. The PCI
> > >>>> device is Altera FPGA, connected directly to SoC PCI-E
controller.

=20
> This sounds like your FPGA doesn't handle burst mode accesses=20
> correctly.
> A logic analyzer will help you prove it.

He is doing PCIe, not PCI.
A PCIe transfers is an HDLC packet pair, one containing the
request, the other the response.
In order to get any significant throughput the hdlc packet(s)
have to contain all the data (eg 128 bytes).
On the ppc we used that means you have to use the dma
controller inside the PCIe interface block.
The generic dma controller can't even generate 64bit
cycles into the ppc's PCIe engine.

	David