From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <york.sun@nxp.com>
Date: Mon, 10 Dec 2018 21:16:57 +0000
Subject: [U-Boot] [PATCH][v3] armv8: lx2160a: Add LX2160A SoC Support
References: <1540804527-23096-1-git-send-email-priyanka.jain@nxp.com>
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On 10/29/18 2:17 AM, Priyanka Jain wrote:
> LX2160A Soc is based on Layerscape Chassis Generation 3.2 Architecture.
> Features:
>  16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
>  two 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
>  3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
>  4 TZASC instances, etc.
> 
> SoC personalites:
> LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
> LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs
> 
> Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
> ---
> Changes for v3:
>  Add CONFIG_SYS_FSL_RST_ADDR define
> 
Applied to fsl-qoriq master, awaiting upstream. Thanks.

York