From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leonard Crestez Subject: Re: [PATCH v2 0/3] cpufreq: Add imx-cpufreq-dt driver Date: Fri, 3 May 2019 11:51:57 +0000 Message-ID: References: <20190503065026.qwroewhu5lxckqgl@vireshk-i7> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Viresh Kumar Cc: Aisheng Dong , Abel Vesa , Anson Huang , "linux-pm@vger.kernel.org" , "Rafael J. Wysocki" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , Lucas Stach , Shawn Guo , "linux-arm-kernel@lists.infradead.org" , Jacky Bai List-Id: linux-pm@vger.kernel.org On 03.05.2019 09:50, Viresh Kumar wrote: > On 02-05-19, 22:44, Leonard Crestez wrote: >> Right now in upstream imx8m cpufreq support just lists a common subset >> of OPPs because the higher ones should only be attempted after checking >> speed grading in fuses. >> >> Add a small driver which checks speed grading from nvmem cells before >> registering cpufreq-dt. >> >> It seems that cpufreq-dt insists on adding the opp and regulator itself >> so can't actually call dev_pm_opp_of_add_table and then >> dev_pm_opp_disable > > Well we can surely implement it someway if that is what you want, like we can > pass postinit() callback in platform data to cpufreq-dt which can get called > after OPP table is added, etc. > > But disabling OPPs after they are added isn't a great way of handling it as > well. > >> so implementation was switched to opp-supported-hw. > > I will say that this is far better than disabling the OPPs after adding them. So > this is a good way of doing it. The intention seems to be that dev_pm_opp_disable is used at run-time for stuff like thermal issues while init-time opp selection should be done in other ways. Is this what you mean? It's not very obvious from API. -- Regards, Leonard From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 667ECC43219 for ; Fri, 3 May 2019 11:52:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 360CD2070B for ; Fri, 3 May 2019 11:52:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="SblWqdZQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727394AbfECLwC (ORCPT ); Fri, 3 May 2019 07:52:02 -0400 Received: from mail-eopbgr00074.outbound.protection.outlook.com ([40.107.0.74]:7078 "EHLO EUR02-AM5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726572AbfECLwC (ORCPT ); Fri, 3 May 2019 07:52:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IL9tHpfERm+wBemS2dF2mrgoaJJVNfuFwRvN38GFaCg=; b=SblWqdZQBBHEKgDz4gt32ZmACKLZpMcmp54X++vH0StVQ4jjtda8ww1gb4VBdyrZZQLrC1eBlRXprrMACCQ8xq98XrSxw1NB1BJJq1JbGR2+ucsrhsxT6nZuST4ouee2UAf/UttonZPcv8iS085KPhOZt9LplwYkOmeSpCFG3us= Received: from AM0PR04MB6434.eurprd04.prod.outlook.com (20.179.252.215) by AM0PR04MB6611.eurprd04.prod.outlook.com (20.179.255.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1835.14; Fri, 3 May 2019 11:51:57 +0000 Received: from AM0PR04MB6434.eurprd04.prod.outlook.com ([fe80::19be:75a:9fe:7cec]) by AM0PR04MB6434.eurprd04.prod.outlook.com ([fe80::19be:75a:9fe:7cec%7]) with mapi id 15.20.1856.008; Fri, 3 May 2019 11:51:57 +0000 From: Leonard Crestez To: Viresh Kumar CC: Lucas Stach , Shawn Guo , "Rafael J. Wysocki" , Anson Huang , Jacky Bai , Abel Vesa , Aisheng Dong , Fabio Estevam , "linux-pm@vger.kernel.org" , "kernel@pengutronix.de" , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v2 0/3] cpufreq: Add imx-cpufreq-dt driver Thread-Topic: [PATCH v2 0/3] cpufreq: Add imx-cpufreq-dt driver Thread-Index: AQHVATiQtlzuIooEwkqEvC93VXXdZg== Date: Fri, 3 May 2019 11:51:57 +0000 Message-ID: References: <20190503065026.qwroewhu5lxckqgl@vireshk-i7> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; x-originating-ip: [89.37.124.34] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a7a28f38-3903-404b-9a00-08d6cfbdbedf x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020);SRVR:AM0PR04MB6611; x-ms-traffictypediagnostic: AM0PR04MB6611: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(376002)(346002)(189003)(199004)(305945005)(81166006)(486006)(476003)(8936002)(3846002)(256004)(33656002)(7736002)(91956017)(5660300002)(6116002)(229853002)(55016002)(446003)(6436002)(4326008)(44832011)(9686003)(99286004)(8676002)(478600001)(53936002)(52536014)(66476007)(66946007)(73956011)(102836004)(81156014)(64756008)(66446008)(7696005)(66066001)(76176011)(26005)(6506007)(53546011)(76116006)(66556008)(74316002)(71200400001)(2906002)(54906003)(86362001)(14454004)(6916009)(6246003)(68736007)(71190400001)(25786009)(186003)(316002);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR04MB6611;H:AM0PR04MB6434.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: jZk7JGdsmdmpBrMH02tNS8OouJJhUj/qwQJg6Iv/DZ7UvEbRYfXvHzpI+xjDINHPQhwY0k21n7zmpkRN9AQIF41ETBpcAeuivT8d3tsnUzP8G9Wb+pwOAY4S/VQIU162I324dAOxxVINVMScVwKf8xu5gT3dET3TxB53S3oiaIcs/RhD+DrQP4ebU3TNmqX3sehxVgxvKr+cbUsjwMn7PZqyKUi2HVR+mWzsfAy2v6oBpOj/0DXjLIHDyDGeeBw3DcetD4MgLADUB2Rjht+67e3icKA6Hs2av1zrKuGrF8gmn81+PoBqo+xPB9udHFM0aW+ZLODSz2BoAzuhXekAVoX/cdqa2qKD70E0MCJrKtoMM20eR6bl4X6AsOEfZsujA209KtpO/h4s2vP64d729UpibTmC1Nu28raKpi7LjIU= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a7a28f38-3903-404b-9a00-08d6cfbdbedf X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 11:51:57.6028 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6611 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Message-ID: <20190503115157.7vMiZqgOuIXC8uI6ypDlkN4anPb_SAV4rKcdH6NGwAI@z> On 03.05.2019 09:50, Viresh Kumar wrote:=0A= > On 02-05-19, 22:44, Leonard Crestez wrote:=0A= >> Right now in upstream imx8m cpufreq support just lists a common subset= =0A= >> of OPPs because the higher ones should only be attempted after checking= =0A= >> speed grading in fuses.=0A= >>=0A= >> Add a small driver which checks speed grading from nvmem cells before=0A= >> registering cpufreq-dt.=0A= >>=0A= >> It seems that cpufreq-dt insists on adding the opp and regulator itself= =0A= >> so can't actually call dev_pm_opp_of_add_table and then=0A= >> dev_pm_opp_disable=0A= > =0A= > Well we can surely implement it someway if that is what you want, like we= can=0A= > pass postinit() callback in platform data to cpufreq-dt which can get cal= led=0A= > after OPP table is added, etc.=0A= > =0A= > But disabling OPPs after they are added isn't a great way of handling it = as=0A= > well.=0A= > =0A= >> so implementation was switched to opp-supported-hw.=0A= > =0A= > I will say that this is far better than disabling the OPPs after adding t= hem. So=0A= > this is a good way of doing it.=0A= =0A= The intention seems to be that dev_pm_opp_disable is used at run-time =0A= for stuff like thermal issues while init-time opp selection should be =0A= done in other ways.=0A= =0A= Is this what you mean? It's not very obvious from API.=0A= =0A= --=0A= Regards,=0A= Leonard=0A= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,T_DKIMWL_WL_HIGH autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3691C43219 for ; Fri, 3 May 2019 11:52:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3643206C3 for ; Fri, 3 May 2019 11:52:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="QcQEKts8"; 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Fri, 3 May 2019 11:51:57 +0000 Received: from AM0PR04MB6434.eurprd04.prod.outlook.com ([fe80::19be:75a:9fe:7cec]) by AM0PR04MB6434.eurprd04.prod.outlook.com ([fe80::19be:75a:9fe:7cec%7]) with mapi id 15.20.1856.008; Fri, 3 May 2019 11:51:57 +0000 From: Leonard Crestez To: Viresh Kumar Subject: Re: [PATCH v2 0/3] cpufreq: Add imx-cpufreq-dt driver Thread-Topic: [PATCH v2 0/3] cpufreq: Add imx-cpufreq-dt driver Thread-Index: AQHVATiQtlzuIooEwkqEvC93VXXdZg== Date: Fri, 3 May 2019 11:51:57 +0000 Message-ID: References: <20190503065026.qwroewhu5lxckqgl@vireshk-i7> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; x-originating-ip: [89.37.124.34] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a7a28f38-3903-404b-9a00-08d6cfbdbedf x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); 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Wysocki" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , Lucas Stach , Shawn Guo , "linux-arm-kernel@lists.infradead.org" , Jacky Bai Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 03.05.2019 09:50, Viresh Kumar wrote: > On 02-05-19, 22:44, Leonard Crestez wrote: >> Right now in upstream imx8m cpufreq support just lists a common subset >> of OPPs because the higher ones should only be attempted after checking >> speed grading in fuses. >> >> Add a small driver which checks speed grading from nvmem cells before >> registering cpufreq-dt. >> >> It seems that cpufreq-dt insists on adding the opp and regulator itself >> so can't actually call dev_pm_opp_of_add_table and then >> dev_pm_opp_disable > > Well we can surely implement it someway if that is what you want, like we can > pass postinit() callback in platform data to cpufreq-dt which can get called > after OPP table is added, etc. > > But disabling OPPs after they are added isn't a great way of handling it as > well. > >> so implementation was switched to opp-supported-hw. > > I will say that this is far better than disabling the OPPs after adding them. So > this is a good way of doing it. The intention seems to be that dev_pm_opp_disable is used at run-time for stuff like thermal issues while init-time opp selection should be done in other ways. Is this what you mean? It's not very obvious from API. -- Regards, Leonard _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel