From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shahaf Shuler Subject: Re: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Date: Sun, 24 Mar 2019 09:13:57 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable To: Slava Ovsiienko , "dev@dpdk.org" Return-path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130079.outbound.protection.outlook.com [40.107.13.79]) by dpdk.org (Postfix) with ESMTP id 8C1455F36 for ; Sun, 24 Mar 2019 10:13:58 +0100 (CET) In-Reply-To: Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thursday, March 21, 2019 4:12 PM, Slava Ovsiienko: > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the ingres= s > rules > > > > > > Signed-off-by: Viacheslav Ovsiienko [...] > > > + flow_dv_translate_source_vport(matcher.mask.buf, > > > + dev_flow->dv.value.buf, > > > + priv->representor_id < 0 ? > > > + priv->representor_id : > > > + priv->representor_id + 1, > > > > The vport of representor_id 0 will be 1? > > Who owns vport 0? >=20 > PF. > There is the foillowing vport mapping (for single E-Switch per PF): >=20 > -1 - wire Wire, i.e. the uplink representor. indeed it's index is defined by PRM to -= 1. > 0 - PF (uplink + VF reps) I don't understand this part. When you have uplink representor you don't ha= ve PF. Moreover, I would expect the first representor created to have vport_num=3D= 0 (w/ name pf0vf0). Isn't it the case?=20 > 1 - VF0 > 2 - VF1 > ... > n+1 - VFn >=20 > This code is subject to change - (SF, multi E-Switch per function, etc), = this > patch currently supports single E-Switch per PF. >=20 > > > > > + 0xffff); > > > + } > > > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > > > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > > > void *match_mask =3D matcher.mask.buf; > > > -- > > > 1.8.3.1