From mboxrd@z Thu Jan 1 00:00:00 1970 From: york sun Date: Wed, 31 Aug 2016 21:43:00 +0000 Subject: [U-Boot] [Patch v2 7/7] armv8: ls1046ardb: Add LS1046ARDB board support References: <1472637860-30160-1-git-send-email-Qianyu.Gong@nxp.com> <1472637860-30160-8-git-send-email-Qianyu.Gong@nxp.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/31/2016 03:17 AM, Gong Qianyu wrote: > From: Mingkai Hu > > LS1046ARDB Specification: > ------------------------- > Memory subsystem: > * 8GByte DDR4 SDRAM (64bit bus) > * 512 Mbyte NAND flash > * Two 64 Mbyte high-speed SPI flash > * SD connector to interface with the SD memory card > * On-board 4G eMMC > > Ethernet: > * Two XFI 10G ports > * Two SGMII ports > * Two RGMII ports > > PCIe: > * PCIe1 (SerDes2 Lane0) to miniPCIe slot > * PCIe2 (SerDes2 Lane1) to x2 PCIe slot > * PCIe3 (SerDes2 Lane2) to x4 PCIe slot > > SATA: > * SerDes2 Lane3 to SATA port > > USB 3.0: one super speed USB 3.0 type A port > one Micro-AB port > > UART: supports two UARTs up to 115200 bps for console > > Signed-off-by: Gong Qianyu > Signed-off-by: Mingkai Hu > --- > v2: > - Add >60 characters' paragraph for the board help. > - Fix the memory map in readme. > - Remove unused flash r/w functions. > - Remove DDR3 defines. > > arch/arm/Kconfig | 12 ++ > arch/arm/dts/Makefile | 1 + > arch/arm/dts/fsl-ls1046a-rdb.dts | 44 ++++ > arch/arm/dts/fsl-ls1046a.dtsi | 220 +++++++++++++++++++ > board/freescale/ls1046ardb/Kconfig | 16 ++ > board/freescale/ls1046ardb/MAINTAINERS | 8 + > board/freescale/ls1046ardb/Makefile | 10 + > board/freescale/ls1046ardb/README | 77 +++++++ > board/freescale/ls1046ardb/cpld.c | 158 ++++++++++++++ > board/freescale/ls1046ardb/cpld.h | 49 +++++ > board/freescale/ls1046ardb/ddr.c | 140 ++++++++++++ > board/freescale/ls1046ardb/ddr.h | 44 ++++ > board/freescale/ls1046ardb/eth.c | 77 +++++++ > board/freescale/ls1046ardb/ls1046ardb.c | 136 ++++++++++++ > board/freescale/ls1046ardb/ls1046ardb_pbi.cfg | 22 ++ > board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg | 7 + > board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg | 7 + > .../ls1046ardb/ls1046ardb_rcw_sd_1200.cfg | 7 + > .../ls1046ardb/ls1046ardb_rcw_sd_1400.cfg | 7 + > .../ls1046ardb/ls1046ardb_rcw_sd_5506.cfg | 7 + How are these rcw files used? I don't see any description in README. > diff --git a/board/freescale/ls1046ardb/README b/board/freescale/ls1046ardb/README > new file mode 100644 > index 0000000..8db0cef > --- /dev/null > +++ b/board/freescale/ls1046ardb/README > @@ -0,0 +1,77 @@ > +Overview > +-------- > +The LS1046A Reference Design Board (RDB) is a high-performance computing, > +evaluation, and development platform that supports the QorIQ LS1046A > +LayerScape Architecture processor. The LS1046ARDB provides SW development > +platform for the Freescale LS1046A processor series, with a complete > +debugging environment. The LS1046A RDB is lead-free and RoHS-compliant. > + > +LS1046A SoC Overview > +-------------------- > +Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A > +SoC overview. > + > + LS1046ARDB board Overview > + ----------------------- > + - SERDES1 Connections, 4 lanes supporting: > + - Lane0: XFI with x1 RJ45 connector > + - Lane1: XFI Cage > + - Lane2: SGMII.5 > + - Lane3: SGMII.6 > + - SERDES2 Connections, 4 lanes supporting: > + - Lane0: PCIe1 with miniPCIe slot > + - Lane1: PCIe2 with PCIe x2 slot > + - Lane2: PCIe3 with PCIe x4 slot > + - Lane3: SATA > + - DDR Controller > + - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s > + -IFC/Local Bus > + - One 512 MB NAND flash with ECC support How is NAND used? I don't see boot from NAND. Is it supported? York