From mboxrd@z Thu Jan 1 00:00:00 1970 From: Slava Ovsiienko Subject: Re: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Date: Mon, 25 Mar 2019 07:44:09 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable To: Shahaf Shuler , "dev@dpdk.org" Return-path: Received: from EUR03-VE1-obe.outbound.protection.outlook.com (mail-eopbgr50054.outbound.protection.outlook.com [40.107.5.54]) by dpdk.org (Postfix) with ESMTP id 11D8E2BD3 for ; Mon, 25 Mar 2019 08:44:12 +0100 (CET) In-Reply-To: Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Shahaf Shuler > Sent: Sunday, March 24, 2019 11:14 > To: Slava Ovsiienko ; dev@dpdk.org > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the ingres= s > rules >=20 > Thursday, March 21, 2019 4:12 PM, Slava Ovsiienko: > > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the > > ingress rules > > > > > > > > Signed-off-by: Viacheslav Ovsiienko >=20 > [...] >=20 > > > > + flow_dv_translate_source_vport(matcher.mask.buf, > > > > + dev_flow->dv.value.buf, > > > > + priv->representor_id < 0 ? > > > > + priv->representor_id : > > > > + priv->representor_id + 1, > > > > > > The vport of representor_id 0 will be 1? > > > Who owns vport 0? > > > > PF. > > There is the foillowing vport mapping (for single E-Switch per PF): > > > > -1 - wire >=20 > Wire, i.e. the uplink representor. indeed it's index is defined by PRM to= -1. >=20 > > 0 - PF (uplink + VF reps) >=20 > I don't understand this part. When you have uplink representor you don't > have PF. We do. There is PF anyway. In meaning we always have PCI function, which Is some kind of "container" for representors and also serves as E-Switch ma= nager. It may contain only "uplink rep" if there is no VF enabled, or may contain = the bunch=20 of uplink and VF reps. This PF has vport zero assigned. > Moreover, I would expect the first representor created to have vport_num= =3D0 > (w/ name pf0vf0). > Isn't it the case? No. Representors do not have dedicated vports, they share the vport zero (P= F) instead. And VFs have dedicated vports. >=20 > > 1 - VF0 > > 2 - VF1 > > ... > > n+1 - VFn > > > > This code is subject to change - (SF, multi E-Switch per function, > > etc), this patch currently supports single E-Switch per PF. > > > > > > > > > + 0xffff); > > > > + } > > > > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > > > > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > > > > void *match_mask =3D matcher.mask.buf; > > > > -- > > > > 1.8.3.1