From mboxrd@z Thu Jan 1 00:00:00 1970 From: Slava Ovsiienko Subject: Re: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Date: Thu, 21 Mar 2019 14:11:58 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable To: Shahaf Shuler , "dev@dpdk.org" Return-path: Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-eopbgr150044.outbound.protection.outlook.com [40.107.15.44]) by dpdk.org (Postfix) with ESMTP id DB8401B4EA for ; Thu, 21 Mar 2019 15:11:59 +0100 (CET) In-Reply-To: Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Shahaf Shuler > Sent: Thursday, March 21, 2019 14:15 > To: Slava Ovsiienko ; dev@dpdk.org > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the ingres= s > rules >=20 > Thursday, March 21, 2019 10:11 AM, Viacheslav Ovsiienko: > > Subject: [PATCH 14/14] net/mlx5: add source vport match to the ingress > > rules > > > > For E-Switch configurations over multiport Infiniband devices we > > should add source vport match to correctly distribute traffic between > representors. > > > > Signed-off-by: Viacheslav Ovsiienko > > --- > > drivers/net/mlx5/mlx5_flow_dv.c | 38 > > ++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 38 insertions(+) > > > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > > b/drivers/net/mlx5/mlx5_flow_dv.c index b8943da..489b3bd 100644 > > --- a/drivers/net/mlx5/mlx5_flow_dv.c > > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > > @@ -3095,6 +3095,29 @@ struct field_modify_info modify_tcp[] =3D { } > > > > /** > > + * Add source vport match to the specified matcher. > > + * > > + * @param[in, out] matcher > > + * Flow matcher. > > + * @param[in, out] key > > + * Flow matcher value. > > + * @param[in] port > > + * Source vport value to match > > + * @param[in] mask > > + * Mask > > + */ > > +static void > > +flow_dv_translate_source_vport(void *matcher, void *key, > > + int16_t port, uint16_t mask) { > > + void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > misc_parameters); > > + void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key, > > misc_parameters); > > + > > + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); > > + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); } > > + > > +/** > > * Fill the flow with DV spec. > > * > > * @param[in] dev > > @@ -3389,6 +3412,21 @@ struct field_modify_info modify_tcp[] =3D { > > } > > dev_flow->dv.actions_n =3D actions_n; > > flow->actions =3D action_flags; > > + if (attr->ingress && !attr->transfer && > > + (priv->representor || priv->master)) { > > + /* It was validated - we support unidirections flows only. */ > > + assert(!attr->egress); > > + /* > > + * Add matching on source vport index only > > + * for ingress rules in E-Switch configurations. > > + */ > > + flow_dv_translate_source_vport(matcher.mask.buf, > > + dev_flow->dv.value.buf, > > + priv->representor_id < 0 ? > > + priv->representor_id : > > + priv->representor_id + 1, >=20 > The vport of representor_id 0 will be 1? > Who owns vport 0? PF. There is the foillowing vport mapping (for single E-Switch per PF): -1 - wire 0 - PF (uplink + VF reps) 1 - VF0 2 - VF1 ... n+1 - VFn This code is subject to change - (SF, multi E-Switch per function, etc), this patch currently supports single E-Switch per PF. >=20 > > + 0xffff); > > + } > > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > > void *match_mask =3D matcher.mask.buf; > > -- > > 1.8.3.1