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Wed, 11 Dec 2019 16:14:09 +0000 Received: from AM5PR1001MB0994.EURPRD10.PROD.OUTLOOK.COM ([fe80::5525:87da:ca4:e8df]) by AM5PR1001MB0994.EURPRD10.PROD.OUTLOOK.COM ([fe80::5525:87da:ca4:e8df%7]) with mapi id 15.20.2516.019; Wed, 11 Dec 2019 16:14:09 +0000 From: Adam Thomson To: Marco Felsch , Mark Brown CC: Support Opensource , "lee.jones@linaro.org" , "robh+dt@kernel.org" , "linus.walleij@linaro.org" , "bgolaszewski@baylibre.com" , "joel@jms.id.au" , "andrew@aj.id.au" , "lgirdwood@gmail.com" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-aspeed@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "kernel@pengutronix.de" Subject: RE: [PATCH v3 3/6] dt-bindings: mfd: da9062: add regulator voltage selection documentation Thread-Topic: [PATCH v3 3/6] dt-bindings: mfd: da9062: add regulator voltage selection documentation Thread-Index: AQHVptoKIWnW5XGNx0qiesHaa7KQWaeqBMOAgAkpmQCAAfp+EA== Date: Wed, 11 Dec 2019 16:14:09 +0000 Message-ID: References: <20191129172537.31410-1-m.felsch@pengutronix.de> <20191129172537.31410-4-m.felsch@pengutronix.de> <20191204134631.GT1998@sirena.org.uk> <20191210094144.mxximpuouchy3fqu@pengutronix.de> In-Reply-To: <20191210094144.mxximpuouchy3fqu@pengutronix.de> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [193.240.73.196] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0ba1fc48-a343-4396-6502-08d77e552796 x-ms-traffictypediagnostic: AM5PR1001MB0993: x-ms-exchange-sharedmailbox-routingagent-processed: True x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: diasemi.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ba1fc48-a343-4396-6502-08d77e552796 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Dec 2019 16:14:09.5882 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 511e3c0e-ee96-486e-a2ec-e272ffa37b7c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 4VWJQ23V7FoYM5Gh3qCXrR4JtPCu6Lf4obwBSx08HRV1S51HSXNikG+uprB8oXz9nP+AIoCTCtzvHERu0U4Hwjk8jvTyVpav2ntto3goBGw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR1001MB0993 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 10 December 2019 09:42, Marco Felsch wrote: > Hi Mark, >=20 > On 19-12-04 13:46, Mark Brown wrote: > > On Fri, Nov 29, 2019 at 06:25:34PM +0100, Marco Felsch wrote: > > > > > + Optional regulator device-specific properties: > > > + - dlg,vsel-sense-gpios : A GPIO reference to a local general purpo= se input, > > > + the datasheet calls it GPI. The regulator sense the input signal= and select > > > + the active or suspend voltage settings. If the signal is active = the > > > + active-settings are applied else the suspend-settings are applie= d. > > > + Attention: Sharing the same GPI for other purposes or across mul= tiple > > > + regulators is possible but the polarity setting must equal. > > > > I'm really confused by this. As far as I understand it it seems > > to be doing pinmuxing on the chip using the GPIO bindings which > > is itself a bit odd and I don't see anything here that configures > > whatever sets the state of the pins. Don't we need another GPIO > > to set the vsel-sense inputs on the PMIC? >=20 > Yes the PMIC is very configurable and it took a while till I understand > it.. @Adam please correct me if I'm wrong. >=20 > The PMIC regulators regardless of the type: ldo or buck can be > simplified drawn as: >=20 >=20 >=20 > da9062-gpio da9062-regulator >=20 > +------------------------------------------------------- > | PMIC > | > > GPIO0 +--------------------------+ > | | REGULATOR-0 | > > GPIO1 -------+ | | > | +-- > vsel-in voltage-a-out < > > GPIO2 | | | > | | > enable-in voltage-b-out < > | | | | > | | +--------------------------+ > | | > | | +--------------------------+ > | | | REGULATOR-1 | > | | | | > | +-- > vsel-in voltage-a-out < > | | | > | > enable-in voltage-b-out < > | | | > | +--------------------------+ > | >=20 > The 'vsel-in' and 'enable-in' regulator inputs must be routed to the > PMIC GPIOs which must be configured as input. If this is a pinmux in > your opinion, then yes we need to do that. IMHO it isn't a pinmux > because from the regulator point of view it is just a GPIO which comes > from our own gpio-dev (da9062-gpio). So the abstraction is vald. Anyway > I'm with you that this isn't the typical use-case. We've had this discussion before and to me it felt more like pinmux than GP= IO although I understand we're configuring the GPIO pin as input before then configuring a regulator to take that specific internal GPIO as the control signal. We're defining a specific role to this pin in HW rather than it bei= ng a general software handled GPI so it feels like this would be neater under pi= nmux. There does still need to be a mapping between that pin and the regulator wh= ich I guess would be served by passing the pin to the regulator through generic p= inmux bindings and then in the regulator code you're simply just enabling the regulator to be controlled from that pin. The HW lets you control multiple regulators from the same input pin so there's a flexibility there to be captured, as you mention. >=20 > Regards, > Marco >=20 > -- > Pengutronix e.K. | = | > Steuerwalder Str. 21 | http://www.pengutronix.de/ = | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 = | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 = | From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 197ABC43603 for ; Wed, 11 Dec 2019 16:14:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6440205C9 for ; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10 December 2019 09:42, Marco Felsch wrote: > Hi Mark, > > On 19-12-04 13:46, Mark Brown wrote: > > On Fri, Nov 29, 2019 at 06:25:34PM +0100, Marco Felsch wrote: > > > > > + Optional regulator device-specific properties: > > > + - dlg,vsel-sense-gpios : A GPIO reference to a local general purpose input, > > > + the datasheet calls it GPI. The regulator sense the input signal and select > > > + the active or suspend voltage settings. If the signal is active the > > > + active-settings are applied else the suspend-settings are applied. > > > + Attention: Sharing the same GPI for other purposes or across multiple > > > + regulators is possible but the polarity setting must equal. > > > > I'm really confused by this. As far as I understand it it seems > > to be doing pinmuxing on the chip using the GPIO bindings which > > is itself a bit odd and I don't see anything here that configures > > whatever sets the state of the pins. Don't we need another GPIO > > to set the vsel-sense inputs on the PMIC? > > Yes the PMIC is very configurable and it took a while till I understand > it.. @Adam please correct me if I'm wrong. > > The PMIC regulators regardless of the type: ldo or buck can be > simplified drawn as: > > > > da9062-gpio da9062-regulator > > +------------------------------------------------------- > | PMIC > | > > GPIO0 +--------------------------+ > | | REGULATOR-0 | > > GPIO1 -------+ | | > | +-- > vsel-in voltage-a-out < > > GPIO2 | | | > | | > enable-in voltage-b-out < > | | | | > | | +--------------------------+ > | | > | | +--------------------------+ > | | | REGULATOR-1 | > | | | | > | +-- > vsel-in voltage-a-out < > | | | > | > enable-in voltage-b-out < > | | | > | +--------------------------+ > | > > The 'vsel-in' and 'enable-in' regulator inputs must be routed to the > PMIC GPIOs which must be configured as input. If this is a pinmux in > your opinion, then yes we need to do that. IMHO it isn't a pinmux > because from the regulator point of view it is just a GPIO which comes > from our own gpio-dev (da9062-gpio). So the abstraction is vald. Anyway > I'm with you that this isn't the typical use-case. We've had this discussion before and to me it felt more like pinmux than GPIO although I understand we're configuring the GPIO pin as input before then configuring a regulator to take that specific internal GPIO as the control signal. We're defining a specific role to this pin in HW rather than it being a general software handled GPI so it feels like this would be neater under pinmux. There does still need to be a mapping between that pin and the regulator which I guess would be served by passing the pin to the regulator through generic pinmux bindings and then in the regulator code you're simply just enabling the regulator to be controlled from that pin. The HW lets you control multiple regulators from the same input pin so there's a flexibility there to be captured, as you mention. > > Regards, > Marco > > -- > Pengutronix e.K. | | > Steuerwalder Str. 21 | http://www.pengutronix.de/ | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel