From mboxrd@z Thu Jan  1 00:00:00 1970
From: Z.q. Hou <zhiqiang.hou@nxp.com>
Date: Mon, 1 Apr 2019 03:48:07 +0000
Subject: [U-Boot] [RESEND PATCHv4 1/9] armv8: fsl-layerscpae: correct
 the PCIe controllers' region size
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References: <20190325022546.38427-1-Zhiqiang.Hou@nxp.com>
 <20190325022546.38427-2-Zhiqiang.Hou@nxp.com>
 <CAEUhbmU-d_fYLOOjqZtcGnFXiHkJi5sSLYQ=wLmuksnsyaL7HA@mail.gmail.com>
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To: u-boot@lists.denx.de

Hi Bin,


> -----Original Message-----
> From: Bin Meng [mailto:bmeng.cn at gmail.com]
> Sent: 2019年4月1日 11:22
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: u-boot at lists.denx.de; albert.u.boot at aribaud.net; Priyanka Jain
> <priyanka.jain@nxp.com>; York Sun <york.sun@nxp.com>;
> sriram.dash at nxp.com; yamada.masahiro at socionext.com; Prabhakar
> Kushwaha <prabhakar.kushwaha@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>
> Subject: Re: [RESEND PATCHv4 1/9] armv8: fsl-layerscpae: correct the PCIe
> controllers' region size
> 
> On Mon, Mar 25, 2019 at 10:24 AM Z.q. Hou <zhiqiang.hou@nxp.com> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The LS2080A has 8GB region for each PCIe controller, while the other
> > platforms have 32GB.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V4:
> >  - No change
> >
> >  arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> 
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Thanks a lot for your review!

Zhiqiang