From mboxrd@z Thu Jan 1 00:00:00 1970 From: Honnappa Nagarahalli Subject: Re: [PATCH v2 2/4] hash: add local cache for TSX region Date: Mon, 12 Nov 2018 18:34:08 +0000 Message-ID: References: <20181105173913.61225-1-bruce.richardson@intel.com> <20181112104719.62568-1-bruce.richardson@intel.com> <20181112104719.62568-3-bruce.richardson@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "stable@dpdk.org" , Yipeng Wang , nd To: Bruce Richardson , "dev@dpdk.org" Return-path: In-Reply-To: <20181112104719.62568-3-bruce.richardson@intel.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > From: Yipeng Wang >=20 > This patch adds back the local cache when TSX support is turned on. >=20 > When TSX is turned on, free key-data slot ring would be contended by vari= ous > TSX regions. The purpose of this commit is to reduce possible memory > collisions during key insertion. >=20 > Signed-off-by: Yipeng Wang > Acked-by: Bruce Richardson > --- > lib/librte_hash/rte_cuckoo_hash.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) >=20 > diff --git a/lib/librte_hash/rte_cuckoo_hash.c > b/lib/librte_hash/rte_cuckoo_hash.c > index 76f5dc8..5d5f9f1 100644 > --- a/lib/librte_hash/rte_cuckoo_hash.c > +++ b/lib/librte_hash/rte_cuckoo_hash.c > @@ -180,8 +180,10 @@ struct rte_hash * > } >=20 > /* Check extra flags field to check extra options. */ > - if (params->extra_flag & > RTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT) > + if (params->extra_flag & > RTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT) { > + use_local_cache =3D 1; Do you see the issue even in the case of single writer? Enabling this flag = creates local caches on all the data plane cores. This increases the memory= usage for the single writer use case. Then there is 'writers on the contro= l plane' use case, the requirement on hash_add rate is comparatively lower = when compared to 'writers on the data plane'. The writers also are not pinn= ed to any core as well. In this use case, I am not sure how much having a l= ocal cache matters. Enabling this flag effectively changes the free slot allocation from a ring= to a stack data structure. Does it indicate that for single writer use cas= e with TSX, the free slot (global) data structure should be a stack (rather= than a ring)? =20 > hw_trans_mem_support =3D 1; > + } >=20 > if (params->extra_flag & > RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD) { > use_local_cache =3D 1; > -- > 1.8.5.6