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From: Andy Duan <fugang.duan@nxp.com>
To: Fabio Estevam <festevam@gmail.com>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>
Subject: RE: [EXT] [RFC PATCH 2/2] arm64: dts: imx8mm: Describe the ENET pps interrupt
Date: Wed, 19 Aug 2020 01:43:26 +0000	[thread overview]
Message-ID: <AM8PR04MB7315166258DB37BC2B56DEC9FF5D0@AM8PR04MB7315.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20200818210529.5884-2-festevam@gmail.com>

From: Fabio Estevam <festevam@gmail.com> Sent: Wednesday, August 19, 2020 5:05 AM
> imx8mm has IRQ 121 associated with the '1588 Timer Interrupt', so add an
> entry for it.
> 
> With this change IRQ 121 can properly increment when PTP applications like
> ptp4l is used.

No, IRQ 121 is not for PTP (ptp4l), upstream kernel already support PTP, the irq 121 
is only for PPS, not relates to PTP. And PPS is optional that depends on board design and
real use case.
> 
> Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.com>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 551afc270fb7..6f435628824c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -844,10 +844,11 @@
>                         fec1: ethernet@30be0000 {
>                                 compatible = "fsl,imx8mm-fec",
> "fsl,imx6sx-fec";
>                                 reg = <0x30be0000 0x10000>;
> -                               interrupt-names = "int0", "int1", "int2";
> +                               interrupt-names = "int0", "int1",
> + "int2", "pps";
>                                 interrupts = <GIC_SPI 120
> IRQ_TYPE_LEVEL_HIGH>,
>                                         <GIC_SPI 118
> IRQ_TYPE_LEVEL_HIGH>,
> -                                       <GIC_SPI 119
> IRQ_TYPE_LEVEL_HIGH>;
> +                                       <GIC_SPI 119
> IRQ_TYPE_LEVEL_HIGH>,
> +                                       <GIC_SPI 121
> + IRQ_TYPE_LEVEL_HIGH>;
>                                 clocks = <&clk
> IMX8MM_CLK_ENET1_ROOT>,
>                                          <&clk
> IMX8MM_CLK_ENET1_ROOT>,
>                                          <&clk
> IMX8MM_CLK_ENET_TIMER>,
> --
> 2.17.1


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  reply	other threads:[~2020-08-19  1:45 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-18 21:05 [RFC PATCH 1/2] arm64: dts: imx8mm: Fix the ENET interrupts order Fabio Estevam
2020-08-18 21:05 ` [RFC PATCH 2/2] arm64: dts: imx8mm: Describe the ENET pps interrupt Fabio Estevam
2020-08-19  1:43   ` Andy Duan [this message]
2020-08-19  1:36 ` [EXT] [RFC PATCH 1/2] arm64: dts: imx8mm: Fix the ENET interrupts order Andy Duan
2020-08-19  1:47   ` Fabio Estevam

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